With its 12th Gen Core "Alder Lake-P" mobile processors still on the horizon, Intel is already building test batches of the 14th Gen "Meteor Lake" mobile processors, at its Fab 42 facility in Chandler, Arizona. "Meteor Lake" is a multi-chip module that leverages Intel's Foveros packaging technology to combine "tiles" (purpose built dies) based on different silicon fabrication processes depending on their function and transistor-density/power requirements. It combines four distinct tiles across a single package—the compute tile, with the CPU cores; the graphics tile with the iGPU: the SoC I/O tile, which handles the processor's platform I/O; and a fourth tile, which is currently unknown. This could be a memory stack with similar functions as the HBM stacks on "Sapphire Rapids," or something entirely different.

The compute tile contains the processor's various CPU core types. The P cores are "Redwood Cove," which are two generations ahead of the current "Golden Cove." If Intel's 12-20% generational IPC uplift cadence holds, we're looking at cores with up to 30% higher IPC than "Golden Cove" (50-60% higher than "Skylake."). "Meteor Lake" also debuts Intel's next-generation E-core, codenamed "Crestmont." The compute tile is rumored to be fabricated on the Intel 4 node (optically a 7 nm-class node, but with characteristics similar to TSMC N5).

Samsung Electronics Co., Ltd., the world leader in advanced memory technology, today announced that it has developed the industry's first 14-nanometer (nm) based 16-gigabit (Gb) Low Power Double Data Rate 5X (LPDDR5X) DRAM, designed to drive further growth throughout the high-speed data service applications including 5G, artificial intelligence (AI) and the metaverse.

"In recent years, hyperconnected market segments such as AI, augmented reality (AR) and the metaverse, which rely on extremely fast large-scale data processing, have been rapidly expanding," said SangJoon Hwang, senior vice president and head of the DRAM Design Team at Samsung Electronics. "Our LPDDR5X will broaden the use of high-performance, low-power memory beyond smartphones and bring new capabilities to AI-based edge applications like servers and even automobiles."

JEDEC Solid State Technology Association, the global leader in standards development for the microelectronics industry, today announced the publication of JESD209-5B, Low Power Double Data Rate 5 (LPDDR5). JESD209-5B includes both an update to the LPDDR5 standard that is focused on improving performance, power and flexibility, and a new LPDDR5X standard, which is an optional extension to LPDDR5.

Taken together, LPDDR5 and LPDDR5X are designed to significantly boost memory speed and efficiency for a variety of uses including mobile devices, such as 5G smartphones and artificial intelligence (AI) applications. Developed by JEDEC's JC-42.6 Subcommittee for Low Power Memories, JESD209-5B is available for download from the JEDEC website.