An alleged leaked company slide details AMD's upcoming 5 nm "Navi 31" GPU powering the next-generation Radeon RX 7900 XTX and RX 7900 XT graphics cards. The slide details the "Navi 31" MCM, with its central graphics compute die (GCD) chiplet that's built on the 5 nm EUV silicon fabrication process, surrounded by six memory cache dies (MCDs), each built on the 6 nm process. The GCD interfaces with the system over a PCI-Express 4.0 x16 host interface. It features the latest-generation multimedia engine with dual-stream encoders; and the new Radiance display engine with DisplayPort 2.1 and HDMI 2.1a support. Custom interconnects tie it with the six MCDs.

Each MCD has 16 MB of Infinity Cache (L3 cache); and a 64-bit GDDR6 memory interface (two 32-bit GDDR6 paths). Six of these add up to the GPU's 384-bit GDDR6 memory interface. In the scheme of things, the GPU has a contiguous and monolithic 384-bit wide memory bus, because every modern GPU uses multiple on-die memory controllers to achieve a wide memory bus. "Navi 31" hence has a total Infinity Cache size of 96 MB—which may be less in comparison to the 128 MB on "Navi 21," but AMD has shored up cache sizes across the GPU. The L0 caches on the compute units is now increased numerically by 240%. The L1 caches by 300%, and the L2 cache shared among the shader engines, by 50%. The RX 7900 XTX is confirmed to use 20 Gbps GDDR6 memory in this slide, for 960 GB/s of memory bandwidth.

AMD on Thursday launched the Radeon RX 7900 XTX and RX 7900 XT RDNA3 graphics cards. With these, the company claims to have repeated its feat of a 50+ percent performance/Watt gain over the previous-generation, which propelled the RX 6000-series to competitiveness with NVIDIA's fastest RTX 30-series SKUs. AMD's performance claims for the Radeon RX 7900 XTX put the card at anywhere between 50% to 70% faster than the company's current flagship, the RX 6950 XT, when tested at 4K UHD resolution. Digging through these claims, and piecing together relevant information from the Endnotes, HXL was able to draw an extrapolated performance comparison between the RX 7900 XTX, the real-world tested RTX 4090, and previous-generation flagships RTX 3090 Ti and RX 6950 XT.

The graphs put the Radeon RX 7900 XTX menacingly close to the GeForce RTX 4090. In Watch_Dogs Legion, the RTX 4090 is 6.4% faster than the RX 7900 XTX. Cyberpunk 2077 and Metro Exodus see the two cards evenly matched, with a delta under 1%. The RTX 4090 is 4.4% faster with Call of Duty: Modern Warfare II (2022). Accounting for the pinch of salt usually associated with launch-date first-party performance claims; the RX 7900 XTX would end up within 5-10% of the RTX 4090, but pricing changes everything. The RTX 4090 is a $1,599 (MSRP) card, whereas the RX 7900 XTX is $999. Assuming the upcoming RTX 4080 (16 GB) is around 10% slower than the RTX 4090; the main clash for this generation will be between the RTX 4080 and RX 7900 XTX. Even here, AMD gets ahead with pricing, as the RTX 4080 was announced with an MSRP of $1,199 (exactly 20% pricier than the RX 7900 XTX). With the FSR 3.0 Fluid Motion announcement, AMD also blunted NVIDIA's DLSS 3 Frame Generation performance advantage.

AMD today announced the Radeon RX 7900 XTX and Radeon RX 7900 XT gaming graphics cards debuting its next-generation RDNA3 graphics architecture. The two new cards come at $999 and $899—basically targeting the $1000 high-end premium price point.Both cards will be available on December 13th, not only the AMD reference design, which is sold through AMD.com, but also custom-design variants from the many board partners on the same day. AIBs are expected to announce their products in the coming weeks.The RX 7900 XTX is priced at USD $999, and the RX 7900 XT is $899, which is a surprisingly small difference of only $100, for a performance difference that will certainly be larger, probably in the 20% range. Both Radeon RX 7900 XTX and RX 7900 XT are using the PCI-Express 4.0 interface, Gen 5 is not supported with this generation. The RX 7900 XTX has a typical board power of 355 W, or about 95 W less than that of the GeForce RTX 4090. The reference-design RX 7900 XTX uses conventional 8-pin PCIe power connectors, as would custom-design cards, when they come out. AMD's board partners will create units with three 8-pin power connectors, for higher out of the box performance and better OC potential. The decision to not use the 16-pin power connector that NVIDIA uses was made "well over a year ago", mostly because of cost, complexity and the fact that these Radeons don't require that much power anyway.

AMD today is expected to launch its next-generation RDNA3 graphics architecture and next-generation Radeon RX 7000-series graphics cards, along with new gaming technologies as part of the company's "together we advance_gaming" event, unfurled by CEO Dr Lisa Su. In this live-blog we track the various announcements made in the event.20:01 UTC: AMD's roadmap is supremely busy:20:02 UTC: "today it's all about gaming"

Here's the first picture of the "Navi 31" GPU at the heart of AMD's fastest next-generation graphics cards. Based on the RDNA3 graphics architecture, this will mark an ambitious attempt by AMD to build the first multi-chip module (MCM) client GPU featuring more than one logic die. MCM GPUs aren't new in the enterprise space with Intel's "Ponte Vecchio," but this would be the first such GPU meant for hardcore gaming graphics products. AMD had made MCM GPUs in the past, but those have been packages with just one logic die, surrounded by memory stacks. "Navi 31" is an MCM of as many as eight logic dies, and no memory stacks (no, those aren't HBM stacks in the picture below).

It's rumored that "Navi 31" features one or two SIMD chiplets dubbed GCDs, featuring the GPU's main number crunching machinery, the RDNA3 compute units. These chiplets are likely built on the most advanced silicon fabrication node, likely TSMC 5 nm EUV, but we'll see. The GDDR6 memory controllers handling the chip's 384-bit wide GDDR6 memory interface, will be located on separate chiplets built on a slightly older node, such as TSMC 6 nm. This is not multi-GPU-a-stick, because both SIMD chiplets have uniform access to the entire 384-bit wide memory bus (which is not 2x 192-bit but 1x 384-bit), besides the other ancillaries. The "Navi 31" MCM are expected to be surrounded by JEDEC-standard 20 Gbps GDDR6 memory chips.

Here's what is possibly the very first picture of an AMD Radeon RX 7900 XTX RDNA3 graphics card. AMD engineering samples and prototypes tend to use red color PCBs, which is what this card is. It reveals what could be the final design of the reference cooling solution for the card, and it seems to match the teasers the company put out in its Ryzen 7000-series launch event.

The RX 7900 XTX cooling solution design builds on that of its predecessor. The card itself has 3 slots thick, but slightly longer than the RX 6900 XT. The aluminium fin-stack heatsink is bulkier than the one on the RX 6900 XT cooler, and appears to be bursting out of the vents. It stretches out to the edges of the cooler shroud. The bulge toward the tail-end could be housing the tips of the heat-pipes. The prototype card has two 8-pin PCIe power inputs. There's no backplate, because the PCB has several headers in place for diagnostics and developmental use by AIBs and OEMs.

AMD's next-generation Radeon RX 7000-series graphics cards based on the RDNA3 graphics architecture, are expected to launch in early-December 2022, according to greymon55, a reliable source with AMD leaks. The cards will be unveiled at a media event to be held on November 3, 2022, with market availability following a month after (between 1st to 5th December). The company is expected to take a top-down product-stack release cycle similar to that of NVIDIA, with the release of two of its top SKUs, the Radeon RX 7900 XTX and the RX 7900 XT. Both these cards are based on the 5 nm Navi 31 MCM GPU. This will be AMD's first client-graphics MCM GPU with more than one logic die. The company has a decade of experience with MCMs, but past generations have been one logic die surrounded with on-package HBM. Navi 31 has on-package logic chiplets, but discrete GDDR6 memory, like most other GPUs in the market today. It's rumored that the company is targeting a 100% performance uplift over the previous-generation, which means team-red is on the prowl to compete with NVIDIA's fastest SKUs, including the RTX 4090 and upcoming RTX 4080.

AMD just officially confirmed that its upcoming Radeon RX 7000 series next-generation graphics card will not use the 12+4 pin ATX 12VHPWR connector across the product stack. Scott Herkelman. SVP and GM of the AMD Radeon product group, confirmed on Twitter that the current RX 6000 series and future GPUs based on the RDNA3 graphics architecture, will not use this power connector. This would mean that even its add-in board (AIB) partners won't find the connector as a qualified part by AMD to opt for. This would mean that Radeon RX 7000 series will stick with 8-pin PCIe power connectors on the card, each drawing up to 150 W of power. For some of the higher-end products with typical board power of over 375 W; this will mean >2 8-pin connectors. AMD is expected to debut RDNA3 on November 3, 2022.

AMD is reportedly bringing back the "XTX" brand extension to the main marketing names of its upcoming Radeon RX 7000-series SKUs. The company had, until now, reserved the "XTX" moniker for internal use, to denote SKUs that max out all hardware available on a given silicon. The RX 7000-series introduce the company's next-generation RDNA3 graphics architecture, and will see the company introduce its chiplets packaging design to the client-graphics space. The next-generation "Navi 31" GPU will likely be the first of its kind: while multi-chip module (MCM) GPUs aren't new, this would be the first time that multiple logic chips would sit on a single package for client GPUs. AMD has plenty of experience with MCM GPUs, but those have been single logic chips surrounded by memory stacks. "Navi 31" uses multiple logic chips on a package; which is then wired to conventional discrete GDDR6 memory devices like any other client GPU.

The rumored Radeon RX 7900 XTX is features 12,288 stream processors, likely across two logic tiles that contain the SIMD components. These tiles are [for now] rumored to be built on the TSMC N5 (5 nm EUV) foundry process. The Display CoreNext (DCN), and Video CoreNext (VCN) components, as well as the GDDR6 memory controllers, will be built on separate chiplets that are likely built on TSMC N6 (6 nm). The "Navi 31" has a 384-bit wide memory interface. This is 384-bit and not "2x 192-bit," because the logic tiles don't have memory interfaces of their own, but rely on memory controller tiles shared between the two logic tiles, much in the same as a dual-channel DDR4 memory interface being shared between the two 8-core CPU chiplets on a Ryzen 5950X processor.

AMD's upcoming Radeon RX 7000-series GPUs based on the RDNA3 graphics architecture, are rumored to be capable of engine clocks (GPU clocks) close to 4 GHz. This is plausible, given that the current-gen RX 6000-series can hit 3 GHz. AMD's play against the RTX 4090 will hence be a product with +50% performance/Watt gain over the previous generation, a significantly increased shader-count, an over 70% increase in memory bandwidth (384-bit memory running at 20 Gbps or more), faster/larger Infinity Cache, and to top it all off, engine clocks approaching 4 GHz.

Here's the very first sketch of an AMD RDNA3 Radeon RX 7000-series flagship graphics card with the "Navi 31" chip in the middle. This will be AMD's first chiplet-based GPU built on a philosophy similar to that of the Ryzen desktop and EPYC server processors. The main number crunching machinery that benefits the most from the latest foundry process, will be built on 5 nm logic chiplets (up to two of these on the "Navi 31," one of these on the "Navi 32"), while the components that don't really benefit from the latest process, such as the memory controllers, display/media accelerators, etc., will be disintegrated into chiplets built on a slightly older node, such as 6 nm. This way AMD gets to maximize its 5 nm allocation at TSMC, which it has to share among not just the logic tiles of RDNA3 GPUs, but also its "Zen 4" processors.

The top-dog "Navi 31" silicon is expected to feature a 384-bit wide GDDR6 memory interface, which is why you see 12 memory chips surrounding the GPU package. AMD is expected to deploy fast 19-21 Gbps class GDDR6 memory chips, as well as double-down on the Infinity Cache technology. The package looks like a GPU die surrounded by HBM stacks, but those are actually the memory/display chiplets. If this PCB is from an AMD reference design, it could be the biggest hint that AMD isn't switching over to the 12+4 pin ATX 12HPWR connector just yet, and could stick with three 8-pin PCIe connectors for power, just like the current RX 6950 XT. USB-C with DisplayPort passthrough could prominently feature with RDNA3 graphics cards, besides standard DisplayPort and HDMI connectors.

NVIDIA Ada and AMD RDNA3 will not sell to Ethereum miners. In a dramatic move, the creators of Ethereum have switched over the popular crypto-currency's algorithm from proof-of-work, to proof-of-stake, which means miners will no longer spend GPU resources in competing to find the same blocks. This effectively ends GPU-accelerated mining as Ethereum mining was the number-1 consumer of high-end GPUs through 2021. The switch-over happened as the total terminal difficulty surpassed 58,750,000,000T, with the last block having been found. With this move, global electricity consumption is expected to reduce by 0.2% (that's enough to power the world's top 5 cities).

The impact of this move on GPU sales to crypto-currency miners is expected to be profound. GPUs are no longer an economical way to mine Bitcoin, ASICs are; and Ethereum mining constituted the bulk of activity from GPU-accelerated mining farms. This doesn't mean there aren't other crypto-currencies that rely on GPU-accelerated proof-of-work blockchain compute; but Ethereum had the highest market-cap among such currencies. Gamers have reason to rejoice, as NVIDIA and AMD now have to sell high-end GPUs squarely on merits of gaming performance, power-draw, and graphics card pricing.

AMD in its Ryzen 7000 launch event teased its next-generation Radeon graphics card based on the RDNA3 graphics architecture. Built on an advanced process node just like "Zen 4," AMD is hoping to repeat the magic of the RX 6000 series, by achieving a 50% performance-per-Watt gain over the previous generation. which allows it either to build some really efficient GPUs, or consume the power headroom to offer significantly higher performance at power levels similar as the current-gen.

AMD's teaser included a brief look at the air-cooled RDNA3 flagship reference-design, and it looks stunning. The company showed off a live demo of the card playing "Lies of P," a AAA gaming title that made waves at Gamescom for its visuals. The game was shown playing on an RDNA3 graphics card running on a machine with a Ryzen 9 7950X processor at 4K, with extreme settings. AMD CEO Dr Lisa Su confirmed a 2022 launch for RDNA3.

AMD is now TSMC's second largest customer for its 5 nanometer N5 silicon fabrication node, according to a DigiTimes report. The Taiwan-based semiconductor industry observer also reports that AMD is more resilient than Intel in facing any downturns in the PC industry, in the coming few months. PC sales are expected to slump by as much as 15 percent in the near future, but the lower market-share compared to Intel; and the flexibility for AMD to move its CPU chips over to enterprise product to feed the growth in server processor segment, means that the company can ride over a bumpy road in the near future. The lower market-share translates to "lesser pain" from a slump compared to Intel. The report also says that embracing TSMC for processors "just in time" means that AMD has a front-row seat with product performance, time-to-market, yields, and delivery.

AMD is on the anvil of two major product launches on 5 nm, the Ryzen 7000 series "Raphael" desktop processors on August 30 (according to the report), and EPYC "Genoa" server processors in November 2022. The company is planning to refresh its notebook processor lineup in the first half of 2023, with "Dragon Range," and "Phoenix Point" targeting distinct market segments among notebooks. "Dragon Range" is essentially "Raphael" (5 nm chiplet + 6 nm cIOD) on a mobile-optimized BGA package, letting AMD cram up to 16 "Zen 4" cores, and take on Intel's high core-count mobile processors. The iGPU of "Dragon Range" will be basic, since designs based on this chip are expected to use discrete GPUs. "Phoenix Point" is a purpose-built mobile processor with up to 8 "Zen 4" cores, and a powerful iGPU based the RDNA3 architecture.

AMD in its Q2-2022 financial results call with analysts, confirmed that the company's next-generation Ryzen 7000 desktop processors based on the "Zen 4" microarchitecture will debut this quarter (i.e. Q3-2022, or before October 2022). CEO Dr Lisa Su stated "Looking ahead, we're on track to launch our all-new 5 nm Ryzen 7000 desktop processors and AM5 platforms later this quarter with leadership performance in gaming and content creation."

The company also stated that its next-generation Radeon 7000 series GPUs based on the RDNA3 graphics architecture are on-track for launch "later this year," without specifying whether it meant this quarter, which could mean launch any time before January 2023. AMD is also on course to beating Intel to the next-generation of server processors with DDR5 and PCIe Gen 5 support, with its EPYC "Genoa" 96-core processor slated for later this year, as Intel struggles with a Q1-2023 general availability timeline for its Xeon Scalable "Sapphire Rapids" processor.

AMD's RDNA3 graphics IP is just around the corner, and we are hearing more information about the upcoming architecture. Historically, as GPUs advance, it is not unusual for companies to add dedicated hardware blocks to accelerate a specific task. Today, AMD engineers have updated the backend of the LLVM compiler to include a new instruction called Wave Matrix Multiply-Accumulate (WMMA). This instruction will be present on GFX11, which is the RDNA3 GPU architecture. With WMMA, AMD will offer support for processing 16x16x16 size tensors in FP16 and BF16 precision formats. With these instructions, AMD is adding new arrangements to support the processing of matrix multiply-accumulate operations. This is closely mimicking the work NVIDIA is doing with Tensor Cores.

AMD ROCm 5.2 API update lists the use case for this type of instruction, which you can see below:

rocWMMA provides a C++ API to facilitate breaking down matrix multiply accumulate problems into fragments and using them in block-wise operations that are distributed in parallel across GPU wavefronts. The API is a header library of GPU device code, meaning matrix core acceleration may be compiled directly into your kernel device code. This can benefit from compiler optimization in the generation of kernel assembly and does not incur additional overhead costs of linking to external runtime libraries or having to launch separate kernels.

rocWMMA is released as a header library and includes test and sample projects to validate and illustrate example usages of the C++ API. GEMM matrix multiplication is used as primary validation given the heavy precedent for the library. However, the usage portfolio is growing significantly and demonstrates different ways rocWMMA may be consumed.

AMD is preparing to update its mobile sector with the latest IP in the form of Zen4 CPU cores and RDNA3 graphics. According to Red Gaming Tech, we have specifications of upcoming processor families. First, we have AMD Dragon Range mobile processors representing a downsized Raphael design for laptops. Carrying Zen4 CPU cores and RDNA2 integrated graphics, these processors are meant to power high-performance laptops with up to 16 cores and 32 threads. Being a direct competitor to Intel's Alder Lake-HX, these processors also carry an interesting naming convention. The available SKUs include AMD Ryzen 5 7600HX, Ryzen 7 7800HX, Ryzen 9 7900HX, and Ryzen 9 7980HX design with a massive 16-core configuration. These CPUs are envisioned to run along with more powerful dedicated graphics, with clock speeds of 4.8-5.0+ GHz.

Next, we have AMD Phoenix processors, which take Dragon Range's design to a higher level thanks to the newer graphics IP. Having Zen4 cores, Phoenix processors carry upgraded RDNA3 graphics chips to provide a performance level similar to NVIDIA's GeForce RTX 3060 Max-Q SKU, all in one package. These APUs will come in four initial configurations: Ryzen 5 7600HS, Ryzen 7 7800HS, Ryzen 9 7900HS, and Ryzen 9 7980HS. While maxing out at eight cores, these APUs will compensate with additional GPU compute units with a modular chiplet design. AMD Phoenix is set to become AMD's first chiplet design launching for the laptop market, and we can expect more details as we approach the launch date.

AMD is allegedly preparing an upgraded quad-core APU with Zen 4 and RDNA3 architectures for a next-generation Steam Deck device according to Moore's Law is Dead. The report claims that the chip is referred to as a "Van Gogh Successor" internally with a die size between 110 mm² and 150 mm² resulting in an increased production cost. The chip should feature 4 Zen 4 cores and 8 threads offering 25% - 35% higher performance per clock (PPC) with a maximum boost of 4 GHz. The RDNA3 graphics will include 8 Compute Units with significantly higher PPC compared to their RDNA2 counterparts which combined with the updated CPU could see a performance improvement up to 50%. These rumors have not been confirmed with any potential Steam Deck processor far from being announced or released anytime soon.

An engineering sample of AMD's next-generation Ryzen "Phoenix Point" mobile processor has been powered up, and made its first appearance on the Geekbench user-database. "Phoenix Point" is a monolithic silicon mobile processor built on the TSMC N5 (5 nm EUV) process, featuring "Zen 4" CPU cores, and a significantly faster iGPU based on the RDNA3 graphics architecture; along with a DDR5/LPDDR5 memory interface, and PCI-Express Gen 5.0 capability. An engineering sample with an 8-core/16-thread CPU, with the OPN code "100-000000709-23_N," hit the radar. AMD could debut Ryzen "Phoenix Point" in the first quarter of 2023, possibly with an International CES announcement.

AMD is planning to debut its next-generation RDNA3 graphics architecture with the Radeon RX 7000 series desktop graphics cards, some time in late-October or early-November, 2022. This, according to Greymon55, a reliable source with AMD and NVIDIA leaks. We had known about a late-2022 debut for AMD's next-gen graphics, but now we have a finer timeline.

AMD claims that RDNA3 will repeat the feat of over 50 percent generational performance/Watt gains that RDNA2 had over RDNA. The next-generation GPUs will be built on the TSMC N5 (5 nm EUV) silicon fabrication process, and debut a multi-chip module design similar to AMD's processors. The logic dies with the GPU's SIMD components will be built on the most advanced node, while the I/O and display/media accelerators will be located in separate dies that can make do on a slightly older node.

AMD in its 2022 Financial Analyst Day presentation claimed that it will repeat the over-50% generational performance/Watt uplift feat with the upcoming RDNA3 graphics architecture. This would be a repeat of the unexpected return to the high-end and enthusiast market-segments of AMD Radeon, thanks to the 50% performance/Watt uplift of the RDNA2 graphics architecture over RDNA. The company also broadly detailed the various new specifications of RDNA3 that make this possible.

To begin with, RDNA3 debuts on the TSMC N5 (5 nm) silicon fabrication node, and will debut a chiplet-based approach that's somewhat analogous to what AMD did with its 2nd Gen EPYC "Rome" and 3rd Gen Ryzen "Matisse" processors. Chiplets packed with the GPU's main number-crunching and 3D rendering machinery will make up chiplets, while the I/O components, such as memory controllers, display controllers, media engines, etc., will sit on a separate die. Scaling up the logic dies will result in a higher segment ASIC.

AMD has historically thrown brute memory bus width at solving memory-management problems in its graphics architectures, but the Infinity Cache technology launched with RDNA2 proved to be a game changer, as GPUs with narrow 256-bit memory interfaces could compete with NVIDIA's offerings that have 384-bit wide memory interfaces and faster GDDR6X memory types. It looks like the competition between NVIDIA "Ada" and AMD RDNA3 graphics architectures is about to heat up, as rumors are emerging of AMD giving its biggest next-gen ASIC, the "Navi 31," a 384-bit wide memory interface.

This 50 percent increase in memory bus width, runs in concert with two associated rumors—one, that the company will use faster 20 Gbps GDDR6 memory chips; and two, that AMD may increase the size of the on-die Infinity Cache memory. Samsung is already mass-producing 20 Gbps and 24 Gbps GDDR6 memory chips. These are regular GDDR6 memory chips with JEDEC-standard signaling, and not GDDR6X, an exclusive memory type innovated by NVIDIA and Micron Technology, which leverages PAM4 signaling to increase data-rates. A theoretical "Navi 31" with 20 Gbps GDDR6 memory speeds would enjoy 960 GB/s of memory bandwidth, a massive 87.5 percent bandwidth increase over the RX 6900 XT. The on-die Infinity Cache operates at speeds measured in several TB/s. The increased bus width could also signal an increase in memory sizes, with the RX 6950 XT successor featuring at least 24 GB of memory.

AMD's next-generation Ryzen 7000-series "Phoenix" mobile processors are all the rage these days. Bound for 2023, these chips feature a powerful iGPU based on the RDNA3 graphics architecture, with performance allegedly rivaling that of a GeForce RTX 3060 Laptop GPU—a popular performance-segment discrete GPU. What's more, AMD is also taking a swing at Intel in the CPU core-count game, by giving "Phoenix" a large number of "Zen 4" CPU cores. The secret ingredient pushing this combo, however, is a large cache.

AMD has used large caches to good effect both on its "Zen 3" processors, such as the Ryzen 7 5800X3D, where they're called 3D Vertical Cache (3D V-cache); as well as its Radeon RX 6000 discrete GPUs, where they're called Infinity Cache. The only known difference between the two is that the latter is fully on-die, while the former is stacked on top of existing silicon IP. It's being reported now, that "Phoenix" will indeed feature a stacked 3D V-cache.

AMD is planning a massive integrated graphics performance uplift for its next-generation Ryzen 7000U mobile processors. Codenamed "Phoenix," this SoC will feature a CPU based on the "Zen 4" microarchitecture with a higher CPU core count than the Intel alternative of the time; and an iGPU based on the RDNA3 graphics architecture. AMD is planning to endow this with the right combination of a CU count and engine clocks, to result in performance that roughly matches the NVIDIA GeForce RTX 3060 Laptop GPU, a popular performance-segment discrete GPU for notebooks, according to greymon55. Other highlights of "Phoenix" include a DDR5 + LPDDR5 memory interface, and PCI-Express Gen 5. The SoC is expected to be built on the TSMC N5 (5 nm) process, and debut in 2023.

AMD has confirmed its revamped APU strategy will be delivered throughout three different APU line-ups come 2023. While Raphael will take care of AMD's hopes in the desktop space, the company is readying a new, "Dragon Range" lineup of "pinnacle gaming"-oriented APUs, leveraging the company's upcoming Zen 4 architecture, DDR5, and PCIe 5. Dragon Range APUs will feature the "highest core, thread, and cache ever for a mobile gaming CPU" - although AMD stopped just short of confirming exactly what "highest" translates to. To aid in its extreme gaming aspirations, TDP for Dragon Range is set at 55 W - they thus "largely exist in the space where gaming laptops are plugged in the majority of the time," according to AMD director of technical marketing Robert Hallock.

Another APU family, Phoenix, will be aimed at thin and lights with a penchant for gaming. Phoenix too will leverage AMD's Zen 4 core, DDR5 memory subsystem, and PCIe 5 interfaces. Being aimed at thin and lights, Phoenix APUs are set for a 35 W - 45 W operating range. Interestingly, AMD didn't share any other details - more crucially, the graphics architecture that's to be employed in these high-performance APUs.