SK hynix Inc. announced today that it has shipped the samples of 12-layer HBM4, a new ultra-high performance DRAM for AI, to major customers for the first time in the world. The samples were delivered ahead of schedule based on SK hynix's technological edge and production experience that have led the HBM market, and the company is to start the certification process for the customers. SK hynix aims to complete preparations for mass production of 12-layer HBM4 products within the second half of the year, strengthening its position in the next-generation AI memory market.

The 12-layer HBM4 provided as samples this time feature the industry's best capacity and speed which are essential for AI memory products. The product has implemented bandwidth capable of processing more than 2 TB (terabytes) of data per second for the first time. This translates to processing data equivalent to more than 400 full-HD movies (5 GB each) in a second, which is more than 60 percent faster than the previous generation, HBM3E.

SK hynix Inc. announced today that it will participate in the GTC 2025, a global AI conference taking place March 17-21 in San Jose, California, with a booth titled "Memory, Powering AI and Tomorrow". The company will present HBM and other memory products for AI data centers and on-device and memory solutions for automotive business essential for AI era.

Among the industry-leading AI memory technology to be displayed at the show are 12-high HBM3E and SOCAMM (Small Outline Compression Attached Memory Module), a new memory standard for AI servers.

TrendForce's latest research reveals that the NAND Flash market faced downward pressure in 4Q24 as PC and smartphone manufacturers continued inventory clearance efforts, leading to significant supply chain adjustments. Consequently, NAND Flash prices reversed downward, with ASP dropping 4% QoQ, while overall bit shipments declined by 2%. Total industry revenue fell 6.2% QoQ to US$16.52 billion.

Looking ahead to 1Q25, the traditional slow season effect remains unavoidable despite suppliers actively reducing production. Server and other key end-market inventory restocking has slowed, and with both order volumes and contract prices declining sharply. NAND Flash industry revenue is expected to drop by up to 20% QoQ. However, as production cuts take effect and prices stabilize, the NAND Flash market is expected to recover in the second half of 2025.

TrendForce's latest research reveals that global DRAM industry revenue surpassed US$28 billion in 4Q24, marking a 9.9% QoQ increase. This growth was primarily driven by rising contract prices for server DDR5 and concentrated shipments of HBM, leading to continued revenue expansion for the top three DRAM suppliers.

Most contract prices across applications were seen to have reversed downward. However, increased procurement of high-capacity server DDR5 by major American CSPs helped sustain price momentum for server DRAM.

Almost five years ago, SK hynix announced a planned $9 billion acquisition of Intel's NAND flash memory and storage business. The semiconductor giant's takeover process has been a gradual affair; the first phase was complete by the end of 2021, with Asian governing bodies—just before Christmas—giving clearance to absorb Chinese facilities. Within this time frame, the South Korean giant pulled in Team Blue's SSD NAND design and R&D departments—thus establishing the "Solidigm" entity. According to a new Businesskorea report, SK hynix is about to pay off a final installment; allegedly $2.235 billion.

Industry insiders believe that SK hynix's takeover of Intel NAND and storage properties will be completed by next month. This (rumored) March time fortification will place SK hynix in direct competition with a nearby rival: Samsung. Businesskorea believes that recent expansions signal a "competitive edge"—targeting increased demand for enterprise SSD products. Google and Meta are reportedly engaged in widespread upgrading of data center facilities. The local publication reckons that: "SK Hynix plans to capitalize on this trend by strengthening its position in the market and leveraging AI to drive innovation and growth." The aforementioned absorption of Intel intellectual property (IP) plus R&D resources is viewed as a crucial move in reinforcing an already solid foundation.

Inside sources—familiar with goings-ons at leading DRAM manufacturing firms—have predicted the end of DDR3 and DDR4 production lines. According to a DigiTimes Asia report (citing Nikkei), industry observers have noticed that the DRAM market is undergoing a so-called "shift." They believe that pricing trends are decreasing due to weak demand. Samsung Electronics, SK Hynix, and Micron are named as major players; allegedly involved in devising new strategies—in reaction to fluid market circumstances. The DigiTimes insider network proposes that the big three: "may phase out DDR3 and DDR4 by 2025...by the end of 2025...anticipating a future focused on advanced memory technologies." Older standards are falling out of favor, with DDR5 and high-bandwidth memory (HBM) on the ascent. Industry watchdogs reckon that possible DDR3 and DDR4 supply shortages could occur "post-summer 2025."

Taiwan's Nanya Technology has predicted that the overall DRAM market will "bottom out" within the first half of 2025. An eventual recovery is envisioned by the second quarter; AI-related demands could help drive up demand by a large margin. Additionally, Nanya points to improved inventory management and global economic stimulus. Taiwanese DRAM production houses are expected to pick up some slack, but an unnamed "key component distributor" anticipates serious after-effects. An anonymous source believes that the: "anticipated halt in production could lead to significant supply constraints, challenging market dynamics and impacting pricing strategies." Nanya Technology and Winbond Electronics produce specialized DRAM-types; therefore are not touted to be great gap fillers. The latter is reportedly reacting to weak demand for "mature" DDR products—DigiTimes commented on this development: "Winbond Electronics is advancing its manufacturing by transitioning to a 16 nm process in the latter half of 2025. This upgrade from the current 20 nm process, primarily used for 4 Gb DDR3 and DDR4, will enable Winbond to produce 8 Gb DDR memory."

NVIDIA and its memory partners, SK Hynix, Samsung, and Micron, are preparing a new memory form factor called System on Chip Advanced Memory Module—SOCAMM shortly. This technology, adapting to the now well-known CAMM memory module standard, aims to bring additional memory density to NVIDIA systems. Taking inspiration from NVIDIA's Project DIGITS, it has now been developed independently by NVIDIA outside of any official memory consortium like JEDEC. Utilizing a detachable module design, SOCAMM delivers superior specifications compared to existing solutions, featuring 694 I/O ports (versus LPCAMM's 644 and traditional DRAM's 260), direct LPDDR5X memory substrate integration, and a more compact form factor.

For reference, current-generation Project DIGITS is using NVIDIA GB10 Grace Blackwell Superchip capable of delivering one PetaFLOP of FP4 compute, paired with 128 GB of LPDDR5X memory. This configuration limits the size of AI models that run locally on the device, resulting in up to 200 billion parameter models running on a single Project DIGITS AI PC. Two stacked Project DIGITS PCs are needed for models like Llama 3.1 405B with 405 billion parameters. Most interestingly, memory capacity is the primary limiting factor; hence, NVIDIA devotes its time to developing a more memory-dense SOCAMM standard. Being a replacement compatible with LPDDR5, it can use the same controller silicon IP with only the SoC substrate being modified to fit the new memory. With NVIDIA rumored to enter the consumer PC market this year, we could also see an early implementation in consumer PC products, but the next-generation Project DIGITS is the primary target.

V-COLOR Technology Inc. proudly introduces the groundbreaking CKD SCC (Speed Booster, Colorful Makeover and Cost effective) O CUDIMM RGB Filler Kit 2+2 (2 DRAM Modules + 2 Filler Modules) additions to its DDR5 memory lineup, redefining high-performance and customization. With the launch of the new SCC O CUDIMM RGB Filler Kit now compatible with Intel Core Ultra CPUs Motherboards 800 series up to 8800 MT/s and not only that, the already existent SCC UDIMM kit just got a massive upgrade now reaching 8000 MT/s with dual profiles for Intel XMP 3.0 and AMD EXPO. This new SCC line will be under the family of the already amazing XFinity series that continues to push the boundaries of memory innovation.

The latest CKD SCC O CUDIMM is optimized for Intel Core Ultra CPUs and Z890 series motherboards, offering unmatched performance and stability. With speeds reaching 8000 MT/s ~ 8200 MT/s for 32 GB (2x 16 GB) configurations and 7000 MT/s ~ 8800 MT/s for 48 GB (2x 24 GB) configurations. The latest lineup of SCC technology doesn't just revolutionize the new O CUDIMM memory modules; it also pushes the boundaries of already existing UDIMMs to unprecedented levels. Speeds now reach an impressive 7200 MT/s up to 8000 MT/s, while the addition of dual profiles ensures seamless compatibility and performance optimization for both AMD EXPO and Intel XMP 3.0 systems. This development bridges accessibility across platforms, offering next-level performance for enthusiasts and professionals alike.

SK hynix Inc. announced today that it has acquired TISAX, the global automobile industry information security certification, for the first time in the memory industry. SK hynix has obtained TISAX for all domestic sites located in Icheon, Bundang and Cheongju, and has been internationally accepted for the security capabilities required by the global automobile industry. Through this, the company aims to accelerate the development of high-performance memory solutions essential for realizing AI-based future automobile technology.

With the expansion of the electric vehicle market, autonomous driving, and the development of connected car technology, the importance of electronic parts is growing rapidly. In line with these changes, automotive semiconductors, which are widely used in electric equipment, are positioned as major components of automobiles. In particular, automotive semiconductors are applied to key safety systems of automobiles such as ADAS, brake systems and engine control, requiring a higher level of reliability than general semiconductors. In addition, as hacking and malicious code attacks targeting automobiles have increased recently, systematic security management in the manufacturing process is being emphasized as well as strengthening the performance of semiconductors themselves.

Yangtze Memory Technologies Co. has begun shipping its fifth-generation 3D NAND memory chips, featuring 294 total layers and 232 active layers, according to an analysis from TechInsights. The new chips achieve bit density near 20 Gb per square millimeter (19.8 Gb/mm²), comparable to current offerings from SK Hynix and approaching Kioxia/Western Digital's latest products. YMTC's design uses hybrid bonding to connect the memory array with logic components, suggesting that Chinese memory makers are up to speed on the packaging standards that their non-sanctioned competitors use. The company has opted for a quiet release without formal announcements, a departure from typical industry practice. This low-key approach may be related to ongoing US trade restrictions on Chinese semiconductor companies.

While not setting records for active layers, SK Hynix's upcoming 321-layer chip leads in that metric, and YMTC's achievement in total layer count demonstrates continued technical progress. The chip uses string stacking technology, though the specific configuration of the layer arrays remains unclear. Other specifications show the new chip employs YMTC's Xtacking 4.0 architecture and triple-level cell (TLC) design. This matches major competitors' architecture type, though detailed performance metrics such as interface speeds have not been disclosed. The 5th generation NAND focuses on getting density on the right track. However, we expect YMTC to continue development at the same speed, match SK Hynix with 321-layer chips, and surpass it with Xtacking 5.0 in the near future.

SK hynix Inc. announced today that it recorded best-ever yearly performance with 66.1930 trillion won in revenues, 23.4673 trillion won in operating profit (with an operating margin of 35%), and 19.7969 trillion won in net profit (with a net margin of 30%). Yearly revenues marked all-time high, exceeding the previous record in 2022 by over 21 trillion won and operating profit exceeded the record in 2018 during the semiconductor super boom.

In particular, fourth quarter revenues went up by 12% to 19.7670 trillion won, operating profit up 15% to 8.0828 trillion won (with an operating margin of 41%) from the previous quarter and net profit recorded 8.0065 trillion won (with a net margin of 41%). SK hynix emphasized that with prolonged strong demand for AI memory, the company achieved all-time high result through world-leading HBM technology and profitability-oriented operation. HBM continued its high growth in fourth quarter marking over 40% of total DRAM revenue and eSSD also showed constant increase in sales. With remarkable product competitiveness based profitability-oriented operation, the company established a stable financial condition which led to improved outcome.

TrendForce's latest research report highlights that the NAND Flash industry will continue to face dual pressure from weak demand and oversupply in 2025. In response, manufacturers including Micron, Kioxia/SanDisk, Samsung, and SK hynix/Solidigm have similar plans to cut production—a move that could accelerate industry consolidation in the long term.

TrendForce reports that NAND Flash manufacturers are primarily implementing production cuts by lowering utilization rates and delaying process upgrades. These actions are driven by three major factors:

SK hynix has sped up its HBM4 development plans, according to a report from ZDNet. The company wants to start shipping HBM4 samples to NVIDIA this June, which is earlier than the original timeline. SK hynix hopes to start supplying products by the end of Q3 2025, this push likely aims to get a head start in the next-gen HBM market. To meet this sped-up schedule, SK hynix has set up a special HBM4 development team to supply NVIDIA. Industry sources indicated on January 15th that SK Hynix plans to deliver its first customer samples of HBM4 in early June this year. The company hit a big milestone when it wrapped up the HBM4 tapeout in Q4 2024, the last design step.

HBM4 marks the sixth iteration of high-bandwidth memory tech using stacked DRAM architecture. It comes after HBM3E, the current fifth-gen version, with large-scale production likely to kick off in late 2025 at the earliest. HBM4 boasts a big leap forward doubling data transfer ability with 2,048 I/O channels up from its forerunner. NVIDIA planned to use 12-layer stacked HBM4 in its 2026 "Rubin" line of powerful GPUs. However, NVIDIA has moved up its timeline for "Rubin" aiming to launch in late 2025.

JEDEC Solid State Technology Association, the global leader in the development of standards for the microelectronics industry, today announced the publication of JESD220G: Universal Flash Storage 4.1. In addition, an update to the complementary JESD223F UFS Host Controller Interface (UFSHCI) version 4.1 standard has also been published. Developed for mobile applications and computing systems requiring high performance with low power consumption, UFS 4.1 offers faster data access and improved performance over the earlier version of the standard while maintaining hardware compatibility to UFS 4.0. Both standards are available for download from the JEDEC website.

"JEDEC members are continually innovating to shape the standards that will drive the next generation of mobile devices and advanced applications, and the committee's dedication to ongoing improvements to the UFS series is paving the way for future innovation," said Mian Quddus, Chairman of the JEDEC Board of Directors and the JC-64 Committee for Embedded Memory Storage and Removable Memory Cards.

SK hynix has returned to Las Vegas for Consumer Electronics Show (CES) 2025, showcasing its latest AI memory innovations reshaping the industry. Held from January 7-10, CES 2025 brings together the brightest minds and groundbreaking technologies from the world's leading tech companies. This year, the event's theme is "Dive In," inviting attendees to immerse themselves in the next wave of technological advancement. SK hynix is emphasizing how it is driving this wave through a display of leading AI memory technologies at the SK Group exhibit. Along with SK Telecom, SKC, and SK Enmove, the company is highlighting how the Group's AI infrastructure brings about true change under the theme "Innovative AI, Sustainable Tomorrow."

Groundbreaking Memory Tech Driving Change in the AI Era
Visitors enter SK Group's exhibit through the Innovation Gate, greeted by a video of dynamic wave-inspired visuals which symbolize the power of AI. The video shows the transformation of binary data into a wave which flows through the exhibition, highlighting how data and AI drives change across industries. Continuing deeper into the exhibit, attendees make their way into the AI Data Center area, the focal point of SK hynix's display. This area features the company's transformative memory products driving progress in the AI era. Among the cutting-edge AI memory technologies on display are SK hynix's HBM, server DRAM, eSSD, CXL, and PIM products.

SK hynix Inc. announced today that it will showcase its innovative AI memory technologies at CES 2025, to be held in Las Vegas from January 7 to 10 (local time). A large number of C-level executives, including CEO Kwak No-jung, CMO (Chief Marketing Officer) Justin Kim and Chief Development Officer (CDO) Ahn Hyun, will attend the event. "We will broadly introduce solutions optimized for on-device AI and next-generation AI memories, as well as representative AI memory products such as HBM and eSSD at this CES," said Justin Kim. "Through this, we will publicize our technological competitiveness to prepare for the future as a Full Stack AI Memory Provider."

SK hynix will also run a joint exhibition booth with SK Telecom, SKC and SK Enmove, under the theme "Innovative AI, Sustainable Tomorrow." The booth will showcase how SK Group's AI infrastructure and services are transforming the world, represented in waves of light. SK hynix, which is the world's first to produce 12-layer HBM products for 5th generation and supply them to customers, will showcase samples of HBM3E 16-layer products, which were officially developed in November last year. This product uses the advanced MR-MUF process to achieve the industry's highest 16-layer configuration while controlling chip warpage and maximizing heat dissipation performance.

Colorful Technology Company Limited, a leading brand in gaming PC components, gaming laptops, and Hi-fi audio products, introduces the iGame Shadow Series performance DDR5 memory. The iGame Shadow DDR5 memory features an artistic heatsink design inspired by Chinese ink wash paintings. The memory does come with ARGB lighting that can synchronize with the rest of your build via the iGame Center software.

iGame Shadow DDR5 Series memory is aesthetic and built for performance. The iGame Shadow is available in a wide range of specifications from DDR5-6000 CL28 to extreme-performance DDR5-8400 CL42, designed to meet the performance demands of mainstream and high-end flagship motherboard users. The memory uses high-quality SK Hynix M-die, known for performance ideal for overclocking. The iGame Shadow memory features aluminium alloy heatsink designed to optimize heat dissipation.

SK hynix Inc. announced today that it has completed development of its high-capacity SSD product, PS1012 U.2, designed for AI data centers. As the era of AI accelerates, the demand for high-performance enterprise SSDs (eSSD) is rapidly increasing, and QLC technology, which enables high capacity, has become the industry standard. In line with this trend, SK hynix has developed a 61 TB product using this technology and introduced it to the market.

SK hynix has been leading the SSD market for AI data centers with Solidigm, a subsidiary which commercialized QLC-based eSSD for the first time in the world. With the development of PS1012, the company expects to build a balanced SSD portfolio, thereby maximizing synergy between the two companies. With the latest 5th generation (Gen 5) PCIe, PS1012 doubles its bandwidth compared to 4th generation based products. As a result, the data transfer speed reaches 32 GT/s (Gig-transfers per second), with the sequential read performance of 13 GB/s (Gigabyte per second), which is twice that of previous generation products.

Lexar late last week introduced the ARES DDR5-6000 CL26 memory kit. The kit is optimized for AMD Ryzen platforms, such as the recently launched Ryzen 7 9800X3D. It comes with an AMD EXPO profile for DDR5-6000 and tight timings, including a CAS latency of 26, or 55 ns. It also includes an Intel XMP 3.0 profile that enables the same timings. Typical DDR5-6000 kits tend to come with a CL of 30. Under the hood, the kit uses SK Hynix A-die DRAM chips, and a 10-layer PCB. The module features thermal pads for not just the DRAM chips, but also the PMIC. These transfer heat to a 1.8 mm-thick aluminium heatspreader that's crowned by a silicone diffuser for the module's lighting setup that consists of eight ARGB LEDs, with 13 lighting presets. The module comes in two color options—silver and black. The company didn't reveal pricing or availability information.

Although it was revealed back in March this year, SK hynix new Platinum P51 PCIe 5.0 has only just now launched in South Korea and the specs have been boosted since March. The official sequential read speed is now rated at 14.7 GB/s vs. 13.5 GB/s in March and likewise, the sequential write speed has increased to 13.4 GB/s from 11.5 GB/s. We're also looking at a random IOPS read speed of up to 2,300k and random write IOPS of up to 2,400k. This compares really favourably compared to Phison E26 based SSDs, especially the random IOPS are very impressive.

However, it's not all good news, as the endurance tops out at 1200 TBW on the 2 TB SKU, which is pretty much what every other modern SSD offers today and somewhat disappointing considering that we're looking at SK hynix 238 layer 3D TLC NAND here. The 2 TB SKU is also the largest size available for now and the Platinum P51 will also come in 1 TB and 500 GB flavours. Another not so great, is the 10 W power consumption, even though SK hynix claims it's industry leading, but we know that this isn't true, as the Silicon Motion SM2508 controller is more power efficient than that. The drive has already been quickly benchmarked by South Korean hardware site Quasar Zone and it delivers in terms of the claimed speeds from the manufacturer, at least according to the CrystalDiskMark numbers. No pricing has tipped up as yet, so we'll have to wait to see how competitive the drive will be in an already crowded market. However, it's worth keeping in mind that SK hynix tends to charge a premium for its SSDs over many of its competitors.

Update Dec 14th: The 2 TB SKU has a retail price of 473,000 Korean Won, which equals about US$330, making it prohibitively expensive at the moment, even compared to most other PCIe 5.0 SSDs on the market. The 1 TB SKU comes in at 279,000 Korean Won, or about US$195. The Korean prices include 10% VAT/sales tax.

Marvell Technology, Inc. (NASDAQ: MRVL), a leader in data infrastructure semiconductor solutions, today announced that it has pioneered a new custom HBM compute architecture that enables XPUs to achieve greater compute and memory density. The new technology is available to all of its custom silicon customers to improve the performance, efficiency and TCO of their custom XPUs. Marvell is collaborating with its cloud customers and leading HBM manufacturers, Micron, Samsung Electronics, and SK hynix to define and develop custom HBM solutions for next-generation XPUs.

HBM is a critical component integrated within the XPU using advanced 2.5D packaging technology and high-speed industry-standard interfaces. However, the scaling of XPUs is limited by the current standard interface-based architecture. The new Marvell custom HBM compute architecture introduces tailored interfaces to optimize performance, power, die size, and cost for specific XPU designs. This approach considers the compute silicon, HBM stacks, and packaging. By customizing the HBM memory subsystem, including the stack itself, Marvell is advancing customization in cloud data center infrastructure. Marvell is collaborating with major HBM makers to implement this new architecture and meet cloud data center operators' needs.

Marvell Technology, Inc., a leader in data infrastructure semiconductor solutions, today announced that it has pioneered a new custom HBM compute architecture that enables XPUs to achieve greater compute and memory density. The new technology is available to all of its custom silicon customers to improve the performance, efficiency and TCO of their custom XPUs. Marvell is collaborating with its cloud customers and leading HBM manufacturers, Micron, Samsung Electronics, and SK hynix to define and develop custom HBM solutions for next-generation XPUs.

HBM is a critical component integrated within the XPU using advanced 2.5D packaging technology and high-speed industry-standard interfaces. However, the scaling of XPUs is limited by the current standard interface-based architecture. The new Marvell custom HBM compute architecture introduces tailored interfaces to optimize performance, power, die size, and cost for specific XPU designs. This approach considers the compute silicon, HBM stacks, and packaging. By customizing the HBM memory subsystem, including the stack itself, Marvell is advancing customization in cloud data center infrastructure. Marvell is collaborating with major HBM makers to implement this new architecture and meet cloud data center operators' needs.

SK Hynix plans to produce its 6th generation high-bandwidth memory chips (HBM4) using TSMC's 3 nm process, a change from initial plans to use the 5 nm technology. The Korea Economic Daily reports that these chips will be delivered to NVIDIA in the second half of 2025. NVIDIA's GPU products are currently based on 4 nm HBM chips. The HBM4 prototype chip launched in March by SK Hynix features vertical stacking on a 3 nm die., compared to a 5 nm base die, the new 3 nm-based HBM chip is expected to offer a 20-30% performance improvement. However, SK Hynix's general-purpose HBM4 and HBM4E chips will continue to use the 12 nm process in collaboration with TSMC.

While SK Hynix's fifth-generation HBM3E chips used its own base die technology, the company has chosen TSMC's 3 nm technology for HBM4. This decision is anticipated to significantly widen the performance gap with competitor Samsung Electronics, which plans to manufacture its HBM4 chips using the 4 nm process. SK hynix is currently leading the global HBM market with almost 50% of market share, most of its HBM products been delivered to NVIDIA.

Samsung Electronics and SK hynix are working together to standardize "Low Power Double Data Rate 6 (LPDDR6) - Processing in Memory (PIM)" technology according to a report from Business Korea. This collaboration seeks to accelerate the development of low power memory products. The cooperation is still in its early stage, the companies initial work is focused on registering the standard with the Joint Electron and Device Engineering Council (JEDEC). Discussions are underway to determine technical requirements, specific characteristics of LPDDR with PIM, such as "internal bandwidth"—the data transfer rate within the memory, unlike the "external bandwidth" between the processor and memory in traditional systems. According to a Samsung Electronics representative, the two companies are in the process of developing a timeline for standardization.

This partnership is notable given how Samsung and SK hynix compete in the high-bandwidth memory (HBM) market. SK hynix beat Samsung in profits reporting 7.3 trillion won in the third quarter, while Samsung made 3.86 trillion won. However, the rise of AI with its increased demand for more memory has shaken up the scene pushing for teamwork instead of wasting resources in developing completely different and unstandardized products. Both firms see PIM technology as a way to grow, previous attempts to independently develop PIM products include Samsung's HBM and LPDDR5-PIM and SK hynix's GDDR6-PIM.

TrendForce's latest investigations reveal that the global DRAM industry revenue reached US$26.02 billion in 3Q24, marking a 13.6% QoQ increase. The rise was driven by growing demand for DDR5 and HBM in data centers, despite a decline in LPDDR4 and DDR4 shipments due to inventory reduction by Chinese smartphone brands and capacity expansion by Chinese DRAM suppliers. ASPs continued their upward trend from the previous quarter, with contract prices rising by 8% to 13%, further supported by HBM's displacement of conventional DRAM production.

Looking ahead to 4Q24, TrendForce projects a QoQ increase in overall DRAM bit shipments. However, the capacity constraints caused by HBM production are expected to have a weaker-than-anticipated impact on pricing. Additionally, capacity expansions by Chinese suppliers may prompt PC OEMs and smartphone brands to aggressively deplete inventory to secure lower-priced DRAM products. As a result, contract prices for conventional DRAM and blended prices for conventional DRAM and HBM are expected to decline.