As the US works to bring more semiconductor manufacturing back home, the machines needed to turn silicon into the world's most advanced processors are becoming pricier and harder to get, thanks to tariffs. Foundries building new fabs report that the specialized equipment they rely on, everything from extreme ultraviolet (EUV) lithography steppers to chemical vapor deposition chambers, carries a roughly 15% premium compared with similar gear sold overseas. Several forces are at play. The raw materials, high‑grade quartz for vacuum enclosures, and exotic metal alloys for precision optics have climbed in price. At the same time, key components like ultra‑accurate motion stages and alignment sensors are in short supply, sometimes stretching lead times for critical subsystems well beyond 18 months. For a fab racing to move from a 7 nm to a 5 nm process, those delays can mean missing tight ramp‑up targets and pushing out product launches.

Smaller chipmakers feel the squeeze the hardest. With fewer orders to negotiate volume discounts, second‑tier foundries may see their capital budgets balloon by 20 percent or more. In response, some are taking a mixed approach, sourcing commoditized tools such as oxidation furnaces and rapid thermal processors from multiple suppliers while reserving single‑vendor deals for high‑stakes systems like EUV scanners. Government support through the CHIPS Act offers a partial safety net, helping to subsidize capital expenditures. Yet even with grants and tax credits, the challenges will remain. Success will hinge on tight coordination between fabs, equipment makers, and policymakers to tame rising costs, shorten delivery schedules, and keep America's chip renaissance on track.

Samsung's foundry business seems to be busying itself with the rumored refinement of a 2 nm GAA (SF2) manufacturing node process—for possible mass production by the end of 2025, but company leadership will very likely be considering longer term goals. Mid-way through last month, industry moles posited that the megacorporation's semiconductor branch was questioning the future of a further out 1.4 nm (SF1.4) production line. Officially published roadmaps have this advanced technology rolling out by 2027. Despite present day "turmoil," insiders believe that a new team has been established—tasked with the creation of a so-called "dream semiconductor process." According to a fresh Sedaily news article, this fledgling department has started development of a 1 nm foundry process.

Anonymous sources claim that Samsung executives are keeping a watchful eye on a main competitor—as stated in the latest South Korean report: "there is a realistic gap with Taiwan's TSMC in technologies that are close to mass production, such as the 2 nm process, the company plans to speed up the development of the 1 nm process, a future technology, to create an opportunity for a turnaround." A portion of the alleged "1 nm development chip team" reportedly consists of veteran researchers from prior-gen projects. Semiconductor industry watchdogs theorize that a canceled SF1.4 line could be replaced by an even more advanced process. Sedaily outlined necessary hardware upgrades: "the 1.0 nanometer process requires a new technology concept that breaks the mold of existing designs as well as the introduction of next-generation equipment such as high-NA EUV exposure equipment. The company is targeting mass production after 2029." Samsung's current Advanced Technology Roadmap does not extend beyond 2027—inside sources claim that the decision to roll with 1.0 nm was made at some point last month.

This week, IBM and Tokyo Electron (TEL) announced an extension of their agreement for the joint research and development of advanced semiconductor technologies. The new 5-year agreement will focus on the continued advancement of technology for next-generation semiconductor nodes and architectures to power the age of generative AI. This agreement builds on a more than two-decade partnership between IBM and TEL for joint research and development. Previously, the two companies have achieved several breakthroughs, including the development of a new laser debonding process for producing 300 mm silicon chip wafers for 3D chip stacking technology.

Now, bringing together IBM's expertise in semiconductor process integration and TEL's leading-edge equipment, they will explore technology for smaller nodes and chiplet architectures to achieve the performance and energy efficiency requirements for the future of generative AI. "The work IBM and TEL have done together over the last 20 years has helped to push the semiconductor technology innovation to provide many generations of chip performance and energy efficiency to the semiconductor industry," said Mukesh Khare, GM of IBM Semiconductors and VP of Hybrid Cloud, IBM. "We are thrilled to be continuing our work together at this critical time to accelerate chip innovations that can fuel the era of generative AI."

Yesterday, United States President Donald Trump announced a set of tariffs imposed on US trading partners, imposing a series of 10%+ tariffs on partners, calling it a "Liberation Day." Today, we are calculating how much these tariffs will impact consumers and what is most important at TechPowerUp: semiconductors powering our GPUs and CPUs. According to one of the top investment banks, Goldman Sachs, semiconductors are exempt from the reciprocal tariffs that Trump has imposed on Taiwan. However, the semiconductor manufacturing equipment used by makers like TSMC is not exempt and is expected to be hit with the 32% tariffs. This is only half of what Taiwan imposes on imports of US-made goods. For TSMC, the number one maker of GPUs and CPUs, tariffs can be tricky to navigate. While its existing manufacturing facilities use equipment sourced from Dutch ASML and a few US companies like Lam Research and KLA Corporation, it shouldn't be a problem to ship new silicon to the US.

However, if TSMC wants to expand its manufacturing facilities in any country that is not the US, it will have to deal with 32% tariffs on US-sourced silicon manufacturing equipment. For EU-based ASML, things are looking a little different. If over 20% of the equipment is made up of US content, a tariff exemption might apply, potentially reducing import costs. If more than one-fifth of a product's components or value originates from US sources, the equipment may be eligible for tariff relief. ASML's machines include some US components, so determining whether these machines meet the 20% threshold is crucial. If they do, the tariff exemption could help lower costs associated with importing these advanced machines, reaching up to $380 million. For non-US-injected goods, EU entities are subject to 20% tariffs.

Rapidus Corporation today announced that its plans and budget for fiscal year 2025 have been approved by Japan's New Energy and Industrial Technology Development Organization (NEDO). The approval covers two commissioned projects under NEDO's "Post-5G Information and Communication Systems Infrastructure Enhancement R&D Project / Development of Advanced Semiconductor Manufacturing Technology (Commissioned)." These projects are the "Research and Development of 2 nm-Generation Semiconductor Integration Technology and short TAT (turnaround time) Manufacturing Technology Based on Japan-U.S. Collaboration" and "Development of Chiplet, Package Design and Manufacturing Technology for 2 nm-Generation Semiconductors."

The first of these projects, focused on front-end processes, was launched in November 2022 as part of Japan's next-generation semiconductor R&D effort. Under this program, Rapidus has continued construction of the Innovative Integration for Manufacturing (IIM) facility in Chitose, Hokkaido, which will serve as its production base. It also sent engineers to IBM in the U.S. to jointly develop 2 nm logic semiconductor mass production technologies and continued to achieve target performance as planned. Furthermore, Rapidus has installed EUV lithography and other production equipment at the IIM facility, and started cleanroom operation. As a result of these efforts, the company achieved its performance targets for FY2024.

Ayar Labs, the leader in optical interconnect solutions for large-scale AI workloads, today announced the industry's first Universal Chiplet Interconnect Express (UCIe) optical interconnect chiplet to maximize AI infrastructure performance and efficiency while reducing latency and power consumption. By incorporating a UCIe electrical interface, this solution is designed to eliminate data bottlenecks and integrate easily into customer chip designs.

Capable of achieving 8 Tbps bandwidth, the TeraPHY optical I/O chiplet is powered by Ayar Labs' 16-wavelength SuperNova light source. The integration of a UCIe interface means this solution not only delivers high performance and efficiency but also enables interoperability among chiplets from different vendors. This compatibility with the UCIe standard creates a more accessible, cost-effective ecosystem, which streamlines the adoption of advanced optical technologies necessary for scaling AI workloads and overcoming the limitations of traditional copper interconnects.

According to a report produced by semiconductor industry analysts at Kiwoom Securities—a South Korean financial services firm—Semiconductor Manufacturing International Corporation (SMIC) is expected to complete the development of a 5 nm process at some point in 2025. Jukanlosreve summarized this projection in a recent social media post. SMIC is often considered to be China's flagship foundry business; the partially state-owned organization seems to heavily involved in the production of (rumored) next-gen Huawei Ascend 910 AI accelerators. SMIC foundry employees have reportedly struggled to break beyond a 7 nm manufacturing barrier, due to lack of readily accessible cutting-edge EUV equipment. As covered on TechPowerUp last month, leading lights within China's semiconductor industry are (allegedly) developing lithography solutions for cutting-edge 5 nm and 3 nm wafer production.

Huawei is reportedly evaluating an in-house developed laser-induced discharge plasma (LDP)-based machine, but finalized equipment will not be ready until 2026—at least for mass production purposes. Jukanlosreve's short interpretation of Kiwoom's report reads as follows: (SMIC) achieved mass production of the 7 nm (N+2) process without EUV and completed the development of the 5 nm process to support the mass production of the Huawei Ascend 910C. The cost of SMIC's 5 nm process is 40-50% higher than TSMC's, and its yield is roughly one-third." The nation's foundries are reliant on older ASML equipment, thus are unable to produce products that can compete with the advanced (volume and quality) output of "global" TSMC and Samsung chip manufacturing facilities. The fresh unveiling of SiCarrier's Color Mountain series has signalled a promising new era for China's foundry industry.

Yield Engineering Systems, Inc. (YES), a global leader in materials and interface engineering equipment solutions, proudly announces the shipment of the first commercial VeroTherm Formic Acid Reflow tool to a leading global semiconductor manufacturer from its Sulur, Coimbatore, manufacturing facility. This landmark achievement signifies a pivotal moment for YES and the burgeoning semiconductor ecosystem in India, as it represents the first equipment produced in India for advanced semiconductor applications like High Bandwidth Memory (HBM), which is critical for AI and High-Performance Computing (HPC) applications worldwide.

YES commenced operations in September 2024 at this state-of-the-art manufacturing facility in Sulur, Coimbatore, India, located at 96/3 Vadakku Sambala Thottam, Trichy Road, Kannampalayam, Sulur Taluk. This facility is integral to YES's strategic expansion plan, aimed at serving its global customers' operations in India and the world with greater efficiency.

Global fab equipment spending for front-end facilities in 2025 is anticipated to increase by 2% year-over-year (YoY) to $110 billion, marking the sixth consecutive year of growth since 2020, SEMI announced today in its latest quarterly World Fab Forecast report.

Fab equipment spending is projected to rise by 18% in the following year, reaching $130 billion. This growth in investment is driven not only by demand in the high-performance computing (HPC) and memory sectors to support data center expansions, but also by the increasing integration of artificial intelligence (AI), which is driving up the silicon content required for edge devices.

Rapidus Corporation, a manufacturer of advanced logic semiconductors, today announced that it signed a Memorandum of Cooperation with Quest Global Services PTE. Ltd. As part of the agreement, Rapidus will become Quest Global's new semiconductor foundry partner, enabling it to provide a wide range of solutions to its customers. Quest Global customers will be able to leverage Rapidus' 2 nm gate-all-around (GAA) manufacturing process to develop engineering design and manufacturing solutions that will support growing industry demand for low-power artificial intelligence (AI) semiconductors. Together, the two companies will deliver transformational silicon solutions as a virtual integrated device manufacturer (IDM) model for fabless companies.

The AI semiconductor industry is in its early stages, with applications just beginning to emerge and new entrants quickly coming to market. Customers will shift from general-purpose AI semiconductors to dedicated designs that reduce power consumption and maximize performance. To support these industry requirements, customers will engage design firms focused on providing custom solutions, such as Quest Global, while also collaborating with semiconductor foundries, like Rapidus, that can manufacture dedicated semiconductors with a short turnaround time.

Seeking to explore semiconductor policy measures that can strengthen the industrial policy in the European Union, SEMI and the European Semiconductor Industry Association (ESIA) have successfully held a high-level roundtable event in the European Parliament under the auspices of Members of the European Parliament (MEPs) Bart Groothuis (Renew Europe), Oliver Schenk (European People's Party) and Dan Nica (Socialists and Democrats Party).

The 2023 European Chips Act marked an important milestone for Europe's semiconductor industry and overall industrial ecosystem, providing concrete measures to enhance competitiveness and technological capabilities. In order to build on the success of the Chips Act, after the roundtable, MEPs signed a joint declaration to the European Commission's Executive Vice President for Tech Sovereignty, Security and Democracy, Henna Virkkunen, calling for an ambitious follow-up to the Chips Act that adds new research and development (R&D) funds, attracts new investments, and increases European competitiveness.

Vietnam's government has approved its first wafer fab facility, with an investment of 12.8 trillion VND (approximately $500 million). The first phase of the facility, scheduled for completion by 2030, is designed to manufacture specialized chips for defense, AI, and other high-tech applications. The project will receive government backing through direct funding—covering up to 30% of the total investment, capped at 10 trillion VND—and tax incentives. A special steering committee headed by the Prime Minister has been tasked with overseeing the project's execution and resource allocation. The new fab is a critical component of Vietnam's long-term semiconductor strategy, a phased approach toward building a domestic ecosystem for chip design, manufacturing, and testing. The current investment is modest compared to the typical costs of advanced wafer fabs, which can reach up to $50 billion.

Nonetheless, the project is a foundational, one-step-at-the-time move intended to spur further investments and technology transfer. Vietnamese officials have reportedly engaged in discussions with major international chip manufacturers—including US, South Korea, and Taiwan entities, such as GlobalFoundries and Powerchip Semiconductor Manufacturing Corp—to explore potential collaborative opportunities. Vietnam already hosts 174 semiconductor-related projects, predominantly focused on chip packaging and testing, in which global companies like Intel and Amkor have established significant operations. The second phase, from 2030-2040, envisions Vietnam emerging as a worldwide center for electronics and semiconductors. By expanding to at least 200 design companies, establishing two semiconductor chip manufacturing plants, and creating 15 packaging and testing facilities, the country intends to gradually develop independent semiconductor product design and production capabilities.

China's Ministry of Finance has allocated $55 billion (¥398.12 billion) for science and technology funding in 2025, marking a 10% increase from the previous year's $50 billion (¥361.9 billion). This expenditure now stands as the nation's third-largest budget item, following only national defense and debt interest payments. The 2024 allocation achieved a 97.6% implementation rate, indicating effective deployment of resources in the technology sector. The funding prioritizes initiatives under the "Science and Technology Innovation 2030" program, with significant investments targeting semiconductors, artificial intelligence, and quantum computing research. Rather than stimulating immediate breakthroughs, the incremental funding increase aims to strengthen existing projects and enhance technological self-reliance amid global competition.

This strategy shows some fiscal constraints imposed by China's economic slowdown while maintaining the country's long-term technological objectives. Supplementary measures bolster direct R&D investment, including enhanced support for fundamental research and specialized financing mechanisms for technology-focused enterprises. Tax reductions and targeted subsidies form part of a comprehensive policy framework designed to foster domestic innovation capabilities. While the funding increase shows commitment to technological advancement, effective project management and efficient resource allocation will be critical success factors, mainly as China competes more globally. Perhaps the most important milestone for this aid package will be supporting the development of advanced lithography tools to make sure that domestic companies can manufacture cutting-edge silicon.

According to Akira Amari, a Japanese politician and semiconductor industry expert, it's unlikely that the US will ever reach self-sufficiency when it comes to semiconductor production. This has nothing to do with foundries, as the US might manage to be self-sufficient in terms or raw chip production needs, but the country is said to be unlikely to be able to reach a complete supply chain of everything else needed to produce the chips. Countries like Japan, Taiwan, the Netherlands, Belgium, South Korea and more are heavily invested in supplying not only components needed to produce semiconductors, but also machinery and chemicals.

Amari is suggesting that these countries should form a co-operative alliance to help strengthen their supply chains at home, rather than putting all eggs in one basket to try and appease the US. This statement comes after TSMC promised to invest an additional US$100 billion over an unspecified time frame in the US. Time will tell if he's right or not, but it's unlikely that any country will ever be self-sufficient when it comes to making semiconductors, regardless of how big they are or what natural resources they have access to locally.

TrendForce reveals that the combined revenue of the world's top 10 IC design houses reached approximately US$249.8 billion in 2024, marking a 49% YoY increase. The booming AI industry has fueled growth across the semiconductor sector, with NVIDIA leading the charge, posting an astonishing 125% revenue growth, widening its lead over competitors, and solidifying its dominance in the IC industry.

Looking ahead to 2025, advancements in semiconductor manufacturing will further enhance AI computing power, with LLMs continuing to emerge. Open-source models like DeepSeek could lower AI adoption costs, accelerating AI penetration from servers to personal devices. This shift positions edge AI devices as the next major growth driver for the semiconductor industry.

Intel Corporation today announced that its board of directors has appointed Lip-Bu Tan, an accomplished technology leader with deep semiconductor industry experience, as chief executive officer, effective March 18. He succeeds Interim Co-CEOs David Zinsner and Michelle (MJ) Johnston Holthaus. Tan will also rejoin the Intel board of directors after stepping down from the board in August 2024. Zinsner will remain executive vice president and chief financial officer, and Johnston Holthaus will remain CEO of Intel Products. Frank D. Yeary, who took on the role of interim executive chair of the board during the search for a new CEO, will revert to being the independent chair of the board upon Tan becoming CEO.

"Lip-Bu is an exceptional leader whose technology industry expertise, deep relationships across the product and foundry ecosystems, and proven track record of creating shareholder value is exactly what Intel needs in its next CEO," Yeary said. "Throughout his long and distinguished career, he has earned a reputation as an innovator who puts customers at the heart of everything he does, delivers differentiated solutions to win in the market and builds high-performance cultures to achieve success."

ASML Holding N.V. (ASML) and imec, a leading research and innovation hub in nanoelectronics and digital technologies, today announce that they have signed a new strategic partnership agreement, focusing on research and sustainability. The agreement has a duration of five years and aims to deliver valuable solutions in two areas by bringing together ASML's and imec's respective knowledge and expertise. First, to develop solutions that advance the semiconductor industry and second, to develop initiatives focused on sustainable innovation.

The collaboration incorporates ASML's whole product portfolio, with a focus on developing high-end nodes, using ASML systems including 0.55 NA EUV, 0.33 NA EUV, DUV immersion, YieldStar optical metrology and HMI single- and multi-beam technologies. These tools will be installed in imec's state-of-the-art pilot line and incorporated in the EU- and Flemish-funded NanoIC pilot line, providing the most advanced infrastructure for sub-2 nm R&D to the international semiconductor ecosystem. Focus areas for R&D will also include silicon photonics, memory and advanced packaging, offering full stack innovation for future semiconductor-based AI applications in diverse markets.

TrendForce's latest research reveals that the global foundry industry exhibited a polarized trend in 4Q24. Advanced process nodes benefited from strong demand in AI servers, flagship smartphone application processors (APs), and new PC platforms, driving high-value wafer shipments. This growth helped offset the slowdown in mature process demand, allowing the top 10 foundries to achieve nearly 10% QoQ revenue growth, reaching US$38.48 billion, and marking another industry record.

TrendForce notes that new U.S. trade tariffs under the Trump administration have started affecting the foundry industry. A surge in recent orders for TVs, PCs, and notebooks bound for the U.S. in 4Q24 is expected to extend into 1Q25. Additionally, China's consumer subsidy program—introduced in late 2024—has spurred early inventory restocking among upstream customers. Combined with persistent demand for TSMC's AI-related chips and advanced packaging, these factors suggest that despite Q1 being a seasonally weak quarter, foundry revenue will only decline slightly.

When the US imposed sanctions on Chinese semiconductor makers, China began the push for sovereign chipmaking tools. According to a study conducted by the Emerging Technology Observatory (ETO), Chinese institutions have dramatically outpaced their US counterparts in next-generation chipmaking research. Between 2018 and 2023, nearly 475,000 scholarly articles on chip design and fabrication were published worldwide. Chinese research groups contributed 34% of the output—compared to just 15% from the United States and 18% from Europe. The study further emphasizes the quality of China's contributions. Focusing on the top 10% of the most-cited articles, Chinese researchers were responsible for 50% of this high-impact work, while American and European research accounted for only 22% and 17%, respectively.

This trend shows China's lead isn't about numbers only, and suggests that its work is resonating strongly within the global academic community. Key research areas include neuromorphic, optoelectric computing, and, of course, lithography tools. China is operating mainly outside the scope of US export restrictions that have, since 2022, shrunk access to advanced chipmaking equipment—precisely, tools necessary for fabricating chips below the 14 nm process node. Although US sanctions were intended to limit China's access to cutting-edge manufacturing technology, the massive body of Chinese research suggests that these measures might eventually prove less effective, with Chinese institutions continuing to push forward with influential, high-citation studies. However, Chinese theoretical work is yet to be proven in the field, as only a single company currently manufactures 7 nm and 5 nm nodes—SMIC. Chinese semiconductor makers still need more advanced lithography solutions to reach high-volume manufacturing on more advanced nodes like 3 nm and 2 nm to create more powerful domestic chips for AI and HPC.

Semiconductor intellectual property core provider CAST today announced a new IP core that implements the SNOW-V stream cipher algorithm to meet the security and performance demands of modern communication systems. Available now for ASICs or FPGAs, the company believes it to be the first such commercial IP core.

The new SNOW-V Stream Cipher Engine provides a flexible and reusable hardware implementation of the official SNOW-V mechanism as published in 2019 by the IACR Transactions on Symmetric Cryptology. SNOW-V revises the SNOW 3G stream cipher algorithm to help satisfy the high-speed, low-latency security requirements of 5G, 6G, and future mobile networks. The core:

GlobalFoundries (GF) and the Massachusetts Institute of Technology (MIT) today announced a new master research agreement to jointly pursue advancements and innovations for enhancing the performance and efficiency of critical semiconductor technologies. The collaboration will be led by MIT's Microsystems Technology Laboratories (MTL) and GF's research and development team, GF Labs.

With an initial research focus on AI and other applications, the first projects are expected to leverage GF's differentiated silicon photonics technology, which monolithically integrates RF SOI, CMOS and optical features on a single chip to realize power efficiencies for datacenters, and GF's 22FDX platform, which delivers ultra-low power consumption for intelligent devices at the edge.

A Bloomberg report said Silver Lake Management, a large private equity firm, has begun exclusive talks to buy a controlling stake in Intel's Altera division. Altera focuses on versatile chips that are widely used in telecommunications networks. The size of the stake is still being worked out, but negotiations have moved forward, people familiar with the deal said, speaking on condition of anonymity. They caution that things could slow down or the deal might not happen. When asked, people speaking for Intel and Silver Lake did not comment.

The news jolted the market, sending Intel shares up as much as 17% on Tuesday, Feb. 18, 2025, marking their biggest single-day gain in nearly five years. The surge was driven in part by separate speculation about a potential spinoff involving Taiwan Semiconductor Manufacturing Co (TSMC). By late afternoon trading in New York, Intel shares were up 15%, valuing the company at about $117 billion. If the sale goes through, it would mark a major shift for Intel as it tries to reshape its business. While there is no information on the size of the deal, last November Lattice Semiconductor Corp. and a group of buyout firms expressed interest in Altera. Some insiders said that potential buyers valued Altera at just $9 billion, a big drop for Intel, which bought Altera in 2015 for about $17 billion. Intel faces continued challenges following Gelsinger's departure, as the company searches for both a new CEO and a replacement for its Data Center and AI division head, who recently left to become Nokia's chief executive.

The global semiconductor manufacturing industry closed 2024 with strong fourth quarter results and solid year-on-year (YoY) growth across most of the key industry segments, SEMI announced today in its Q4 2024 publication of the Semiconductor Manufacturing Monitor (SMM) Report, prepared in partnership with TechInsights. The industry outlook is cautiously optimistic at the start of 2025 as seasonality and macroeconomic uncertainty may impede near-term growth despite momentum from strong investments related to AI applications.

After declining in the first half of 2024, electronics sales bounced back later in the year resulting in a 2% annual increase. Electronics sales grew 4% YoY in Q4 2024 and are expected to see a 1% YoY increase in Q1 2025 impacted by seasonality. Integrated circuit (IC) sales rose by 29% YoY in Q4 2024 and continued growth is expected in Q1 2025 with a 23% increase YoY as AI-fueled demand continues boosting shipments of high-performance computing (HPC) and datacenter memory chips.

Synopsys, Inc. today announced the expansion of its industry-leading hardware-assisted verification (HAV) portfolio with new HAPS prototyping and ZeBu emulation systems using the latest AMD Versal Premium VP1902 adaptive SoC. The next generation HAPS-200 prototyping and ZeBu-200 emulation systems deliver improved runtime performance, better compile time and improved debug productivity. They are built on new Synopsys Emulation and Prototyping (EP-Ready) Hardware that optimizes customer return on investment by enabling emulation and prototyping use cases via reconfiguration and optimized software. ZeBu Server 5 is enhanced to deliver industry-leading scalability beyond 60 billion gates (BG) to address the escalating hardware and software complexity in SoC and multi-die designs. It continues to offer industry-best density to optimize data center space utilization.

"With the industry approaching 100s of billions of gates per chip and 100s of millions of lines of software code in SoC and multi-die solutions, verification of advanced designs poses never-before seen challenges," said Ravi Subramanian, chief product management officer, Synopsys. "Continuing our strong partnership with AMD, our new systems deliver the highest HAV performance while offering the ultimate flexibility between prototyping and emulation use. Industry leaders are adopting Synopsys EP-Ready Hardware platforms for silicon to system verification and validation."

ASE Technology Holding Co., Ltd., the leading provider of semiconductor assembly and testing services ("ATM") and the provider of electronic manufacturing services ("EMS"), today reported its unaudited net revenues of NT$162,264 million for 4Q24, up by 1.0% year-over-year and up by 1.3% sequentially. Net income attributable to shareholders of the parent for the quarter totaled NT9,312 million, down from NT$9,392 million in 4Q23 and down from NT$9,733 million in 3Q24. Basic earnings per share for the quarter were NT$2.15 (or US$0.134 per ADS), compared to NT$2.18 for 4Q23 and NT$2.25 for 3Q24. Diluted earnings per share for the quarter were NT$2.07 (or US$0.129 per ADS), compared to NT$2.13 for 4Q23 and NT$2.18 for 3Q24.

For the full year of 2024, the Company reported unaudited net revenues of NT$595,410 million and net income attributable to shareholders of the parent of NT$32,483 million. Basic earnings per share for the full year of 2024 were NT$7.52 (or US$0.470 per ADS). Diluted earnings per share for the full year of 2024 were NT$7.23 (or US$0.452 per ADS).