Wednesday, August 12th 2020
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Intel "Tiger Lake" Leverages 10 nm+ SuperFin and SuperMIM Technologies
Intel's upcoming 11th Generation Core "Tiger Lake" processors introduce the company's first major refinement of its 10 nanometer silicon fabrication node, dubbed 10 nm+. The node introduces two key features that work to improve the power characteristics of the silicon, allowing Intel to yield more performance without raising power/thermals over the previous generation. VideoCardz scored a major scoop on 10 nm+, including the introduction of the new SuperFin transistor, and SuperMIM capacitor.
SuperFin is a redesigned FinFET, a nanoscale transistor, which offers increased gate pitch, yielding higher drive current, improved channel mobility, and an improved source/drain, yielding in lower resistance. The other key component of 10 nm+ is SuperMIM, delivering a 5 times increase in metal-insulator-metal capacitance. Intel is yet to put out energy efficiency gain numbers for the process, but promises a "dramatic increase in frequency" over the previous generation, which lines up with leaks of the Core i7-1185G7 shipping with significantly higher clock speeds.In related news, the "Willow Cove" CPU cores powering "Tiger Lake" reportedly features 1280 KB of L2 cache per core, a dramatic increase over the 512 KB of the "Sunny Cove" core, and 256 KB of the "Skylake" core (in ringbus-based dies). It also features a host of silicon level hardening against return/jump-based side-channel attacks. Its integrated memory controller supports LPDDR5-5400, LPDDR4X-4767, and dual-channel DDR4-3200 memory. The top trim of the Xe Gen12 iGPU solution features 96 execution units, and a dedicated 3840 KB L3 cache.
Intel technology chief architect and SVP Raja Koduri is expected to detail all of the innovations that go into "Tiger Lake," at a virtual press-event on August 13.
Sources:
VideoCardz, Raja Koduri (Twitter)
SuperFin is a redesigned FinFET, a nanoscale transistor, which offers increased gate pitch, yielding higher drive current, improved channel mobility, and an improved source/drain, yielding in lower resistance. The other key component of 10 nm+ is SuperMIM, delivering a 5 times increase in metal-insulator-metal capacitance. Intel is yet to put out energy efficiency gain numbers for the process, but promises a "dramatic increase in frequency" over the previous generation, which lines up with leaks of the Core i7-1185G7 shipping with significantly higher clock speeds.In related news, the "Willow Cove" CPU cores powering "Tiger Lake" reportedly features 1280 KB of L2 cache per core, a dramatic increase over the 512 KB of the "Sunny Cove" core, and 256 KB of the "Skylake" core (in ringbus-based dies). It also features a host of silicon level hardening against return/jump-based side-channel attacks. Its integrated memory controller supports LPDDR5-5400, LPDDR4X-4767, and dual-channel DDR4-3200 memory. The top trim of the Xe Gen12 iGPU solution features 96 execution units, and a dedicated 3840 KB L3 cache.
Intel technology chief architect and SVP Raja Koduri is expected to detail all of the innovations that go into "Tiger Lake," at a virtual press-event on August 13.
27 Comments on Intel "Tiger Lake" Leverages 10 nm+ SuperFin and SuperMIM Technologies
Pluses may or may not be completely gone from future branding and PR btw. Intel may or may not be fed up with people pointing at a long line of pluses and laugh.
Not holding my breath on when its getting released to consumers can buy them though..
And bigger caches are not just for show or benchmark, they're critical for preventing trips to main memory, which is one of the major factors in CPU performance. They are definitely going to be expensive though (in terms of cost, heat, power, and die area).
I don't believe caches use that much power compared to ALUs, FPUs, etc.
If it yields a reasonable performance increase for the die space and other trade-offs, then I'm all for it, no matter how "desperate" you think it is. There is a huge difference between L2 and L3 cache in access patterns. L3 cache is also a overflow cache, while the prefetcher feeds into L2, and each cache line in L2 is probably >10x as "useful" as each one in L3.
Cache is also a lot more than just size, there is latency, associativity, bandwidth etc. Ice Lake-U is shipping in large quantities. Tiger Lake will too.
Having said all that the Tiger Lake CPUs look really good with that healthy IPC lift.
Intel 10nm = TSMC 7nm
Intel 10nm+ = Intel 11nm = TSMC 8nm
This incarnation of Tiger Lake is a mobile-focused 4-core (presumably 8-thread) design.
Uses Willow Cove cores which are essentially the same as Sunny Cove.
Performance is supposedly up 10 - 20% over Ice Lake but this is due entirely to 10SF allowing clocks up to 5GHz again, as opposed to the maximum 4GHz on Ice Lake/10nm+.
PCIe 4.0 is supported but only via 4 lanes due to power consumption concerns; higher core count versions of TGL (for desktop) will have more lanes.
Power is ~15W compared to 7700HQ (also 4c/8t) at 45W - third of the power draw with integrated Thunderbolt 4/USB 4/PCIe 4.0 is not too shabby.
The new integrated Xe graphics are mostly irrelevant, but have hardware AV1 support and quad 4K outputs. Discrete Xe parts are apparently being fabbed at a third party.
Overall, interesting, but not very exciting - especially for desktop users.