Friday, September 18th 2020
TSMC 5 nm Node Supply Fully Booked, Apple the Biggest Customer
TSMC has hit a jackpot with its newer nodes like 7 nm and now 5 nm, as the company is working with quite good yields. To boast, TSMC has seen all of its capacity of 7 nm being fully booked by customers like AMD, Apple, and NVIDIA. However, it seems like the company's next-generation 5 nm node is also getting high demand. According to the latest report from DigiTimes, TSMC's N5 5 nm node is fully booked to the end of 2020. And the biggest reason for that is the biggest company in the world - Apple. Since Apple plans to launch the next-generation iPhone, iPad, and Arm-based MacBook, the company has reportedly booked most of the 5 nm capacity for 2020, meaning that there are lots of chips that Apple will consume. TSMC can't be dependent only on one company like Apple, so the smaller portion of capacity went to other customers as well.
Source:
DigiTimes
66 Comments on TSMC 5 nm Node Supply Fully Booked, Apple the Biggest Customer
6-track 57-nm poly pitch must be used in both designs.
57-nm poly pitch confirms the M1 metal layer = 57 * (2/3) => M1 with ~38-nm metal pitch.
7nm+ with 57 poly-pitch and 5nm with 57 poly-pitch have the same M1 metal pitch. Means the design is retapeout-able any 7nm+ 6-track can be ported to 5nm 6-track.
Much like how N7 to N6 goes.
N7/N6 have the same 57-nm 6-track and have the same 57-nm M1 metal pitch. So, they are re-tapeout-able.
Then in 2022 we will see Rembrandt using Zen 3+ and RDNA2 on 6nm or possible 5nm.
Rembrandt is the early 2022 APU, and I agree this is 5nm.
I would love Zen 3 to be 5nm, but I don't see it.
There is a rumoured Zen 3+ refresh (Warhol) in mid 2021 however, that I can imagine being on 5nm.
CDNA may well be N5, although that would be a very large die to run on a new process.
Van Gogh/Mero which is Family 17h Models 90h/98h respectively is related to the Xbox Series S. 8 Zen2 cores + 24 RDNA2(Navi2x-derived) cores on the die.
Rembrandt which is Family 19h Models 40h-4Fh is the sequel part of the above. 8 Zen3 cores + 24 RDNA2(Navi3x-derived) cores on the die. <== Has to appear after Van Gogh/Mero.
Renoir/Lucienne which is Family 17h Models 60h/68h respectively is the widely loved mobile series. 8 Zen2 cores + 8 Vega(Vega20-derivied) cores on the die.
Cezanne which is Family 19h Models 50h-5Fh is the sequel part of the above. 8 Zen3 cores + 8 Vega-H(Arcturus-derivied) cores on the die. <== Has to appear after Renoir/Lucienne.
One year and six months after is the max timeframe for successive launches.
No Van Gogh parts are out... but Renoir is out. On AMD's site 4800U's launch date = 1/6/2020
At worst, Cezanne's launch would be ~6/~6/2021.
Van Gogh/Mero is 7(e-compatible)[DUV] with Xbox Series S. Rembrandt is the 5nm part(using Navi3x).
Renoir/Lucienne is N7(P/e-compatible)[DUV] with Vega20(MI50/MI60) & RDNA1 IP(VCN). Cezanne is the 5nm part(using Arcturus/Vega-H/MI100 and RDNA2(Navi2?/Navi3) IP(VCN)).
Xbox Series S die size is 197.1 mm2, so Van Gogh/Mero/Rembrandt must be near that.
Renoir die size is 156 mm2, so Lucienne is that and Cezanne must be near that.
If you don't know about AMD launching consumer versions of the S model...
Xbox One S launched as the A9-9820(Cato) = www.chuwi.com/product/items/Chuwi-AeroBox.html
I expect the one based on Series S will get more enthusiasm.
If you are right, and 7nm+ means "7nm or better" rather than N7+, then that's great if it turns out to be N5.
We will see, hopefully fairly soon (I'm hoping for 21Q1 for Cezanne).
7+ nm is 5nm EUV compatible 7nm EUV. Which is pretty much as good as 5nm DUV, hence "7+ nm" EUV.
- TSMC developing 2nm tech at new R&D center
taipeitimes.com/News/front/archives/2020/08/26/2003742295Auftragsfertiger: TSMC arbeitet mit Apple an 2-nm-Prozess
www.computerbase.de/2020-08/tsmc-apple-2-nm/
Family 19h Model 40h-4Fh => Rembrandt
Family 19h Model 50h-5Fh => Cezanne
Cezanne is a later model than Rembrandt. But, it doesn't mean Rembrandt will come out sooner.
If and using the given Rembrandt is 5nm with Models 40h-4Fh, then Models 50h-5Fh which is Cezanne and is after 40h-4Fh must also be 5nm.
Random non-topic stuff that isn't about AMD actually being the biggest customer of 5nm;
The given Family 19h models known:
00h-0Fh = Genesis // Used for Milan(Zen3) -- SP3
10h-1Fh = Stones // Used for Genoa 1.0(Zen3) -- SP5
20h-2Fh = Vermeer // AM4
30h-3Fh = Badami // Used for Trento(Zen3) -- SP3
40h-4Fh = Rembrandt // FP7, FP7r2, FM5
50h-5Fh = Cezanne // FP6, AM4
Later models after this should be Zen4 processors.
Stones is followed up by Floyd which is Genoa 2.0(Zen4) -- SP5.
Vermeer is followed up by Raphael which is on AM6.
HBM2 floorplan overlayed on the Matisse die.
Stones/Floyd w/ SP5 is a X3D platform.
If you believe that 5nm has been ready for a while, so much so that AMD can release their Zen 3 range on it in a few weeks then do you think think products in 2022 will be on 3nm?
One generation? It's practically AMD's longest supported desktop socket. Excavator -> Zen -> Zen+ -> Zen2 -> Zen3. All the information I have been loaded with... I can say yes AMD can probably get 3nm out in 2022.
"Vermeer is followed up by Raphael which is on AM6."
Kaveri/Godavari => FM2+ (A10-7850K/A10-7870K)
Carrizo/Bristol => AM4 (A12-8870 Pro/A12-9800)
For desktop:
Zen3 is an offering to legacy, Zen4 starts the new socket and supports Zen5(potentially, Zen6&Zen7 as well).
Vermeer is just about to come out Q4 2020, it's Zen 3 on AM4 (and I think it will be 7nm but you think 5nm, that's fine, we'll find out soon enough)
Then there is a Vermeer refresh called Warhol 2H 2021, also Zen 3 based, not confirmed but likely AM4 still, I believe this could possibly be the first 5nm CPUs we see.
Then we move to Raphael in 1H 2022, this is the first Zen 4 (def 5nm) and will be the first on AM5 (not 6).
AM6 doesn't come into play until at least Zen 5 and probably longer.
AM4 -> AM6
FM3 -> FM5
New sockets skip two.
AM5 socket = FT5 BGA, AM5 is the successor to AM1.
Warhol replaces Dali & Pollock and these range of parts:
www.amd.com/en/products/apu/amd-athlon-gold-3150g
www.amd.com/en/products/apu/amd-athlon-gold-3150ge
www.amd.com/en/products/apu/amd-3015e
Dali & Pollock (Dual-core/3CU) => Warhol (Quad-core/3CU)
Primary competiton => Raspberry Pi 5 BCM2718, PicoRio v3.0, and other chips.
Vermeer is succeeded by Raphael <= Unicorn succeeds this. www.art.com/products/p22111612129-sa-i7615444/leonardo-da-vinci-lady-with-a-unicorn-c-1480.htm & en.wikipedia.org/wiki/Young_Woman_with_Unicorn
Van Gogh is succeeded by Rembrandt <= Phoenix succeeds this. www.themorgan.org/rembrandt/print/161920
Renoir is succeeded by Cezanne <= Dragon succeeds this. www.alamy.com/still-life-with-roses-and-tulips-in-a-dragon-vase-1882-1931artist-edouard-manet-image262756346.html
Dali & Pollock is succeeded Warhol // N4 cost-effective APU name hasn't been dropped yet, given the above it will probably be turtle related. *bad case of cough* www.masterworksfineart.com/artists/andy-warhol/screen-print/turtle-1985/id/w-3507 & www.artnet.com/auctions/artists/andy-warhol/vanishing-animals-galapagos-tortoise */cough*
Even if I followed you on current trend, main buyers, and how fabs works, you lost me knowing like the whole market forecast for the next 2 years ...
You killed me (*runs crying*).
Now what about 28th for RDNA2?
N7+ was finished in mid-2018 at TSMC.
N5 was finished in early-2019 at TSMC.
N7+ at TSMC was getting a lot of flack as being bad. With most of customers cancelling their orders for N6 for non-cadence products and N5 for cadence products.
N7+ was projected to 100 million Taiwan dollars for it's volume production of 2019. For 2020, it was absorbed into N7 revenue which is shared between N7/N7+/N6. Which indicates they don't want to talk about it going forward.
N5 at TSMC was getting huge praises as being good. Being a very strong node for mobile and HPC.
Compared to above, N5 was projected for 10% of annual wafer revenue and 8% after COVID19.
Non-cadence = They switch to whatever node on their timetable.
Cadence = They switch when the foundry provides. (Two year cadence: 14nm/2016 -> 7nm/2018 -> 5nm/2020 -> 3nm/2022)
The general idea is AMD had two designs:
Zen3 on 7nm family nodes and Zen3 on 5nm family nodes. Which started development near each other.
As 7nm+ became more negative at TSMC, then the 5nm node getting praised at being ahead of schedule. The logical conclusion is to have the Zen3 on 5nm design to be preferred.
Zen3 on 7nm+ engagement in 2018. => Thursday, January 9, 2020 tapeout
Zen3 on 5nm engagement in 2018 => Sunday, August 4, 2019 tapeout
Third quarter 2018 => 7nm+ risk production
First quarter 2019 => 5nm risk production