Great news! Whew

B650E-E Strix 1412 now.

I did not have CPU, then used flashback from 801 (bulk) to 1406, then all reports came up and i applied 1409, today 1412, i feel bad... a Bios has not to be updated, but only if needed.

I was always under the impression x3d chips could not OC, so why the fuck were they allowing oc'ing... honestly I say this is the board partners being greedy and less so AMD.

1.3 VSoC is still plenty.
A lock to 1.1V max would be okay also imho.

I'm not up on all this news, does this problem stem from overclocking? I know the x3d is very sensitive to voltages..

Dave65I'm not up on all this news, does this problem stem from overclocking? I know the x3d is very sensitive to voltages..

Bios notes will tell you

Space LynxI was always under the impression x3d chips could not OC, so why the fuck were they allowing oc'ing... honestly I say this is the board partners being greedy and less so AMD.

They can MEM OC, which is what the SOC voltage is primarily used for.

Space LynxI was always under the impression x3d chips could not OC, so why the fuck were they allowing oc'ing... honestly I say this is the board partners being greedy and less so AMD.

Its the memory clock that you can still change, which also includes the SoC voltage. Long story short, they're just capping the SoC voltage to 1.3v.

As expected, it was not only an 'Asus problem'. Good to see it fixed quickly.

Yeah but unfortunately they have locked soc voltage to 1.300v on my 7950x, x670e taichi, so back to an older bios ffs...

Still Debauer tested at 1.8v and saw no issue. I have to believe this was some sort of rare bug. I've been monitoring the SoC on my X670E Taichi and it was rock steady at 1.24v. Idle power usage at 30w. I was unable to replicate neither the SoC voltage jump nor the idle power jump that some noted.

well I need 1.350 soc for 6400 ddr5,so looks like I'm going back to version 1.18 on my x670 Taichi......

Durhamrangerwell I need 1.350 soc for 6400 ddr5,so looks like I'm going back to version 1.18 on my x670 Taichi......

As far as I understood, memory is linked to the cpu correct? so manual overvoltage memory might not be possible, reason they said only expo. I was planning to buy a ddr5 1.25v default and manually overvoltage to 1.4v, so this might not be possible anymore. Everything still very confusing, not much details about it, not sure yet what they limited, sadly.

MetroidAs far as I understood, memory is linked to the cpu correct? so manual overvoltage memory might not be possible, reason they said only expo. I was planning to buy a ddr5 1.25v default and manually overvoltage to 1.4v, so this might not be possible anymore. Everything still very confusing, not much details about it, not sure yet what they limited, sadly.

SOC voltage is not the same as Memory Voltage.
Vsoc is CPU side.
You can have SOC @1.2V and memory @1.35V+.

ZubasaSOC voltage is not the same as Memory Voltage.
Vsoc is CPU side.

I know that but weren't they linked? the reason why AMD thinks memory voltage was increasing soc voltage. Maybe this bios was to unlink them.

This is what MSI said about the issue. "As soon as EXPO is enabled, the CPU SOC and CPU VDDIO/MC voltages increase to 1.36-1.4v, sometimes boosting to 1.5V in Windows, causing instant death on the X3D."

So the cpu soc increased voltage to 1.4v because many ddr5 use 1.4v expo for overclocking and overvoltage.

So.........instead they're just blaming VSOC? While for 7 months now, people everywhere have been defaulting to 1.35V VSOC and no one at AMD so much as batted an eyelid? And so now suddenly a reduction of 50mV will magically prevent physical damage? :confused:

I'm not sure what conclusion buildzoid came to in his video, but no evidence so far clearly points to VSOC. VSOC max current draw remains low on chiplets. The visible evidence of damaged pads and areas are all far away from VSOC pads and IO die areas.

Judging from AMD's multi-stage reaction to the reference Navi31 vapor chamber problems, I'm waiting for a couple more statements before they finally, actually discover the real problem.

None of these changes affect the ability of our Ryzen 7000 Series processors to overclock memory using EXPO or XMP kits or boost performance using PBO technology. We expect all of our ODM partners to release new BIOS for their AM5 boards over the next few days.

I doubt that very much, considering there are clearly samples of Raphael out there that require that VSOC to hit 3000MHz UCLK. It's not like they got rid of IO die silicon quality variance overnight.

MetroidI know that but weren't they linked? the reason why AMD thinks memory voltage was increasing soc voltage. Maybe this bios was to unlink them.

"As soon as EXPO is enabled, the CPU SOC and CPU VDDIO/MC voltages increase to 1.36-1.4v, sometimes boosting to 1.5V in Windows, causing instant death on the X3D."

There is literally no relation between VDDCR_SOC, VDDCR_MEM, and VDIMM. Memory controller, which they are referring to in the quote, is still subsumed under VSOC rail.

The 1.4V on EXPO kits is for VDIMM. The board vendors just choose whatever number they please for VSOC that they think is necessary to support EXPO when it's enabled.

MetroidI know that but weren't they linked? the reason why AMD thinks memory voltage was increasing soc voltage. Maybe this bios was to unlink them.

"As soon as EXPO is enabled, the CPU SOC and CPU VDDIO/MC voltages increase to 1.36-1.4v, sometimes boosting to 1.5V in Windows, causing instant death on the X3D."

Nope. Just that when running faster memory naturally require higher soc voltage.
FYI the vendor that push 1.4V on some board is indeed Asus.
AMD just doesn't want to throw a particular partner under the bus.
Gigabyte is second place @1.35V+
MSI and Asrock usually apply around 1.25V.
Fact is that is enough even with 64GB of DDR5 6000 CL30, on the X670E PG.

tabascosauzSo.........instead they're just blaming VSOC? While for 7 months now, people everywhere have been defaulting to 1.35V VSOC and no one at AMD so much as batted an eyelid? And so now suddenly a reduction of 50mV will magically prevent physical damage? :confused:

I'm not sure what conclusion buildzoid came to in his video, but no evidence so far points to VSOC. VSOC max current draw remains low on chiplets. The visible evidence of damaged pads and areas are all far away from VSOC pads and IO die areas.

Judging from AMD's multi-stage reaction to the reference Navi31 vapor chamber problems, I'm waiting for a couple more statements before they finally, actually discover the real problem.



I doubt that very much, considering there are clearly samples of Raphael out there that require that VSOC to hit 3000MHz UCLK. It's not like they got rid of IO die silicon quality variance overnight.



There is literally no relation between VDDCR_SOC, VDDCR_MEM, and VDIMM. Memory controller, which they are referring to in the quote, is still subsumed under VSOC rail.

The 1.4V on EXPO kits is for VDIMM.

That is why I said is very confusing, they said, ""As soon as EXPO is enabled, the CPU SOC and CPU VDDIO/MC voltages increase to 1.36-1.4v, sometimes boosting to 1.5V in Windows, causing instant death on the X3D." meaning, something was linked to the expo voltage.

MetroidThat is why I said is very confusing, they said, ""As soon as EXPO is enabled, the CPU SOC and CPU VDDIO/MC voltages increase to 1.36-1.4v, sometimes boosting to 1.5V in Windows, causing instant death on the X3D." meaning, something was linked to the expo voltage.

Basically it is just a poorly worded way to say some boards are applying that much auto voltage when memory Overclocking.

MetroidThat is why I said is very confusing, they said, ""As soon as EXPO is enabled, the CPU SOC and CPU VDDIO/MC voltages increase to 1.36-1.4v, sometimes boosting to 1.5V in Windows, causing instant death on the X3D." meaning, something was linked to the expo voltage.

Nothing is linked to EXPO VDIMM lol, I really don't see how you draw that connection. Like I said, VSOC auto depends on board vendor and kit, it's not a set "EXPO voltage".

They're just saying that VSOC spikes far beyond what is set, and blaming damage on that (considering that VSOC and minor rails have literally nothing to do with Vcache, not sure what it is supposed to have to do with X3D parts specifically).

tabascosauzNothing is linked to EXPO VDIMM lol, I really don't see how you draw that connection. Like I said, VSOC auto depends on board vendor and kit, it's not a set "EXPO voltage".

They're just saying that VSOC spikes far beyond what is set, and blaming damage on that (considering that VSOC and minor rails have literally nothing to do with Vcache, not sure what it is supposed to have to do with X3D parts specifically).

Small clarification to that, the memory kit doesn't store any voltage setting except Vdimm aka memory voltage.
Every other voltage setting to up to the motherboard discretion.

tabascosauzNothing is linked to EXPO VDIMM lol, I really don't see how you draw that connection. Like I said, VSOC auto depends on board vendor and kit, it's not a set "EXPO voltage".

They're just saying that VSOC spikes far beyond what is set, and blaming damage on that (considering that VSOC and minor rails have literally nothing to do with Vcache, not sure what it is supposed to have to do with X3D parts specifically).

So tell me why MSI said that then? here is the link about it wccftech.com/amd-root-cause-ryzen-7000-burnout-issues-related-to-higher-cpu-voltages-official/

MetroidSo tell me why MSI said that then? here is the link about it wccftech.com/amd-root-cause-ryzen-7000-burnout-issues-related-to-higher-cpu-voltages-official/

Again, you should read what you quote, MSI literally doesn't say anything about VDIMM lol...........

If you are referring to the alleged bug of BIOS copying VDIMM into VSOC and VDDIO, 1usmus does have a tweet mentioning it, but none of the board vendors make reference to it.

In any case, there are a lot of 1.4V EXPO kits out there, but if it still exists such a VDIMM=VSOC bug doesn't seem to be a widespread one. If it was a major AGESA bug, then everyone with a decent Hynix kit would apply EXPO and immediately see 1.4V SOC set, which is not the case. So maybe board and/or BIOS specific. The board vendors are more hinting at a different form of VSOC overvoltage.

Not sure about the other vendors, but MSI's response seems to be removing manual and positive offset voltage adjustments across different rails. Which makes a lot more sense than AMD pinning the blame on VSOC, MSI's focus seems to be on dying X3Ds in particular, and VSOC has nothing to do with V-cache.

To be honest, AMD should have just kept the hard cap limitations that were on 5800X3D (hard Fmax limiter, hard Vcore limiter). Either they removed those protections for Raphael-X in the spirit of their advertised "overclocking" to generate more interest in the new X3Ds, or AGESA is bugged so that the protections are worthless, or the board partners fucked it up.

So, basically (if I were to take Yuri's statement as fact) an SOC voltage of less than 1.3 volts is safe. So, my previous voltage setting of 1.245 and 1.25 were safe, at least according to him.

DurhamrangerYeah but unfortunately they have locked soc voltage to 1.300v on my 7950x, x670e taichi, so back to an older bios ffs...

If you aren't pairing that 1.3+ volts with some sort of exotic cooling, you may be asking for a burned CPU.

I really have a hard time believing anyone should be running greater than 1.3v, the benefits are few and the dangers are seemingly many.

tabascosauzSo.........instead they're just blaming VSOC? While for 7 months now, people everywhere have been defaulting to 1.35V VSOC and no one at AMD so much as batted an eyelid? And so now suddenly a reduction of 50mV will magically prevent physical damage? :confused:

I'm not sure what conclusion buildzoid came to in his video, but no evidence so far clearly points to VSOC. VSOC max current draw remains low on chiplets. The visible evidence of damaged pads and areas are all far away from VSOC pads and IO die areas.

I agree there is likely more to the story here, but I personally wouldn't be running over 1.3v SOC until we know the whole picture.

tabascosauzI doubt that very much, considering there are clearly samples of Raphael out there that require that VSOC to hit 3000MHz UCLK. It's not like they got rid of IO die silicon quality variance overnight.

I'm not a fan of disabling features either. Perhaps they could just plaster a big warning on voltages past a point, and trip some efuse or something that I'm sure they could check warranty wise.

trparkySo, basically (if I were to take Yuri's statement as fact) an SOC voltage of less than 1.3 volts is safe. So, my previous voltage setting of 1.245 and 1.25 were safe, at least according to him.

Yes, if their obeyed and the alleged bug of copying VDIMM as SOC voltage isn't real.

My VDIMMs run at around 1.35v in EXPO, so even if the board did do that, hopefully nothing would just explode.