Last week Patrick Moorhead, CEO and founder of Moor Insights & Strategy, shared his insider sourced thoughts about ARM's next generation Cortex-X processor: "Blackhawk is planned to enable in smartphones shipping at the end of 2024. I think phones could be on the shelf a year from now at CES or maybe MWC." Moorhead believes that Cortex-X4's successor will be the most powerful option available at launch, which forms part of (ARM CEO) Rene Haas's strategy to "eliminate the performance gap between ARM-designed processors and custom ARM implementations." He believes that "this is a big and bold claim," since Apple is widely considered to rule the roost here with its cutting edge ARM-based Bionic designs. Moorhead's inside information has "Blackhawk" demonstrating the "largest year-over-year IPC performance increase in 5 years" citing undisclosed Geekbench 6 results.

He also presented evidence that the artificial intelligence processing is a key focus: "I am hopeful these performance goals translate to app performance as well. ARM also believes that Blackhawk will provide "great" LLM performance. I will assume that this has to do with big CPU IPC performance improvements as ARM says that its Cortex CPU is the #1 AI target for developers...The NPU and GPU can be an efficient way to run AI, but a CPU is the easiest and most pervasive way, which is why developers target it. A higher-performing CPU obviously helps here, but as the world moves increasingly to smaller language models, Arm's platform with higher-performing CPU and GPU combined with its tightly integrated ML libraries and frameworks will likely result in a more efficient experience on devices."

Today marks the launch of not just two new incredibly well-designed NAS devices, but also two new features brand new to the ASUSTOR line of NAS devices with ARM processors. The introduction of the Drivestor 2 Pro Gen2 and Drivestor 4 Pro Gen2 come with an upgraded SoC, providing 21% more performance, which increases read and write speeds and performance for the features and apps available for the Drivestor Pro Gen2. The Drivestor Pro Gen2 series comes with 2.5-Gigabit Ethernet, hot-swappable hard drive bays, hardware transcoding, tool-free design and more! The upgraded iGPU found in the Drivestor Pro Gen2 now gives even better performance when transcoding multimedia.

The all-new Drivestor Pro Gen2 series comes with a new killer feature. Btrfs is now supported on the Drivestor Pro Gen2, a first for ASUSTOR NAS devices running ARM CPUs. Btrfs helps protect data by enabling snapshots of data at certain points in time and is able to rewind the clock should any unintentional modifications be made and restore data if needed.

Today, AMD announced it will showcase automotive innovation at CES 2024 and expand its portfolio with the introduction of two new devices, the Versal AI Edge XA adaptive SoC and Ryzen Embedded V2000A Series processor. The devices underscore AMD automotive technology leadership and are designed to serve key automotive focus segments including infotainment, advanced driver safety and autonomous driving. Working alongside a growing automotive partner ecosystem, AMD will demonstrate at CES 2024 the broad range of capabilities and applications for these new devices in automotive solutions available today and in the future.

Versal AI Edge XA adaptive SoCs add an advanced AI Engine, enabling the devices to be further optimized for numerous next-generation advanced automotive systems and applications including: forward cameras, in-cabin monitoring, LiDAR, 4D radar, surround-view, automated parking and autonomous driving. Versal AI Edge XA adaptive SoCs are also the first AMD 7 nm device to be auto-qualified, bringing hardened IP and added security to automotive applications where safety is paramount.

MINISFORUM unveiled a high-end tablet convertible based on the Windows 11 x64 platform. Called simply the V3 AMD Tablet, this 3-in-1 convertible can be used as a 14-inch tablet, or combined with a dock that adds a keyboard, trackpad, and a stand. The tablet measures 318 mm x 213.8 mm x mm 9.8 mm (WxDxH), weighing 946 g. Its 14-inch 16:10 aspect-ratio display offers a 2560 x 1600 pixels resolution, with 165 Hz refresh rate, 100% DCI-P3 coverage, and 500 nits maximum brightness. This display is backed by a sensitive touchscreen that supports MPP 2.6 SLA and sensitivity suitable for a natural handwriting stylus.

Connectivity includes Wi-Fi 6E with Bluetooth 5.3, a USB-C V-Link (DP in), two 40 Gbps USB4, a fingerprint reader, and 4-pole headset jack. Under the hood, the MINISFORUM V3 is powered by an AMD Ryzen 7 8040U series "Hawk Point" processor, paired with 32 GB of LPDDR5-6400 memory, and a 2 TB M.2 Gen 4 NVMe SSD. The SoC has a 28 W configured TDP, and MINISFORUM has innovated a four flat copper heatpipe, dual fan cooling solution. The tablet also has a 4-speaker setup and multi-directional microphone. The front camera is 2 MP with full Windows Hello compatibility, while the rear cam is 5 MP. Powering it all is a 50.82 Wh battery, and a 65 W USB-PD power source over a type-C connector. Windows 11 Pro 23H2 with Ryzen AI enablement comes pre-installed. The company didn't reveal pricing.

Apple has been experimenting with Large Language Models (LLMs) that power most of today's AI applications. The company wants these LLMs to serve the users best and deliver them efficiently, which is a difficult task as they require a lot of resources, including compute and memory. Traditionally, LLMs have required AI accelerators in combination with large DRAM capacity to store model weights. However, Apple has published a paper that aims to bring LLMs to devices with limited memory capacity. By storing LLMs on NAND flash memory (regular storage), the method involves constructing an inference cost model that harmonizes with the flash memory behavior, guiding optimization in two critical areas: reducing the volume of data transferred from flash and reading data in larger, more contiguous chunks. Instead of storing the model weights on DRAM, Apple wants to utilize flash memory to store weights and only pull them on-demand to DRAM once it is needed.

Two principal techniques are introduced within this flash memory-informed framework: "windowing" and "row-column bundling." These methods collectively enable running models up to twice the size of the available DRAM, with a 4-5x and 20-25x increase in inference speed compared to native loading approaches on CPU and GPU, respectively. Integrating sparsity awareness, context-adaptive loading, and a hardware-oriented design pave the way for practical inference of LLMs on devices with limited memory, such as SoCs with 8/16/32 GB of available DRAM. Especially with DRAM prices outweighing NAND Flash, setups such as smartphone configurations could easily store and inference LLMs with multi-billion parameters, even if the DRAM available isn't sufficient. For a more technical deep dive, read the paper on arXiv here.

Microsoft Xbox Series X/S, their hardware refreshes, and variants, will reportedly be the company's mainstay all the way up until 2028, the company disclosed in its documents filed as part of its anti-trust lawsuit with the FTC. In a presentation slide titled "From "Zero Microsoft" to "Full Microsoft," the company explains how its next gen Xbox, scheduled for calendar year (CY) 2028, will see a full convergence of Microsoft co-developed hardware, software, and cloud compute services, into a powerful entertainment system. It elaborates on this in another slide, titled "Cohesive Hybrid Compute," where it states the company's vision to be the development of "a next generation hybrid game platform capable of leveraging the combined power of the client and cloud to deliver deeper immersion and entirely new classes of game experiences."

From the looks of it, Microsoft fully understands the creator economy that has been built over the gaming industry, and wants to develop its next-gen console to target exactly this—a single device from which people can play, stream, and create content from—something that's traditionally reserved for gaming desktop PCs. Game streamers playing on consoles usually have an entire creator PC setup handling the production and streaming side of things. Keeping this exact use-case in mind, Microsoft plans to "enable new levels of performance beyond the capabilities of the client hardware alone," by which it means that not only will the console rely on its own hardware—which could be jaw-dropping powerful as you'll see—but also leverage cloud compute services from Microsoft.

On December 14 Intel launched its first generation Core Ultra "Meteor Lake" line of mobile processors, and here is a a brief overview of the various processor models on offer at launch, thanks to a compilation by ComputerBase.de. "Meteor Lake" is Intel's first completely disaggregated processor, in which its numerous components are broken up into chiplets fabricated on different foundry nodes that strike the right performance/Watt suitable to the component, all held together by Intel's Foveros packaging technology (an evolution in multi-chip modules with a design focus on reducing inter-chiplet latencies to levels comparable to components on a monolithic chip). "Meteor Lake" also introduces a 3-tiered heterogeneous CPU architecture, with the introduction of the low-power island CPU cores.

Intel's mobile processor lineup is broadly categorized into the U-segment, targeting thin-and-light and ultraportable devices; and the H-segment, targeting notebooks of conventional thickness. At launch, the Core Ultra H-segment, and U-segment processors will coexist with P-segment processor models from the 13th Gen Core "Raptor Lake" series; as well as the upcoming 14th Gen Core "Raptor Lake Refresh" HX-segment. The P-segment is positioned between the U- and H-segments, targeting a class of devices that either what to be thin-and-light mainstream notebooks, or higher performance ultraportables. The HX-segment caters to high performance gaming notebooks and mobile workstations.

Intel on Wednesday held a pre-launch round-table with HotHardware, in which it made several performance disclosures of its upcoming Core "Meteor Lake" mobile processor, comparing it with the current U-segment chips based on the 13th Gen Core "Raptor Lake," and competing AMD Ryzen 7040 "Phoenix." In these, the company is claiming that its next-generation iGPU based on the Xe-LPG graphics architecture, armed with 128 EU, is significantly outperforming the Radeon 780M RDNA3 iGPU of the Ryzen 7040, while its CPU is ahead in multi-threaded performance.

In its comparison, the company picked the Core Ultra 7 165H, a middle-of-the-market performance segment part in the 28 W class. This is compared to the Core i7-1370P "Raptor Lake," and the AMD Ryzen 7 7840U. The company also dropped in the fastest Windows-ready Arm chip in the market, the Qualcomm 8cx Gen 3. In the 33 games that the 165H was compared to the 7840U, the Intel iGPU is shown posting performance leads ranging between 3% to 70% over the Radeon 780M, in 23 out of 33 games. In one of the games, the two perform on par with each other. In 9 out of 33 games, the Radeon 780M beats the Intel Xe-LPG by 2% to 18%. The iGPU of the 165H packs 8 Xe cores, or 128 EU (1,024 unified shaders). The Radeon 780M is powered by 12 RDNA3 compute units (768 stream processors).

TSMC's 2 nm-class foundry node, dubbed N2, will enter mass production only in 2025, a report by the Financial Times says. The premier Taiwan-based foundry has been reportedly showcasing TSMC N2 to its biggest customer for advanced nodes, Apple. The node will likely power Apple's in-house silicon that drives the iPhone 17 Pro and Pro Max devices that are slated for 2025. This implies that the current 3 nm class nodes from TSMC will continue to power Apple silicon into 2024 and its iPhone 16 Pro/Pro Max.

The current Apple A17 Pro and M3 chips powering the iPhone 15 Pro/Max and the H2-2023 Macs are based on TSMC's N3 node, with a 183 MTr/mm² transistor density. TSMC has four other 3 nm-class nodes, with the N3E node that just entered mass production to offer a jump to 215.6 MTr/mm², and its 2024 successor, the N3P, pushing transistor densities further up to 224 MTr/mm². TSMC's first 2 nm-class node, the N2, offers a jump to around 259 MTr/mm², which makes the N3P a nice halfway point for Apple between the N3 and N2, for its 2024 silicon.

TrendForce's research indicates a dynamic third quarter for the global foundry industry, marked by an uptick in urgent orders for smartphone and notebook components. This surge was fueled by healthy inventory levels and the release of new iPhone and Android devices in 2H23. Despite persisting inflation risks and market uncertainties, these orders were predominantly executed as rush orders. Additionally, TSMC and Samsung's high-cost 3 nm manufacturing process had a positive impact on revenues, driving the 3Q23 value of the top ten global foundries to approximately US$28.29 billion—a 7.9% QoQ increase.

Looking ahead to 4Q23, the anticipation of year-end festive demand is expected to sustain the inflow of urgent orders for smartphones and laptops, particularly for smartphone components. Although the end-user market is yet to fully recover, pre-sales season stockpiling for Chinese Android smartphones appears to be slightly better than expected, with demand for mid-to-low range 5G and 4G phone APs and continued interest in new iPhone models. This scenario suggests a continued upward trend for the top ten global foundries in Q4, potentially exceeding the growth rate seen in Q3.

Microsoft is preparing a big update for its Windows operating system. Currently at version 11, the company is gearing up for the launch of Windows 12, which is supposed to bring a monumental shift in the tectonic plates of the regular PC user experience. Enhanced by AI, the Windows 12 OS should utilize many features like generative AI, large language models, some GPT integration, and many other tools that could benefit AI, like photo editors. The confirmation for the Windows 12 launch coming in 2024 is sourced from the Taiwanese Commercial Times, which analyzed comments from Barry Lam, the founder and chairman of PC contract manufacturer Quanta, and Junsheng (Jason) Chen, the chairman and chief executive of Acer.

Both of them underscored the importance of AI and that AI PCs are coming with the next version of Windows. Supposedly, the launch date for Windows 12 is set for June 2024. In that timeframe, hardware vendors should roll out their SoCs embedding AI processing elements at every silicon block. Qualcomm is set to debut its Snapdragon Elite X SoCs in mid-2024, aligning with the alleged release schedule of Windows 12. With more players like NVIDIA, AMD, and others planning to utilize an Arm instruction set for their next-generation PC chips, we expect to see Windows 12 get full-fledged support for Arm ISA and treat it like a first-class citizen in the OS.

EarFun's development kitchen remains hot. Delivering their first IEM and portable USB-C DAC just this past month, the awarded audio brand will be releasing the next generational leap from their current lineup, the Free Pro 3.

Revolutionizing True Wireless Audio and Noise Cancelation
The new true wireless earbuds are the first pair of earbuds that combine Snapdragon Sound Certification, Hi-Res audio, Qualcomm's QCC3072 SoC, the latest v5.3 Bluetooth certification, Low-Energy Audio protocol, and aptX Adaptive technology. It will also feature EarFun's proprietary QuietSmart 2.0 technology for active noise cancellation up to 43dB, and 6-mic cVc call noise-reduction. It will boast a generous battery life of up to 33 hours, an IPX5 certification, wireless charging, and multipoint connectivity. The Free Pro 3 will make use of EarFun's customizable audio app for total user configuration.

Renesas Electronics Corporation, a premier supplier of advanced semiconductor solutions, announced today that it has designed and tested a 32-bit CPU core based on the open-standard RISC-V instruction set architecture (ISA). Renesas is among the first in the industry to independently develop a CPU core for the 32-bit general-purpose RISC-V market, providing an open and flexible platform for IoT, consumer electronics, healthcare and industrial systems. The new RISC-V CPU core will complement Renesas' existing IP portfolio of 32-bit microcontrollers (MCUs), including the proprietary RX Family and the RA Family based on the Arm Cortex -M architecture.

RISC-V is an open ISA which is quickly gaining popularity in the semiconductor industry, due to its flexibility, scalability, power efficiency and open ecosystem. While many MCU providers have recently created joint investment alliances to accelerate their development of RISC-V products, Renesas has already developed a new RISC-V core on its own. This versatile CPU can serve as a main application controller, a complementary secondary core in SoCs, on-chip subsystems, or even in deeply embedded ASSPs. This positions Renesas as a leader in the emerging RISC-V market, following previous introductions of its 32-bit voice-control and motor-control ASSP devices, as well as the RZ/Five 64-bit general purpose microprocessors (MPUs), which were built on CPU cores developed by Andes Technology Corp.

TrendForce's latest research into the HBM market indicates that NVIDIA plans to diversify its HBM suppliers for more robust and efficient supply chain management. Samsung's HBM3 (24 GB) is anticipated to complete verification with NVIDIA by December this year. The progress of HBM3e, as outlined in the timeline below, shows that Micron provided its 8hi (24 GB) samples to NVIDIA by the end of July, SK hynix in mid-August, and Samsung in early October.

Given the intricacy of the HBM verification process—estimated to take two quarters—TrendForce expects that some manufacturers might learn preliminary HBM3e results by the end of 2023. However, it's generally anticipated that major manufacturers will have definite results by 1Q24. Notably, the outcomes will influence NVIDIA's procurement decisions for 2024, as final evaluations are still underway.

During its Ignite conference, Microsoft introduced a duo of custom-designed silicon made to accelerate AI and excel in cloud workloads. First of the two is Microsoft's Azure Cobalt 100 CPU, a 128-core design that features a 64-bit Armv9 instruction set, implemented in a cloud-native design that is set to become a part of Microsoft's offerings. While there aren't many details regarding the configuration, the company claims that the performance target is up to 40% when compared to the current generation of Arm servers running on Azure cloud. The SoC has used Arm's Neoverse CSS platform customized for Microsoft, with presumably Arm Neoverse N2 cores.

The next and hottest topic in the server space is AI acceleration, which is needed for running today's large language models. Microsoft hosts OpenAI's ChatGPT, Microsoft's Copilot, and many other AI services. To help make them run as fast as possible, Microsoft's project Athena now has the name of Maia 100 AI accelerator, which is manufactured on TSMC's 5 nm process. It features 105 billion transistors and supports various MX data formats, even those smaller than 8-bit bit, for maximum performance. Currently tested on GPT 3.5 Turbo, we have yet to see performance figures and comparisons with competing hardware from NVIDIA, like H100/H200 and AMD, with MI300X. The Maia 100 has an aggregate bandwidth of 4.8 Terabits per accelerator, which uses a custom Ethernet-based networking protocol for scaling. These chips are expected to appear in Microsoft data centers early next year, and we hope to get some performance numbers soon.

Synopsys, Inc. (Nasdaq: SNPS) today announced it has extended its ARC Processor IP portfolio to include new RISC-V ARC-V Processor IP, enabling customers to choose from a broad range of flexible, extensible processor options that deliver optimal power-performance efficiency for their target applications. Synopsys leveraged decades of processor IP and software development toolkit experience to develop the new ARC-V Processor IP that is built on the proven microarchitecture of Synopsys' existing ARC Processors, with the added benefit of the expanding RISC-V software ecosystem.

Synopsys ARC-V Processor IP includes high-performance, mid-range, and ultra-low power options, as well as functional safety versions, to address a broad range of application workloads. To accelerate software development, the Synopsys ARC-V Processor IP is supported by the robust and proven Synopsys MetaWare Development Toolkit that generates highly efficient code. In addition, the Synopsys.ai full-stack AI-driven EDA suite is co-optimized with ARC-V Processor IP to provide an out-of-the-box development and verification environment that helps boost productivity and quality-of-results for ARC-V-based SoCs.

MediaTek today announced the Dimensity 9300, its newest flagship mobile chip with a one-of-a-kind All Big Core design. The unique configuration combines extreme performance with MediaTek's industry-leading power efficiency to deliver unmatched user experiences in gaming, video capture and on-device generative AI processing.

"The Dimensity 9300 is MediaTek's most powerful flagship chip yet, bringing a huge boost in raw computing power to flagship smartphones with our groundbreaking All Big Core design," said Joe Chen, President at MediaTek. "This unique architecture, combined with our upgraded on-chip AI Processing Unit, will usher in a new era of generative AI applications as developers push the limits with edge AI and hybrid AI computing capabilities."

AMD FidelityFX Super Resolution (FSR) is an open-source resolution upscaling technology that takes lower-resolution input and uses super-resolution temporal upscaling technology, frame generation using AMD Fluid Motion Frames (AFMF) technology, and built-in latency reduction technology to provide greater-resolution output images from lower-resolution settings. While the technology is open-source, it battles in market share with NVIDIA and the company's Deep Learning Super Sampling (DLSS). However, in the mobile space, there hasn't been much talk about implementing upscaling technology up until now. According to a popular leaker @Tech_Reve on X/Twitter, we have information that AMD is collaborating with Samsung and Qualcomm to standardize on upscaling technology implementations in mobile SoCs.

Not only does the leak imply that the AMD FSR technology will be used in Samsung's upcoming Exynos SoC, but some AMD ray tracing will be present as well. The leaker has mentioned Qualcomm, which means that future iterations of Snapdragon are up to adopt the FSR algorithmic approach to resolution upscaling. We will see how and when, but with mobile games growing in size and demand, FSR could come in handy to provide mobile gamers with a better experience. Primarily, this targets Android devices, which Qualcomm supplies, where Apple's iPhone recently announced MetalFX Upscaling technology with an A17 Pro chip.

BeagleBoard.org, a pioneer in open-source single-board computers (SBCs), is excited to unveil the BeagleV -Fire, a revolutionary SBC powered by the Microchip's PolarFire MPFS025T FCVG484E 5x core RISC-V System on Chip (SoC) with FPGA fabric. This remarkable addition to the BeagleBoard.org BeagleV family of boards opens up new horizons for developers, tinkerers, and the open-source community to explore the vast potential of RISC-V architecture and FPGA technology.

BeagleV -Fire is the second board in the BeagleV series of single board computers (SBCs) from BeagleBoard.org. BeagleV -Fire like other BeagleV SBCs, is set to revolutionize the world of embedded systems and empower developers and enthusiasts worldwide. After the launch of BeagleV -Ahead, BeagleV -Fire represents another significant milestone in the democratization of computer architecture and open-source hardware development for the masses. Built around the powerful and energy-efficient RISC-V instruction set architecture (ISA) along with its versatile FPGA fabric, BeagleV -Fire SBC offers unparalleled opportunities for developers, hobbyists, and researchers to explore and experiment with RISC-V technology.

At Snapdragon Summit, Qualcomm Technologies, Inc. today announced its latest premium mobile platform, the Snapdragon 8 Gen 3—a true titan of on-device intelligence, premium-tier performance, and power efficiency. As the premium Android smartphone SoC leader, Qualcomm Technologies' latest processor will be adopted for flagship devices by global OEMs and smartphone brands including ASUS, Honor, iQOO, MEIZU, NIO, Nubia, OnePlus, OPPO, realme, Redmi, RedMagic, Sony, vivo, Xiaomi, and ZTE.

"Snapdragon 8 Gen 3 infuses high-performance AI across the entire system to deliver premium-level performance and extraordinary experiences to consumers. This platform unlocks a new era of generative AI enabling users to generate unique content, help with productivity, and other breakthrough use cases." said Chris Patrick, senior vice president and general manager of mobile handsets, Qualcomm Technologies, Inc. "Each year, we set out to design leading features and technologies that will power our latest Snapdragon 8-series mobile platform and the next generation of flagship Android devices. The Snapdragon 8 Gen 3 delivers."

Thanks to the information from Windows Report, we have received numerous details regarding Qualcomm's upcoming Snapdragon Elite X chip for laptops. The Snapdragon Elite X SoC is built on top of Nuvia-derived Oryon cores, which Qualcomm put 12 off in the SoC. While we don't know their base frequencies, the all-core boost reaches 3.8 GHz. The SoC can reach up to 4.3 GHz on single and dual-core boosting. However, the slide notes that this is all pure "big" core configuration of the SoC, so no big.LITTLE design is done. The GPU part of Snapdragon Elite X is still based on Qualcomm's Adreno IP; however, the performance figures are up significantly to reach 4.6 TeraFLOPS of supposedly FP32 single-precision power. Accompanying the CPU and GPU, there are dedicated AI and image processing accelerators, like Hexagon Neural Processing Unit (NPU), which can process 45 trillion operations per second (TOPS). For the camera, the Spectra Image Sensor Processor (ISP) is there to support up to 4K HDR video capture on a dual 36 MP or a single 64 MP camera setup.

The SoC supports LPDDR5X memory running at 8533 MT/s and a maximum capacity of 64 GB. Apparently, the memory controller is an 8-channel one with a 16-bit width and a maximum bandwidth of 136 GB/s. Snapdragon Elite X has PCIe 4.0 and supports UFS 4.0 for outside connection. All of this is packed on a die manufactured by TSMC on a 4 nm node. In addition to marketing excellent performance compared to x86 solutions, Qualcomm also advertises the SoC as power efficient. The slide notes that it uses 1/3 of the power at the same peak PC performance of x86 offerings. It is also interesting to note that the package will support WiFi7 and Bluetooth 5.4. Officially coming in 2024, the Snapdragon Elite X will have to compete with Intel's Meteor Lake and/or Arrow Lake, in addition to AMD Strix Point.

Samsung Electronics Co., Ltd., a world leader in advanced memory technology, today held its annual Memory Tech Day, showcasing industry-first innovations and new memory products to accelerate technological advancements across future applications—including the cloud, edge devices and automotive vehicles.

Attended by about 600 customers, partners and industry experts, the event served as a platform for Samsung executives to expand on the company's vision for "Memory Reimagined," covering long-term plans to continue its memory technology leadership, outlook on market trends and sustainability goals. The company also presented new product innovations such as the HBM3E Shinebolt, LPDDR5X CAMM2 and Detachable AutoSSD.

Socionext today announced a collaboration with Arm and TSMC for the development of an innovative power-optimized 32-core CPU chiplet in TSMCʼs 2 nm silicon technology, delivering scalable performance for hyperscale data center server, 5/6G infrastructure, DPU and edge-of- network markets.

The engineering samples are targeted to be available in 1H2025. This advanced CPU chiplet proof-of-concept using Arm Neoverse CSS technology is designed for single or multiple instantiations within a single package, along with IO and application-specific custom chiplets to optimize performance for a variety of end applications.

Zero ASIC, a semiconductor startup, came out of stealth today to announce early access to its one-of-a-kind ChipMaker platform, demonstrating a number of world firsts:

• 3D chiplet composability enabling billions of new silicon products
• Fully automated no-code chiplet-based chip design
• Zero install interactive RTL-based chip emulation
• Roadmap to 100X reduction in chip development costs

"Custom Application Specific Integrated Circuits (ASICs) offer 10-100X cost and energy advantage over commercial off the shelf (COTS) devices, but the enormous development cost makes ASICs non-viable for most applications," said Andreas Olofsson, CEO and founder of Zero ASIC. "To build the next wave of world changing silicon devices, we need to reduce the barrier to ASICs by orders of magnitude. Our mission at Zero ASIC is to make ordering an ASIC as easy as ordering catalog parts from an electronics distributor."

Synopsys today announced it has expanded its collaboration with Arm to provide optimized IP and EDA solutions for the newest Arm technology, including the Arm Neoverse V2 platform and Arm Neoverse Compute Subsystem (CSS). Synopsys has joined Arm Total Design where Synopsys will leverage their deep design expertise, the Synopsys.ai full-stack AI-driven EDA suite, and Synopsys Interface, Security, and Silicon Lifecycle Management IP to help mutual customers speed development of their Arm-based CSS solutions. The expanded partnership builds on three decades of collaboration to enable mutual customers to quickly develop specialized silicon at lower cost, with less risk and faster time to market.

"With Arm Total Design, our aim is to enable rapid innovation on Arm Neoverse CSS and engage critical ecosystem expertise at every stage of SoC development," said Mohamed Awad, senior vice president and general manager, Infrastructure Line of Business at Arm. "Our deep technical collaboration with Synopsys to deliver pre-integrated and validated IP and EDA tools will help our mutual customers address the industry's most complex computing challenges with specialized compute."