Intel CEO Pat Gelsinger, speaking at the Intel Foundry Services (IFS) Direct Connect event, confirmed to Tom's Hardware that he hopes to turn IFS into the West's premier foundry company, and a direct technological and volume rival to TSMC. He said that there is a clear line of distinction between Intel Products and Intel Foundry, and that later this year, IFS will be more legally distinct from Intel, becoming its own entity. The only way Gelsinger sees IFS being competitive to TSMC, is by making its most advanced semiconductor manufacturing nodes and 3D chip packaging innovations available to foundry customers other than itself (Intel Products), even if it means providing them to companies that directly compete with Intel products, such as AMD and Qualcomm.

Paul Alcorn of Tom's Hardware asked CEO Gelsinger "Intel will now offer its process nodes to some of its competitors, and there may be situations wherein your product teams are competing directly with competitors that are enabled by your crown jewels. How do you plan to navigate those types of situations and maybe soothe ruffled feathers on your product teams?" To this, Gelsinger responded "Well, if you go back to the picture I showed today, Paul, there are Intel products and Intel foundry, There's a clean line between those, and as I said on the last earnings call, we'll have a setup separate legal entity for Intel foundry this year," Gelsinger responded. "We'll start posting separate financials associated with that going forward. And the foundry team's objective is simple: Fill. The. Fabs. Deliver to the broadest set of customers on the planet."

Cadence's digital and custom/analog flows are certified on the Intel 18A process technology. Cadence design IP supports this node from Intel Foundry, and the corresponding process design kits (PDKs) are delivered to accelerate the development of a wide variety of low-power consumer, high-performance computing (HPC), AI and mobile computing designs. Customers can now begin using the production-ready Cadence design flows and design IP to achieve design goals and speed up time to market.

"Intel Foundry is very excited to expand our partnership with Cadence to enable key markets for the leading-edge Intel 18A process technology," said Rahul Goyal, Vice President and General Manager, Product and Design Ecosystem, Intel Foundry. "We will leverage Cadence's world-class portfolio of IP, AI design technologies, and advanced packaging solutions to enable high-volume, high-performance, and power-efficient SoCs in Intel Foundry's most advanced process technology. Cadence is an indispensable partner supporting our IDM2.0 strategy and the Intel Foundry ecosystem."

Intel Corp. today launched Intel Foundry as a more sustainable systems foundry business designed for the AI era and announced an expanded process roadmap designed to establish leadership into the latter part of this decade. The company also highlighted customer momentum and support from ecosystem partners - including Synopsys, Cadence, Siemens and Ansys - who outlined their readiness to accelerate Intel Foundry customers' chip designs with tools, design flows and IP portfolios validated for Intel's advanced packaging and Intel 18A process technologies.

The announcements were made at Intel's first foundry event, Intel Foundry Direct Connect, where the company gathered customers, ecosystem companies and leaders from across the industry. Among the participants and speakers were U.S. Secretary of Commerce Gina Raimondo, Arm CEO Rene Haas, Microsoft CEO Satya Nadella, OpenAI CEO Sam Altman and others.

ARM's in-progress fifth generation "Blackhawk" Cortex design is allegedly going through a troubled phase of development, according to Chinese insider sources. A Revegnus (@Tech_Reve) social media post highlights ongoing issues: "It's reported that the Cortex X5 architecture is underperforming compared to expectations. It's speculated that the high-frequency power consumption has surged explosively. Therefore, if performance is reduced for lower power consumption, the Geekbench 6 multi-core score of Dimensity 9400 may not achieve a score of 9,400 points." A recent Moor Insights & Strategy analysis piece proposed that "Blackhawk" would become "the most powerful option available at launch" later this year—mobile chipsets leveraging ARM's Cortex-X5 design are touted to face tough next-gen competition from Qualcomm and Apple corners.

Revegnus pulled in a rival SoC: "While Snapdragon 8 Gen 4 is seen to have minor issues, there is no evidence to support this claim. There might be a problem with low-frequency power consumption not showing clear superiority over ARM's middle cores." Qualcomm's next flagship model is performing admirably according to insiders—an engineering sample managed to score 10,628 points in alleged Geekbench 6 multi-core gauntlets. Late last month prototype clocks were leaked—Digital Chat Station claimed that a Snapdragon 8 Gen 4 High-Performance "Big" core was capable of reaching 4.0 GHz. Prior to the latest news, MediaTek's Dimensity 9400 SoC was observed achieving ~10,000 multi-core Geekbench 6 scores—leaked CPU cluster details present a single "Big" Cortex-X5 unit operating alongside three Cortex-X4 cores.

Serkan Toto, CEO of Tokyo-based games consultancy Kantan Games was interviewed by CNBC earlier this week—he was invited on-air to provide expert commentary on Sony's freshly revised sales and revenue forecast for PlayStation 5 products. He believes that great forward momentum is best achieved with refreshed hardware, and a well timed launch coinciding with the release of AAA/blockbuster games titles. Last autumn's rollout of slimmer PlayStation 5 consoles was not particularly exciting—with no major bump up in specs or attractive pricing. The development of an inevitable "Pro" variant has circulated around rumor mills for more than a year.

Sony Computer Entertainment (SCE) and AMD are believed to co-operating on a very potent hardware redesign—reports from late last year posited that a semi-custom "Viola" SoC is in the pipeline. A more expensive RDNA 3-upgraded refresh could attract an additional segment of hardcore gamers, but another industry analyst reckons that Sony is unlikely to implement a standard model price cut later this year (based on past trends). George Jijiashvili, senior principal analyst at Omdia, stated: "A scenario where Sony launches a PS5 Pro, but still experiences declining year-on-year hardware sales is very much within the realms of possibility." Serkan Toto (of Kantan Games consultancy) expressed a more optimistic view: "There seems to be a broad consensus in the game industry that Sony is indeed preparing a launch of a PS5 Pro in the second half of 2024...And Sony will want to make sure to have a great piece of hardware ready when GTA VI hits in 2025, a launch that will be a shot in the arm for the entire gaming industry."

Intel Foundry Services (IFS) and Cadence Design Systems Inc. today announced a multiyear strategic agreement to jointly develop a portfolio of key customized intellectual property (IP), optimized design flows and techniques for Intel 18A process technology featuring RibbonFET gate-all-around transistors and PowerVia backside power delivery. Joint customers of the companies will be able to accelerate system-on-chip (SoC) project schedules on process nodes from Intel 18A and beyond while optimizing for performance, power, area, bandwidth and latency for demanding artificial intelligence, high performance computing and premium mobile applications.

"We're very excited to expand our partnership with Cadence to grow the IP ecosystem for IFS and provide choice for customers," said Stuart Paann, Intel senior vice president and general manager of IFS. "We will leverage Cadence's world-class portfolio of leading IP and advanced design solutions to enable our customers to deliver high-volume, high-performance and power-efficient SoCs on Intel's leading-edge process technologies."

HXL (@9550pro) has highlighted an intriguing pinned post on the Chinese Zhihu community site—where XZiar, a self described "Central Processing Unit (CPU) expert," has shared a very fuzzy/low quality screenshot of a Windows Task Manager session. The information on display indicates that a "Genuine Intel(R) 0000 1.0 GHz" processor was in use—perhaps a very early Lunar Lake (LNL) engineering sample (ES1). XZiar confirmed the pre-release nature of the onboard chip, and teased its performance prowess: "It's good to use the craftsmanship that others have stepped on. It can run 2.8 GHz with only A1 step, and it is very smooth."

The "A1" designation implies that the leaked sample is among the first LNL processor prototypes to exit manufacturing facilities—Intel previewed its "Lunar Lake-MX" SoC package to press representatives last November. XZiar's followers have pored over the screenshot and ascertained that the leaked example sports a "8-core + 8-thread, without Hyperthreading, 4P+4LPE" configuration. Others were confused by the chip's somewhat odd on-board cache designations—L1: 836 KB, L2: 14 MB and L3: 12 MB—XZiar believes that prototype's setup "is obviously not up to par," when a replier compares the spec to an N300 series processor. It is theorized that Windows Task Manager is simply not fully capable of detecting the sample's full makeup, but XZiar reckons that 12 MB of L3 cache is the correct figure.

Reports are circulating online that Nintendo's upcoming successor to the Switch console, tentatively referred to as the "Switch 2," will offer backward compatibility for physical game cards and digital purchases from the current Switch library. While Nintendo has yet to officially announce the new console, speculation points to a potential reveal as early as next month for a 2024 launch. The backward compatibility claims first surfaced last year when Nintendo America President Doug Bowser hinted at supporting continuity between console generations to minimize the sales decline when transitioning hardware. New momentum behind the rumors comes from gaming industry insiders Felipe Lima and PH Brazil, who, during recent podcasts, stated the Switch 2 has backward compatibility functionality already being shared with game developers.

Well-known gaming leakers "NateTheHate" and others have corroborated that testing is underway for playing current Switch games on new hardware. If true, this backward compatibility would be a consumer-friendly move that breaks from Nintendo's past tendencies of forcing clean breaks between console ecosystems. While details remain unconfirmed by Nintendo, multiple credible sources point to the upcoming Switch successor allowing gamers to carry forward both their physical and digital libraries to continue enjoying this generation's releases. If the compatibility remains, the hardware platform could stay in the playing field of the same vendor—NVIDIA—who provided Nintendo with Tegra X1 SoC. The updated version of the SoC could use a fork of NVIDIA's Orin platform based on Ampere GPU with DLSS, but official details are yet to be seen.

iFixit has finally posted photos of the Apple Vision Pro's inner bits, following on from the release of a video teardown (uploaded last week)—the American e-commerce and how-to website spent plenty of hours exploring the expensive mixed reality headset's "creepy" features, before breaking seals and deconstructing the device's highly complex interior. The iFixit teardown team have often complained about Apple computer products being notoriously difficult to deal with—the Vision Pro is no exception, but they eventually managed to isolate the headset's logic board. The onboard M2 octa-core chipset is identified as a APL1109/339S01081E part, while its assistant R1 sensor co-processor sports an APL1W08/339S01186 identifier. Micron has supplied 8 GB of LPDDR5 SDRAM memory (MT62F1G64D8WT-031 XT), and Kioxia has Apple covered with its K5A4RC2097 256 GB NAND flash.

Tech experts have spent time poring over iFixit's latest set of snaps, as laid out in their teardown guide—one such enthusiast, Yining Karl Li, posted an intriguing Apple Vision Pro Logic Board observation to social media: "There's this interesting shot of the main logic board (in Step 1). The R1 chip (in the red box) has interesting lines all over it dividing the surface into sub-boxes. Is the R1 chip using a chiplet design?" A small debate erupted from this quick inspection—one commenter believes that the co-processor is not all that fancy: "(it is) likely sporting low-latency fan-out memory," citing the presence of very faint horizontal and vertical lines. As pointed out by Wccftech, Li also presented a chiplet design example (for comparison purposes)—a close-up shot of Intel's Ponte Vecchio Xe-HPC GPU. The lines are a lot more pronounced on Team Blue's chip design.

AMD today announced the launch of AMD Embedded+, a new architectural solution that combines AMD Ryzen Embedded processors with Versal adaptive SoCs onto a single integrated board to deliver scalable and power-efficient solutions that accelerate time-to-market for original design manufacturer (ODM) partners. Validated by AMD, the Embedded+ integrated compute platform helps ODM customers reduce qualification and build times for faster time-to-market without needing to expend additional hardware and R&D resources. ODM integration using Embedded+ architecture enables the use of a common software platform to develop designs with low power, small form factors, and long lifecycles for medical, industrial, and automotive applications.

"In automated systems, sensor data has diminishing value with time and must operate on the freshest information possible to enable the lowest latency, deterministic response," said Chetan Khona, senior director of Industrial, Vision, Healthcare and Sciences Markets, AMD. "In industrial and medical applications, many decisions need to happen in milliseconds. Embedded+ maximizes the value of partner and customer data, with energy efficiency and performant computing that enables them to focus in turn on addressing their customer and market needs."

Semiconductor Manufacturing International Corp (SMIC) is preparing new semiconductor production lines at its Shanghai facilities according to a fresh Reuters report—China's largest contract chip maker is linked to next generation Huawei SoC designs, possibly 5 nm-based Kirin models. SMIC's newest Shanghai wafer fabrication site was an expensive endeavor—involving a $8.8 billion investment—but their flagship lines face a very challenging scenario with new phases of mass production. Huawei, a key customer, is expected to "upgrade" to a 5 nm process for new chip designs—their current flagship, Kirin 9000S, is based on a SMIC 7 nm node. Reuter's industry sources believe that the foundry's current stable of "U.S. and Dutch-made equipment" will be deployed to "produce 5-nanometer chips."

Revised trade rulings have prevented ASML shipping advanced DUV machinery to mainland China manufacturing sites—SMIC workers have reportedly already repurposed the existing inventory of lithography equipment for next-gen pursuits. Burn Lin (ex-TSMC), a renowned "chip guru," believes that it is possible to mass produce 5 nm product on slightly antiquated gear (previously used for 7 nm)—but the main caveats being increased expense and low yields. According to a DigiTimes Asia report, mass production of a 5 nm SoC on SMIC's existing DUV lithography would require four-fold patterning in a best case scenario.

Intel, Microsoft, and a fabless semiconductor company making analog, mixed-signal, and audio DSP, Cirrus Logic, have collaborated on a new reference laptop design to showcase the upcoming Lunar Lake mobile CPUs. The goal is to enable "cool, quiet, and high-performance" laptops that push the boundaries of efficiency, thickness, and acoustics. The reference design incorporates three key components from Cirrus Logic - the CP9314 power converter chip, CS42L43 audio codec, and CS35L56 amplifier. The CP9314 is the most critical element, using advanced power conversion technology to improve Lunar Lake's power efficiency significantly. This enables thinner and quieter laptops with longer battery life. The codec and amplifier chips also play a role, providing high-quality audio with next-generation features like spatial audio support.

Together, these Cirrus Logic components aim to highlight Lunar Lake's capabilities for efficiency, performance, and immersive experiences in a thin and light form factor. While details remain scarce on the Lunar Lake CPUs themselves, they are expected to arrive later this year, likely in the second half. If the reference laptops live up to their promises, Lunar Lake could help Intel regain leadership in mobile computing efficiency, which has been lacking since the introduction of Apple's M series SoCs, which have superior battery life. With expert collaboration from Microsoft and Cirrus Logic on the peripheral hardware and software, Lunar Lake may usher in a new generation of cool, quiet, and powerful laptops.

Faraday Technology Corporation, a Taiwanese silicon IP designer, has announced plans to develop a new 64-core system-on-chip (SoC) utilizing Intel's most advanced 18A process technology. The Arm-based SoC will integrate Arm Neoverse compute subsystems (CSS) to deliver high performance and efficiency for data centers, infrastructure edge, and 5G networks. This collaboration brings together Faraday, Arm, and Intel Foundry Services. Faraday will leverage its ASIC design and IP solutions expertise to build the SoC. Arm will provide the Neoverse compute subsystem IP to enable scalable computing. Intel Foundry Services will manufacture the chip using its cutting-edge 18A process, which delivers one of the best-in-class transistor performance.

The new 64-core SoC will be a key component of Faraday's upcoming SoC evaluation platform. This platform aims to accelerate customer development of data center servers, high-performance computing ASICs, and custom SoCs. The platform will also incorporate interface IPs from the Arm Total Design ecosystem for complete implementation and verification. Both Arm and Intel Foundry Services expressed excitement about working with Faraday on this advanced Arm-based custom silicon project. "We're thrilled to see industry leaders like Faraday and Intel on the cutting edge of Arm-based custom silicon development," said an Arm spokesperson. Intel SVP Stuart Pann said, "We are pleased to work with Faraday in the development of the SoC based on Arm Neoverse CSS utilizing our most competitive Intel 18A process technology." The collaboration represents Faraday's strategic focus on leading-edge technologies to meet evolving application requirements. With its extensive silicon IP portfolio and design capabilities, Faraday wants to deliver innovative solutions and break into next-generation computing design.

Cristiano Renno Amon, President and CEO of Qualcomm, discussed the successful launch of his company's Snapdragon 8 Gen 3 mobile platform during a January 31 Earnings Call—expectations have been set high for the flagship smartphone chipset: "(bringing) a new standard for on-device gen AI experiences for premium smartphones and powers all through flagship Android devices launched and launching this fiscal year." Amon highlighted Samsung's recently rolled out Galaxy S24 Ultra range, that makes use of a special "For Galaxy" Snapdragon 8 Gen 3 SoC. Industry watchdogs have continued to question Samsung's reliance on third-party processor solutions (including MediaTek Dimensity parts), despite having access to plenty of "worthy" in-house technology. Their flagship Exynos 2400 chip has been deployed with the Galaxy S24 Plus range, but Qualcomm Snapdragon-equipped devices offer better performance and efficiency.

The picky segment of Samsung's smartphone userbase will be pleased to hear about a renewed agreement between it and Qualcomm, which includes a trickling down to mid-range offerings—Amon made a big announcement during the late January conference call: "We're also announcing that we extended a multi-year agreement with Samsung relating to Snapdragon platforms for flagship Galaxy smartphone launches starting in 2024. The extended agreement demonstrates the value of Snapdragon 8, our technology leadership and our successful long-term strategic partnership with Samsung. In the quarter, we also announced the Snapdragon 7 Gen 3 mobile platform, which brings leading gen AI capabilities to high-tier Android smartphones and is a category leader in both experiences and performance." Going forward, Samsung is likely sticking with its current operating model of peppering a mix of Snapdragon and Exynos chipsets throughout its Galaxy Z, S and A product ranges.

Qualcomm and its smartphone manufacturer partners are reported to be in a rush to get the Snapdragon 8 Gen 4 chipset released later this year—Digital Chat Station believes that a pioneering mobile device could enter a mass production phase around September of this year. Prototype devices are allegedly up and running—the tipster's insider sources have alluded to engineering samples being capable of reaching 4.0 GHz clocks on a high-powered Big Core (Nuvia's Oryon or Phoenix). Qualcomm's Snapdragon 8 Gen 3 SoC was revealed last October, and working hardware is slowly trickling out via retail avenues in early 2024—Digital Chat Station does not provide any reasoning behind the race to get the successor across the finish line within the same year.

An unnamed smartphone manufacturer is said to have outfitted a "dual-curved screen" model with a Snapdragon 8 Gen 4 chipset—Wccftech's report suggests that Xiaomi usually gets first dibs on cutting edge Qualcomm processor tech. The Nuvia engineering team has likely got their custom Oryon cores running to more than satisfactory levels—the article points out that: "a previous Geekbench 6 single-core and multi-core leak revealed that the (3 nm) Snapdragon 8 Gen 4 competes with Apple's M3 and is 46 percent faster than the Snapdragon 8 Gen 3 in multi-threaded workloads." Qualcomm is facing fierce flagship chip competition in 2024—MediaTek's Dimensity 9400 SoC could arrive at a cheaper price point, while offering comparable performance and efficiency.

Digital Chat Station has seemingly received insider information regarding the performance of Qualcomm's Snapdragon 8 Gen 4 mobile chipset—their source reports that a probable engineering sample is already exceeding its predecessor's Big core (Cortex-X4) maximum limit of 3.3 GHz. The rumor mill has Nuvia's custom Oryon cores linked to the next generation mobile processor, although some experts think that the Phoenix design was selected for Gen 4. Qualcomm's Snapdragon X Elite notebook SoC was unveiled last October—this ARM-based solution is set to deliver "a dramatic leap in innovation for computing" thanks to Nuvia's custom Oryon technology. Kedar Kondap, Senior Vice President & General Manager of Compute & Gaming stated that the Snapdragon X Elite offers: "super-charged performance that will delight consumers with incredible power efficiency and take their creativity and productivity to the next level."

Digital Chat Station's brief assessment of the prototype Snapdragon 8 Gen 4's Big core prowess is also glowing: "4.0 GHz is no longer a dream" on smartphones. Past reports have Qualcomm signed up with TSMC for an unspecified 3 nm production process—next generation silicon will benefit greatly in terms of power efficiency, with custom Oryon or Phoenix cores (allegedly) achieving greater clock speeds thanks to some extra headroom. As mentioned above, the previous-gen Kryo Prime core—using TSMC's advanced 4 nm node—is factory restricted to 3.3 GHz. Tipsters reckon that efficiency cores are not part of the Snapdragon 8 Gen 4 design, due to the innate benefits of 3 nm—according to Digital Chat Station, MediaTek is taking similar steps with its upcoming Dimensity 9400 SoC.

Last week Patrick Moorhead, CEO and founder of Moor Insights & Strategy, shared his insider sourced thoughts about ARM's next generation Cortex-X processor: "Blackhawk is planned to enable in smartphones shipping at the end of 2024. I think phones could be on the shelf a year from now at CES or maybe MWC." Moorhead believes that Cortex-X4's successor will be the most powerful option available at launch, which forms part of (ARM CEO) Rene Haas's strategy to "eliminate the performance gap between ARM-designed processors and custom ARM implementations." He believes that "this is a big and bold claim," since Apple is widely considered to rule the roost here with its cutting edge ARM-based Bionic designs. Moorhead's inside information has "Blackhawk" demonstrating the "largest year-over-year IPC performance increase in 5 years" citing undisclosed Geekbench 6 results.

He also presented evidence that the artificial intelligence processing is a key focus: "I am hopeful these performance goals translate to app performance as well. ARM also believes that Blackhawk will provide "great" LLM performance. I will assume that this has to do with big CPU IPC performance improvements as ARM says that its Cortex CPU is the #1 AI target for developers...The NPU and GPU can be an efficient way to run AI, but a CPU is the easiest and most pervasive way, which is why developers target it. A higher-performing CPU obviously helps here, but as the world moves increasingly to smaller language models, Arm's platform with higher-performing CPU and GPU combined with its tightly integrated ML libraries and frameworks will likely result in a more efficient experience on devices."

Today marks the launch of not just two new incredibly well-designed NAS devices, but also two new features brand new to the ASUSTOR line of NAS devices with ARM processors. The introduction of the Drivestor 2 Pro Gen2 and Drivestor 4 Pro Gen2 come with an upgraded SoC, providing 21% more performance, which increases read and write speeds and performance for the features and apps available for the Drivestor Pro Gen2. The Drivestor Pro Gen2 series comes with 2.5-Gigabit Ethernet, hot-swappable hard drive bays, hardware transcoding, tool-free design and more! The upgraded iGPU found in the Drivestor Pro Gen2 now gives even better performance when transcoding multimedia.

The all-new Drivestor Pro Gen2 series comes with a new killer feature. Btrfs is now supported on the Drivestor Pro Gen2, a first for ASUSTOR NAS devices running ARM CPUs. Btrfs helps protect data by enabling snapshots of data at certain points in time and is able to rewind the clock should any unintentional modifications be made and restore data if needed.

Today, AMD announced it will showcase automotive innovation at CES 2024 and expand its portfolio with the introduction of two new devices, the Versal AI Edge XA adaptive SoC and Ryzen Embedded V2000A Series processor. The devices underscore AMD automotive technology leadership and are designed to serve key automotive focus segments including infotainment, advanced driver safety and autonomous driving. Working alongside a growing automotive partner ecosystem, AMD will demonstrate at CES 2024 the broad range of capabilities and applications for these new devices in automotive solutions available today and in the future.

Versal AI Edge XA adaptive SoCs add an advanced AI Engine, enabling the devices to be further optimized for numerous next-generation advanced automotive systems and applications including: forward cameras, in-cabin monitoring, LiDAR, 4D radar, surround-view, automated parking and autonomous driving. Versal AI Edge XA adaptive SoCs are also the first AMD 7 nm device to be auto-qualified, bringing hardened IP and added security to automotive applications where safety is paramount.

MINISFORUM unveiled a high-end tablet convertible based on the Windows 11 x64 platform. Called simply the V3 AMD Tablet, this 3-in-1 convertible can be used as a 14-inch tablet, or combined with a dock that adds a keyboard, trackpad, and a stand. The tablet measures 318 mm x 213.8 mm x mm 9.8 mm (WxDxH), weighing 946 g. Its 14-inch 16:10 aspect-ratio display offers a 2560 x 1600 pixels resolution, with 165 Hz refresh rate, 100% DCI-P3 coverage, and 500 nits maximum brightness. This display is backed by a sensitive touchscreen that supports MPP 2.6 SLA and sensitivity suitable for a natural handwriting stylus.

Connectivity includes Wi-Fi 6E with Bluetooth 5.3, a USB-C V-Link (DP in), two 40 Gbps USB4, a fingerprint reader, and 4-pole headset jack. Under the hood, the MINISFORUM V3 is powered by an AMD Ryzen 7 8040U series "Hawk Point" processor, paired with 32 GB of LPDDR5-6400 memory, and a 2 TB M.2 Gen 4 NVMe SSD. The SoC has a 28 W configured TDP, and MINISFORUM has innovated a four flat copper heatpipe, dual fan cooling solution. The tablet also has a 4-speaker setup and multi-directional microphone. The front camera is 2 MP with full Windows Hello compatibility, while the rear cam is 5 MP. Powering it all is a 50.82 Wh battery, and a 65 W USB-PD power source over a type-C connector. Windows 11 Pro 23H2 with Ryzen AI enablement comes pre-installed. The company didn't reveal pricing.

Apple has been experimenting with Large Language Models (LLMs) that power most of today's AI applications. The company wants these LLMs to serve the users best and deliver them efficiently, which is a difficult task as they require a lot of resources, including compute and memory. Traditionally, LLMs have required AI accelerators in combination with large DRAM capacity to store model weights. However, Apple has published a paper that aims to bring LLMs to devices with limited memory capacity. By storing LLMs on NAND flash memory (regular storage), the method involves constructing an inference cost model that harmonizes with the flash memory behavior, guiding optimization in two critical areas: reducing the volume of data transferred from flash and reading data in larger, more contiguous chunks. Instead of storing the model weights on DRAM, Apple wants to utilize flash memory to store weights and only pull them on-demand to DRAM once it is needed.

Two principal techniques are introduced within this flash memory-informed framework: "windowing" and "row-column bundling." These methods collectively enable running models up to twice the size of the available DRAM, with a 4-5x and 20-25x increase in inference speed compared to native loading approaches on CPU and GPU, respectively. Integrating sparsity awareness, context-adaptive loading, and a hardware-oriented design pave the way for practical inference of LLMs on devices with limited memory, such as SoCs with 8/16/32 GB of available DRAM. Especially with DRAM prices outweighing NAND Flash, setups such as smartphone configurations could easily store and inference LLMs with multi-billion parameters, even if the DRAM available isn't sufficient. For a more technical deep dive, read the paper on arXiv here.

Microsoft Xbox Series X/S, their hardware refreshes, and variants, will reportedly be the company's mainstay all the way up until 2028, the company disclosed in its documents filed as part of its anti-trust lawsuit with the FTC. In a presentation slide titled "From "Zero Microsoft" to "Full Microsoft," the company explains how its next gen Xbox, scheduled for calendar year (CY) 2028, will see a full convergence of Microsoft co-developed hardware, software, and cloud compute services, into a powerful entertainment system. It elaborates on this in another slide, titled "Cohesive Hybrid Compute," where it states the company's vision to be the development of "a next generation hybrid game platform capable of leveraging the combined power of the client and cloud to deliver deeper immersion and entirely new classes of game experiences."

From the looks of it, Microsoft fully understands the creator economy that has been built over the gaming industry, and wants to develop its next-gen console to target exactly this—a single device from which people can play, stream, and create content from—something that's traditionally reserved for gaming desktop PCs. Game streamers playing on consoles usually have an entire creator PC setup handling the production and streaming side of things. Keeping this exact use-case in mind, Microsoft plans to "enable new levels of performance beyond the capabilities of the client hardware alone," by which it means that not only will the console rely on its own hardware—which could be jaw-dropping powerful as you'll see—but also leverage cloud compute services from Microsoft.

On December 14 Intel launched its first generation Core Ultra "Meteor Lake" line of mobile processors, and here is a a brief overview of the various processor models on offer at launch, thanks to a compilation by ComputerBase.de. "Meteor Lake" is Intel's first completely disaggregated processor, in which its numerous components are broken up into chiplets fabricated on different foundry nodes that strike the right performance/Watt suitable to the component, all held together by Intel's Foveros packaging technology (an evolution in multi-chip modules with a design focus on reducing inter-chiplet latencies to levels comparable to components on a monolithic chip). "Meteor Lake" also introduces a 3-tiered heterogeneous CPU architecture, with the introduction of the low-power island CPU cores.

Intel's mobile processor lineup is broadly categorized into the U-segment, targeting thin-and-light and ultraportable devices; and the H-segment, targeting notebooks of conventional thickness. At launch, the Core Ultra H-segment, and U-segment processors will coexist with P-segment processor models from the 13th Gen Core "Raptor Lake" series; as well as the upcoming 14th Gen Core "Raptor Lake Refresh" HX-segment. The P-segment is positioned between the U- and H-segments, targeting a class of devices that either what to be thin-and-light mainstream notebooks, or higher performance ultraportables. The HX-segment caters to high performance gaming notebooks and mobile workstations.

Intel on Wednesday held a pre-launch round-table with HotHardware, in which it made several performance disclosures of its upcoming Core "Meteor Lake" mobile processor, comparing it with the current U-segment chips based on the 13th Gen Core "Raptor Lake," and competing AMD Ryzen 7040 "Phoenix." In these, the company is claiming that its next-generation iGPU based on the Xe-LPG graphics architecture, armed with 128 EU, is significantly outperforming the Radeon 780M RDNA3 iGPU of the Ryzen 7040, while its CPU is ahead in multi-threaded performance.

In its comparison, the company picked the Core Ultra 7 165H, a middle-of-the-market performance segment part in the 28 W class. This is compared to the Core i7-1370P "Raptor Lake," and the AMD Ryzen 7 7840U. The company also dropped in the fastest Windows-ready Arm chip in the market, the Qualcomm 8cx Gen 3. In the 33 games that the 165H was compared to the 7840U, the Intel iGPU is shown posting performance leads ranging between 3% to 70% over the Radeon 780M, in 23 out of 33 games. In one of the games, the two perform on par with each other. In 9 out of 33 games, the Radeon 780M beats the Intel Xe-LPG by 2% to 18%. The iGPU of the 165H packs 8 Xe cores, or 128 EU (1,024 unified shaders). The Radeon 780M is powered by 12 RDNA3 compute units (768 stream processors).

TSMC's 2 nm-class foundry node, dubbed N2, will enter mass production only in 2025, a report by the Financial Times says. The premier Taiwan-based foundry has been reportedly showcasing TSMC N2 to its biggest customer for advanced nodes, Apple. The node will likely power Apple's in-house silicon that drives the iPhone 17 Pro and Pro Max devices that are slated for 2025. This implies that the current 3 nm class nodes from TSMC will continue to power Apple silicon into 2024 and its iPhone 16 Pro/Pro Max.

The current Apple A17 Pro and M3 chips powering the iPhone 15 Pro/Max and the H2-2023 Macs are based on TSMC's N3 node, with a 183 MTr/mm² transistor density. TSMC has four other 3 nm-class nodes, with the N3E node that just entered mass production to offer a jump to 215.6 MTr/mm², and its 2024 successor, the N3P, pushing transistor densities further up to 224 MTr/mm². TSMC's first 2 nm-class node, the N2, offers a jump to around 259 MTr/mm², which makes the N3P a nice halfway point for Apple between the N3 and N2, for its 2024 silicon.