Thursday, July 16th 2015
Moore's Law Buckles as Intel's Tick-Tock Cycle Slows Down
Intel co-founder Gordon Moore's claim that transistor counts in microprocessors can be doubled with 2 years, by means of miniaturizing silicon lithography is beginning to buckle. In its latest earnings release, CEO Brian Krzanich said that the company's recent product cycles marked a slowing down of its "tick-tock" product development from 2 years to close to 2.5 years. With the company approaching sub-10 nm scales, it's bound to stay that way.
To keep Moore's Law alive, Intel adopted a product development strategy it calls tick-tock. Think of it as a metronome that give rhythm to the company. Each "tock" marks the arrival of a new micro-architecture, and each "tick" marks its miniaturization to a smaller silicon fab process. Normally, each year is bound to see one of the two in alternation.
"Penryn" was Intel's first 45 nm chip and miniaturization of "Conroe", "Nehalem" was a newer architecture on 45 nm, "Westmere" was its miniaturization to 32 nm, "Sandy Bridge" was a newer architecture on 32 nm, "Ivy Bridge" was its miniaturization to 22 nm, "Haswell" was a new architecture on 22 nm, and "Broadwell" is its miniaturization to 14 nm. "Skylake" is a new architecture on 14 nm. It was all well and good until "Broadwell."
Intel approached "Broadwell" slower than expected, because implementing the 14 nm node took longer. Intel launched its "Haswell Refresh" silicon to hold ground over mid-2014 to mid-2015. To compensate for lost ground, the company allowed "Broadwell" to be cannibalized by an on-schedule "Skylake" launch. The two less-than-memorable Broadwell desktop chips, the i7-5775C and i5-5675C, are tough to find in the retail market.
Krzanich suggested that the company could face a similarly slow product development cycle as it approaches the limits of how small it can make its chips using existing materials. With "Skylake" out this August, it could be a while before you see its miniaturization to 10 nm, codenamed "Cannonlake." IBM has had better luck with sub-10 nm. The company recently demonstrated a 7 nm chip built with a new silicon-germanium alloy substrate. IBM recently sold the division responsible for this in-toto, to GlobalFoundries, the principal foundry partner of AMD. Krzanich concluded that Moore's Law is still "alive and safe," and that it's not the first time it faced difficulties.
To keep Moore's Law alive, Intel adopted a product development strategy it calls tick-tock. Think of it as a metronome that give rhythm to the company. Each "tock" marks the arrival of a new micro-architecture, and each "tick" marks its miniaturization to a smaller silicon fab process. Normally, each year is bound to see one of the two in alternation.
Intel approached "Broadwell" slower than expected, because implementing the 14 nm node took longer. Intel launched its "Haswell Refresh" silicon to hold ground over mid-2014 to mid-2015. To compensate for lost ground, the company allowed "Broadwell" to be cannibalized by an on-schedule "Skylake" launch. The two less-than-memorable Broadwell desktop chips, the i7-5775C and i5-5675C, are tough to find in the retail market.
Krzanich suggested that the company could face a similarly slow product development cycle as it approaches the limits of how small it can make its chips using existing materials. With "Skylake" out this August, it could be a while before you see its miniaturization to 10 nm, codenamed "Cannonlake." IBM has had better luck with sub-10 nm. The company recently demonstrated a 7 nm chip built with a new silicon-germanium alloy substrate. IBM recently sold the division responsible for this in-toto, to GlobalFoundries, the principal foundry partner of AMD. Krzanich concluded that Moore's Law is still "alive and safe," and that it's not the first time it faced difficulties.
47 Comments on Moore's Law Buckles as Intel's Tick-Tock Cycle Slows Down
It cant just keep getting smaller. I know a lot of people think this it is magic, well it isn't, it is engineering and they literally aren't able to engineer it smaller, right now!
I am sure competition plays some part in this, the slower they make new chips the more they make on current chips, meaning they don't have to spend as much on engineering, research&design, and new market research. the competition is themselves.
IBM did demonstrate a 7nm process but that's hardly anything production ready. It was only a proof of concept.
arstechnica.com/gadgets/2015/02/intel-forges-ahead-to-10nm-will-move-away-from-silicon-at-7nm/
It didn't slow down because it's so hard to make good tech, it's slowed down because Intel has no interest in making things faster and cheaper with pretty much no real competition around...
The graph on the left was what I was talking about. That line could turn sharply up unless breakthroughs are made.
The number of transistors economically viable on a chip will double every 2 years. The only reason it has been linked to node size is because that how you made transistors cheaper, Since that already is starting to fail.
Remember a more interesting graph showing the relative performance of CPUs in a comuter arcitecture class i had at university, it flattens out after Nehalem.
Anyway I am expecting some sci-fi stuff the coming years.
Intel has still been keeping Moore's Law alive, but TSMC (and everyone else) has been behind it for a long time. With Broadwell that law no longer applies to Intel either.
www.technologyreview.com/view/518426/how-to-save-the-troubled-graphene-transistor/
There is also a difference between technology that the public knows about and uses and technology that is magnitudes better, but will never be advertised until years/decades later. It is simply drivelled out as the TPTB see fit.
I remember it being quoted as doubling every 1.5 years many moons ago, so it's been on a slowdown for a long time. In fact, I'd say we actually hit the brick wall way back in 2004 when power usage and heat became too high, so clock rates got stuck at their current frequencies of maxing out at 3.5-4GHz. Who remembers Intels initial plans to have the Pentium 4 scale to 10GHz and beyond? They came crashing down because of this issue.
Intel and others then managed to work around it by increasing core count, transistor density and more efficient architecutures, but it's obvious that this strategy can't last forever, as we eventually reach the size of atoms, so there's a minimum size for the transistors.
This limitation is a real bummer, so I hope they find another way around it soon.
So full of BS Intel...so full of BS...
Also single conventional Si transistors can also hit really really high clocks. The problem is that in a CPU you have several billion transistors and if one of them can't do more than 4Ghz at X voltage then the whole CPU has to run at 4Ghz. If you had CPUs with really really low transistor counts you could in theory end up with chips that can run super high clocks.
IBM has CPUs that ship at 5Ghz+.
He was very excitable and full of vigor about the upcoming revolution in computing power.
"Photons"
I told him he sounded like a flake and was driving people away. He stopped for a moment, looked around and realized we were now the only two people standing in the once full Kitchen.
He looked at me, with a little less enthusiasm and said, "You might be right."
I turned and walked outside to join the crowd by the fire while he stood there, alone, for a few moments. Half an hour later I saw him in the basement, he seemed to have taken on a more casual vibe and was calmly conversing with another group.
He stopped me as I walked by, His eyes sparkling like a stoned Sophomore and said "Thanks Man."
That was the last I heard of the Photon Revolution in Computing Power, and the last I ever saw of that guy.
:D