Tuesday, May 30th 2017
Intel's Skylake-X, Kaby Lake-X HEDT CPUs to use TIM; Won't be Soldered
If you had your eyes on those new Intel HEDT processors, which were posted just today with some... Interesting... price-points, you'll be a little miffed to know that Intel has gone on and done it again. The few cents per unit that soldering the CPU would add to the manufacturing costs of Intel's HEDT processors (starting at $999, tray-friendly prices) could definitely bring the blue giant to the red. As such, the company has decided to do away with solder even on its HEDT line of high-performance, eye-wateringly-expensive CPUs in favor of their dreaded TIM.
The news have been confirmed by der8auer, a renowned overclocker. And as you have probably seen in our own VSG's review (and if you haven't shame on you and click that link right away), delidding Intel's CPU's and ridding them of their TIM can improve temperatures by up to a staggering 21 ºC (case in point, an i7-7700K). And that's a quad-core CPU; imagine an Intel Core i9-7980XE 18-core processor sitting under that TIM, and overclocking it to boot. Those are more than four times the cores under an equally bad thermal interface; add to that the likely presence of a thermally-insulating air-gap, and you can imagine where this is going. If you are planning on going for Intel's HEDT platform, you better take those delidding tools off your shelf.
Update: Check this video here for some more information. Turns out both Skylake-X and Kaby Lake-X will make use of the referred TIM, but Skylake-X dies, which make use of a stacked PCB, won't be deliddable with current tools. A new tool is going to be developed by der8auer alongside ASUS for these chips.
Source:
Overclock 3D
The news have been confirmed by der8auer, a renowned overclocker. And as you have probably seen in our own VSG's review (and if you haven't shame on you and click that link right away), delidding Intel's CPU's and ridding them of their TIM can improve temperatures by up to a staggering 21 ºC (case in point, an i7-7700K). And that's a quad-core CPU; imagine an Intel Core i9-7980XE 18-core processor sitting under that TIM, and overclocking it to boot. Those are more than four times the cores under an equally bad thermal interface; add to that the likely presence of a thermally-insulating air-gap, and you can imagine where this is going. If you are planning on going for Intel's HEDT platform, you better take those delidding tools off your shelf.
Update: Check this video here for some more information. Turns out both Skylake-X and Kaby Lake-X will make use of the referred TIM, but Skylake-X dies, which make use of a stacked PCB, won't be deliddable with current tools. A new tool is going to be developed by der8auer alongside ASUS for these chips.
72 Comments on Intel's Skylake-X, Kaby Lake-X HEDT CPUs to use TIM; Won't be Soldered
I'll be frank: I'm flabberghasted. This is so dumb it's having me on the verge of going Ryzen just in protest.
Nothing to see here, this is Intel doing an 'old AMD' yelling 'MOAR CORES' and 'HIGHER CLOCKS'.... with all the added goodness of higher power consumption. This isn't progress, it's a step back. It is poverty on Intel's part.
Only 16 pciex channels and dual channel memory too , doesn't sound appealing.
Anyone buying X299 is part of the problem, you're just enabling them. Why the hell are they ever going to do any different if they can make more money cutting corners? No business man in their right mind wouldn't advocate this strategy, so if you insist on buying Intel, accept that you will eat their sh*t and stop complaining.
Skylake-X has a redesigned cache hierarchy. At least since Nehalem, Intel have used inclusive L3 caches, which means that everything in L2 is duplicated in L3, the purpose of this is when multiple threads accesses the same cache line, accessing it from L3 is much faster than system memory. The cache can contain either data or code. In real life data is usually present in the cache for microseconds or less, contrary to popular belief, the "important stuff" is not retained in the cache. So for data the L2/L3 cache is just a streaming buffer, constantly changing it's content as the threads processes the data. Usually >90% of the cache or so is data, and since cache lines are constantly replaced, multiple threads basically share nearly "nothing". In essence, the inclusive L3 cache is wasting almost 256kB per core.
Making the L3 non-inclusive and exchanging some of it for more L2 cache will increase cache usage, and may help some use cases quite a bit.
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And why is 28 PCIe lanes a problem? It doesn't matter for gaming, even in SLI. Anyone needing more PCIe lanes would be doing some serious compute workloads, and would require one of the more expensive CPUs anyway.
With each successive tim, they get an extra 100mhz, and the ability to call it the 'next generation', eventually eking out the processors to somewhere just over 5ghz.
But, they won't start this slow progression til they exhaust all other avenues to processor improvements... (i.e. it's a few to several years away).
They will milk the consumers with other 'new generation' chips along the way (smaller nodes) til they hit the limit. And this ability to replace the tim provides them a few more years of 'new generation' chips on top.
i.e. Their holding an ace up the sleeve (or more appropriate, the joker).
This is good for benchmarking, but for most, not much real world in the least. For those that want to 'see' lower temps that are within spec, well, i understand, but, go see a psychologist and get over it. :p
They better stick with the 7700K as last released CPU and start developing something trully new.
www.techpowerup.com/forums/threads/ryzen-owners-zen-garden.231658/page-11#post-3667963
There's your answer about CPU soldering.
The cracks or voids can me made only when reaching Tj max. After that it will boil and yeah... who cares about cracks after your cpu is dead eventually... there are xrays... well they did actually boil the CPU somehow... not in a motherboard for sure as the thing should be dead. Actually the glue is also elastic, during the soldering process the IHS will float and even out the pressure.
The most solid argument are statistics.
XEON have not shown any issues, ask WCG people, even the older socket grandfathers stones running 24/7 on crap cooling for years. Sandy's are still running fine for most of people using them, so this crack mumbo jumbo is kind of like hangover geek talk(actually it could be also). There are imperfections even for soldering, but not at such scale.
All things considered... using TIM is cheaper... and there is simply not even a discussion, also using a thinner substrate. Problem is... this is a costy HEDT product... it is just unfair even if it works fine at stock, but it is not aimed to do so really unlike mainstream desktop parts... the TIM gains, yes there are some, but now are kind of cultivated like a disease to defend something... in the end yea... it still performs worse and is cheaper for Intel. DIED Soldered CPU? Hello Warranty... need to delid no warranty? A new business niche and warranty killer?
www.google.com/search?client=ms-android-verizon&ei=dCAuWfGFBeXjjwSHmKHwCQ&q=ivybridge+thermal+paste+gap&oq=ivybridge+thermal+paste+gap&gs_l=mobile-gws-serp.3..30i10k1.1724.10548.0.11326.34.32.0.7.7.0.207.3820.0j28j1.29.0....0...1.1j4.64.mobile-gws-serp..6.28.2911.3..0j35i39k1j0i67k1j0i131k1j0i10k1j0i22i30k1j0i13k1j33i160k1.0LvAdxF0fiE
Now, garbage heat transfer on premium CPUs?
This is what happens when accountants are in charge.