dmartin(most Apple laptops still use DDR-2133 modules)

Fabiohow a little arm cpu can do about 5000 in single core in geek bench when a 5 ghz oc 9700k is about 6500?

R0H1Tdoes the PC crowd still think tablets are toys?

Vya DomusYeah, we do. I am baffled every time I see Apple do a demo with something like Photoshop, who the hell actually does serious work on their tablet on a daily basis ?

Vya Domus… then sure I bet there is someone out there playing Doom unironically on their TI calculator as well.

R0H1TYou forgot to mention that desktop class chips, I assume we're still talking notebooks here, use at least 15W avg TDP with PL2 of generally 25W & the ARM counterparts do well even with half of that i.e. 7W or thereabouts.

I still don't get why everyone is so hung up on GB numbers, are there better cross platform benchmarks around? Is Intel this infallible or does the PC crowd still think tablets are toys? The same was said about Intel vs AMD, before Zen, & we know how that turned out.

stimpy88How about that Photoshop demo? Was that something a Chromebook from 2013 could pull off? Because that's the kind of performance your insinuating. You are correct that GeekBench is not a totally platform and architecture agnostic benchmark, despite what it's authors claim, but I think it's obvious that whatever the A12X's real performance, it's damn close enough to Intel, and can't all be magic tricks and hokus pokus.

Vya DomusYeah, we do. I am baffled every time I see Apple do a demo with something like Photoshop, who the hell actually does serious work on their tablet on a daily basis ? Actually, let me put it the other way around, who would afford to pay 1200$ or however expensive this iPad is and not have a high end laptop around for that ?

Tablets are indeed primarily toys, I have never seen/heard anyone use them outside playing games and watching Netflix. And if you are going to tell that well there has to be someone that uses them as such, then sure I bet there is someone out there playing Doom unironically on their TI calculator as well. That still doesn't make it any less of a joke.

efikkanTo find out, we need to take a look at the source code and find out what it is actually benchmarking on various platforms.

I assume it benchmarks various simulated workloads, including things like compression/decompression, encryption, video decoding/encoding, image formats etc. If the benchmark decides to rely on just using the standard instruction set, then you get an impression of the pure performance. If on the other hand the benchmark uses various specific instructions to accelerate certain workloads, then the benchmark becomes a measurement of those specific algorithms, not generic performance.

The x86 CPU in a desktop is very good at generic workloads, and while it has a few application specific instructions too. But this is nothing compared to many ARM implementations. The CPUs in smartphones and tablets does however rely heavily on specific instructions to accelerate workloads. This does of course give good energy efficiency for those specific algorithms that are accelerated in software built to use them, but anything outside that will perform poorly. It should be obvious that there is a limited amount of such accelerations that can be included on a chip, and support for new algorithms can't be added until they are developed. This means that such hardware becomes obsolete very quickly. But this of course fits very well with the marketing strategy of Apple and other smartphone/tablet makers; they can customize the chips to accelerate the features they want, and Apple control their software too which gives them an extra advantage, leading to new products every cycle which looks much better at some new popular task.

R0H1TSo you're argument is that iOS/iPad is a toy therefore no one can do any serious work on them?

trparkyI keep reading among the posts in this thread about RISC vs CISC. First, modern x86_64 chips aren't CISC chips like they used to be back in the day with complex instruction sets. Well OK, they are on the surface but that's where it ends. Ever heard of something called a Micro-OP? There's an x86 translation layer or... instruction decoder in every modern processor that takes the x86 instructions and converts them to RISC-based micro-ops. Both Intel and AMD have done it for years.

R0H1TNo different than SSE, AVX, AES, SHA "accelerated" benchmarks. In fact x86 has way more instruction sets for certain workloads than ARM.

Vya DomusTablets are indeed primarily toys, I have never seen/heard anyone use them outside playing games and watching Netflix. And if you are going to tell that well there has to be someone that uses them as such, then sure I bet there is someone out there playing Doom unironically on their TI calculator as well. That still doesn't make it any less of a joke.

efikkanNo, you hare mixing things up.
SSE and AVX are SIMD operations, these are general purpose. ARM have their own optional counterparts for these.
AES and SHA are application specific instructions.

Fabiohow a little arm cpu can do about 5000 in single core in geek bench when a 5 ghz oc 9700k is about 6500?

newtekie1Apple is not afraid of putting under-powered crap processors in their computers if it means they can make more money

Vya DomusThe irony is that these chips likely cost more to make than anything comparable from Intel.

Patriotbecause they have been faking their numbers on ios for soo many years they didn't think of what would happen when they reached desktop numbers and everyone started asking them why their laptops weren't on arm...

Here is by far the fastest arm server chip...
www.servethehome.com/cavium-thunderx2-review-benchmarks-real-arm-server-option/6/
www.anandtech.com/show/12694/assessing-cavium-thunderx2-arm-server-reality/7

And it is... competative ish.... using more cores and more power.

newtekie1Yeah, but after you add in Intel's cut, it is probably cheaper for Apple to make their own CPUs than buy them from Intel.

efikkanYeah, different benchmark benchmarking different things.


We've been hearing this from the RISC camp since the late 80s; x86 have too much legacy overhead, RISC is more "efficient" and perhaps "faster". Even back then this was only partially true, but it's important to understand the premises. Back then, CISC chips like 80386 and 80486 were larger chips compared to some of their RISC counterparts, and this was before CPUs hit the power wall, so die size was the deciding factor for scaling clock speed. The reduced instruction set of RISC resulted in smaller designs which was cheaper to make and could be clocked higher, potentially reaching higher performance levels in some cases. But RISC always had much lower performance per clock, so higher clock speed was always a requirement for RISC to be performing.

Since the 80s, CPU designs have changed radically. Modern x86 implementations have nothing in common with their ancestors, with design features such as pipelining, OoO execution, cache, prefetching, branch prediction, superscalar, SIMD and application specific acceleration. As clock speeds have increased beyond 3 GHz, new bottlenecks have emerged; like the power wall and memory wall. x86 today is just an ISA, implemented as different microarchitectures. All major x86 implementations since the mid 90s have adapted a "RISC like" microarchitecture, where x86 is translated into architecture-specific micro-operations, a sort of hybrid approach, to get the best of both worlds.

x86 and ARM implementations have adapted all the techniques mentioned above to achieve our current performance level. Many ARM implementations have used much more application specific instructions. Along with SIMD extensions, these are no longer technically purely RISC designs. Applications specific instructions is the reason why you can browse the web on your Android phone with a CPU consuming ~0.5W, watch or record h.264 videos in 1080p and so on. Some chips even have instructions to accelerate Java bytecode. If modern smartphones were pure RISC designs, they would never be usable like we know them. The same goes for Blu-ray players; if you open one up you'll probably find a ~5W MIPS CPU in there, and it relies either on a separate ASIC or special instructions for all the heavy lifting. One fact still remains, RISC still needs more instructions to do basic operations, and since the power wall is limiting clock speed, RISC will remain behind until they find a way to translate it to more efficient CISC-style operations.

I want to refer to some of the findings from the "VRG RISC vs CISC study" from the University of Wisconsin-Madison:


The only real efficiency advantage we see with ARM is in low power CPUs. But this has nothing to do with the ISA, just Intel failing to make their low-end x86 implementations scale well, this is why we see some ARM designs can compete with Atom.

trparkyI keep reading among the posts in this thread about RISC vs CISC. First, modern x86_64 chips aren't CISC chips like they used to be back in the day with complex instruction sets. Well OK, they are on the surface but that's where it ends. Ever heard of something called a Micro-OP? There's an x86 translation layer or... instruction decoder in every modern processor that takes the x86 instructions and converts them to RISC-based micro-ops. Both Intel and AMD have done it for years. All in all, modern x86_64 chips are designed completely different from what they used to be back in the day, they have more in common with RISC than CISC.

yakkLooks like the x86 days are finally numbered...

AMD was out to lunch for a decade, and intel preferred to milk their willing customer base and pushing innovation at a snail's pace.

All the while ARM was laying down the foundation work they needed. It's not even about Apple's version of the chip. Now ARM is ready and pushing beyond their initial market.