Tuesday, August 6th 2019
Next-generation Intel Xeon Scalable Processors to Deliver Breakthrough Platform Performance with up to 56 Processor Cores
Intel today announced its future Intel Xeon Scalable processor family (codename Cooper Lake) will offer customers up to 56 processor cores per socket and built-in AI training acceleration in a standard, socketed CPU as part of its mainline Intel Xeon Scalable platforms, with availability in the first half of 2020. The breakthrough platform performance delivered within the high-core-count Cooper Lake processors will leverage the capabilities built into the Intel Xeon Platinum 9200 series, which today is gaining momentum among the world's most demanding HPC customers, including HLRN, Advania, 4Paradigm, and others.
"The Intel Xeon Platinum 9200 series that we introduced as part of our 2nd Generation Intel Xeon Scalable processor family generated a lot of excitement among our customers who are deploying the technology to run their high-performance computing (HPC), advanced analytics, artificial intelligence and high-density infrastructure. Extended 56-core processor offerings into our mainline Intel Xeon Scalable platforms enables us to serve a much broader range of customers who hunger for more processor performance and memory bandwidth."
-Lisa Spelman, vice president and general manager of Data Center Marketing, Intel Corporation
The future Intel Xeon Scalable processors (codename Cooper Lake) will deliver twice the processor core count (up to 56 cores), higher memory bandwidth, and higher AI inference and training performance compared to the standard Intel Xeon Platinum 8200 processor. The future 56-core Cooper Lake processor is expected to deliver a lower power envelope than the current Intel Xeon Platinum 9200 processors. Cooper Lake will be the first x86 processor to deliver built-in high-performance AI training acceleration capabilities through new bfloat16 support added to Intel Deep Learning Boost (Intel DL Boost ). Cooper Lake will have platform compatibility with the upcoming 10nm Ice Lake processor.
For more than 20 years, Intel Xeon processors have delivered the platform and performance leadership that gives data center and enterprise customers the flexibility to pick the right solution for their computing needs. Next-generation Intel Xeon Scalable processors (Cooper Lake) build off Intel's uninterrupted server processor track record by delivering leadership performance for customers' real-world workloads and business application needs.
Intel Xeon Platinum 9200 processors are available for purchase today as part of a pre-configured systems from select OEMs, including Atos, HPE, Lenovo, Penguin Computing, Megware and authorized Intel resellers. Learn more information about the Intel Xeon Platinum 9200 processors.
"The Intel Xeon Platinum 9200 series that we introduced as part of our 2nd Generation Intel Xeon Scalable processor family generated a lot of excitement among our customers who are deploying the technology to run their high-performance computing (HPC), advanced analytics, artificial intelligence and high-density infrastructure. Extended 56-core processor offerings into our mainline Intel Xeon Scalable platforms enables us to serve a much broader range of customers who hunger for more processor performance and memory bandwidth."
-Lisa Spelman, vice president and general manager of Data Center Marketing, Intel Corporation
For more than 20 years, Intel Xeon processors have delivered the platform and performance leadership that gives data center and enterprise customers the flexibility to pick the right solution for their computing needs. Next-generation Intel Xeon Scalable processors (Cooper Lake) build off Intel's uninterrupted server processor track record by delivering leadership performance for customers' real-world workloads and business application needs.
Intel Xeon Platinum 9200 processors are available for purchase today as part of a pre-configured systems from select OEMs, including Atos, HPE, Lenovo, Penguin Computing, Megware and authorized Intel resellers. Learn more information about the Intel Xeon Platinum 9200 processors.
56 Comments on Next-generation Intel Xeon Scalable Processors to Deliver Breakthrough Platform Performance with up to 56 Processor Cores
I would list the MB, RAM, SSD, PSU and case manufacturers, but for some reason people don't have allegiances in those markets (if they do, I havent seen it yet.)
en.wikichip.org/wiki/x86/avx512vnni
Intel is just competing with themselves on fpgas with vnni... they are going for an accelerated ecosystem where you have to use all things intel. Intel vnni cpus,fpgas, Xe, onmipath, etc etc.... (though they just killed off 200gbit omnipath)
Intel's challenge to cuda is one api
www.hpcwire.com/2019/05/08/intel-puts-7nm-gpu-on-roadmap-for-2021-oneapi-coming-this-year/
Intel has a hard 2-3yrs ahead of it, but it should rebound, they do have Zen's architect on their payroll afterall... looking forward to buying their stock on discount down the road.
AMD has been maintaining a good cadence with these impressive releases...but they are going to burn out of roadmap after Zen 4/5... and then what?
Hoping they can remain competitive and not make another bulldozer, It's kinda crazy that Keller gets to compete with his own designs...
Are there so few x86 engineers out there even with Intel flaunting their tens of thousands of engineers can't compete with him?
And can only imagine the NDA nightmares...
There were quite a few others (who are still at AMD) in the Zen team. A team builds things these days, generally not one person, although one person may have a lot of influence.
While managers with a technical background is generally much better suited to do good management decisions than non-technical managers, they are still probably limited to "high-level" architectural features, resource prioritization etc.
The people who do the hard work are the core team of engineers below them, but their ability to do their job is of course dependent on good management.
- Power-wise the thread count comparison might be apt but leaving that aside for the moment even current Xeon 9200 do work with 2-socket resulting in 224 threads.
- According to the leaked list, 64-core Romes are 200W and 225W. Hopefully AMD is not doing the same thing as Ryzen 3000 series has on the desktop where default settings are +35% to that.
- 128 PCI-e lanes each means 128 PCI-e lanes total for dual-socket configuration or as servethehome speculates, perhaps 160 with generational improvements. Intel is not doing better - usual, up to 28 core, Xeons have 48 lanes per CPU (96 lanes for dual) and Xeon 9200 has 40 lanes per CPU (80 lanes for dual).
Architecture is not the problem. Power and 14nm is Intel's problem today. If they are stuck with this until they can figure out how 10nm works or if they have another approach, we'll see.
Rome boards are designed with expectation of 250w/socket, either for milan or for turbo, reviews will tell.
128 lanes of PCIE 4 per cpu, or when configured in dual cpu mode half the lanes are coordinated as XGMI links which are x16 links but a more efficient protocol giving lower latency and higher bandwidth.
Server makers can opt to use 3 or 4 XGMI links giving an extra possible 32 lanes but that would sacrifice inter-socket bandwidth while increasing the needs for it. I think its a bad play as 128 pcie 4 lanes is a shitton of bandwidth...
Intel 9200 is BGA and boards and chips have to be bought from intel its a 200k sort of play without ram... and almost no one is buying first gen. It draws too much power, there is no differentiation to be had between vendors... it's just not a good thing. Intel has sort of listened and made a gen2 with cooperlake being socketed and upgradable to icelake.
Comparing 9200 and rome is not useful as it's not really in the market. Intel having 96 pcie 3.0 lanes vs 128-160 pcie 4.0 lanes is just an insane bandwidth difference. As far as server config is concerned I expect many single proc rome servers, and most dual proc to be configured with 3 xgmi links.
Intel will retail single threaded performance advantage in the server realm most likely, but will be dominated in anything that can use the insane amount of threads AMD is offering.
As far as what Keller is working on... he is VP of SOC and is working on die stacking and other vertical highly integrated density gains...
He claiming 50x density improvements over 10nm and it is "virtually working already"
(From wikichip)
225w is the official top sku, I see gigabyte allowing CTDP up to 240w.
What we do know is dual 64c use less than dual 28c by a healthy margin, and 1 64c is about all it takes to match or better dual 28c.
The 2020 "competition" is a socketed version of the 9200, so the bga will no longer be an issue, power probably still will be, or it won't be very competitive.
Currently on an AMD unoptimized path (not using even AVX2 which rome supports) Using AVX512 on Intel, a dual 8280 2x 10k chip will match a 2x 7k Rome setup, give rome AVX2 and that will never happen.Nonono tech, its 10k for 28c ... these 56c chips are 20-40k each and you have to have 2 soldered down on an intel board...
Intel is going to have to offer 80% + discounts to sell chips.
Yall acting like you know everything, tell my why this particular CPU says it supports 128 lanes? www.amd.com/en/products/cpu/amd-epyc-7551p
Don't even tell me "dual socket", its a P CPU. Clearly my glasses are working.