MathraghWhile I agree that it's slightly dishonest, one can argue that it started to matter a whole lot less when the state of the art switched (hehe geddit) away from planar transistors.
Putting 'nm numbers' on things like FinFETs, GAA FETs and whatever else they're cooking up doesn't really make all that much sense anymore anyway, and as technologies continue to develop it's less and less about those nanometers.

If only there was something else both straightforward and catchy that can represent both performance and scaling of the most basic building blocks of transistors these days,..

Edit: It makes me think of those oldskool "3200+" names AMD put on their CPUs when clocks started to matter less compared to IPC. It's not really a straightforward metaphor but similar imho.

Its a number that translates into expected performance, so really anymo rethe node size is mattering less and less and actual performance matters more, look at the voltage frequency scaling of AMD 6000 GPU's VS Nvidias 3000 series, despite being "1nm" different. The fact that Apple is using the same node means more in the power/efficiency to performance metric than anything, they have more money than the US government and use TSMC for manufacturing.

JohnWalSo true and a comment probably lost on most posters....

Actually most here probably understand that the naming scheme is worthless now, lower process size used to mean more speed (Ghz) with lower voltage, but now we are reaching the bend of the knee where smaller doesn't mean faster or smaller die sizes. RAM and motherboard tech hasn't kept up with smaller process improvements and the ability to kill a CPU by damaging its on die termination is a thing.

SteevoIts a number that translates into expected performance, so really anymo rethe node size is mattering less and less and actual performance matters more, look at the voltage frequency scaling of AMD 6000 GPU's VS Nvidias 3000 series, despite being "1nm" different. The fact that Apple is using the same node means more in the power/efficiency to performance metric than anything, they have more money than the US government and use TSMC for manufacturing.



Actually most here probably understand that the naming scheme is worthless now, lower process size used to mean more speed (Ghz) with lower voltage, but now we are reaching the bend of the knee where smaller doesn't mean faster or smaller die sizes. RAM and motherboard tech hasn't kept up with smaller process improvements and the ability to kill a CPU by damaging its on die termination is a thing.

Spin projection quantum number and multiplicity v marketing spin?

This makes 10nm sounds outdated

TardianSpin projection quantum number and multiplicity v marketing spin?

Spin is actually useful for making chips without electron excitements, i.e heat generation. They just have to lay a framework for microwave interconnects. Pretty science fiction stuff. Think of it as 2.5D MCM's eating up the market for 3D chips.

And there is Intel, with the 14+++++(+)nm chips and preparing for 10+ ...:roll::ohwell:

TardianSpin projection quantum number and multiplicity v marketing spin?

Theoretical VS actual is always spin.

Quantum needs supercooling and until we find a material that will efficiently move heat it will remain in the realm of super computers for large companies and governments.

Honey, can you pick up a gallon of liquid nitrogen, there is a gaming match I need my VR quantum system and it’s going to need it.

I don’t imagine that will become the norm, so classical computing for the near future for us. 3D chips with pathways for phase change heat transfer fluid will be mainstream before quantum chips. Considering that the maximum and actual transistor density is already 2X different to achieve the switching speed required we may even see it happen before “1nm” is in full production. It’s the question of how much is wafer space and product availability worth to add it.

Hmm 1nm like so see how they will stop quantum tunnelling of electrons at that size. Now of course what feature sizes will actually be 1nm are unknown, but I doubt the current carrying interconnects will be that small.

I cannot see at all how they can go into the pico metre range after this, you will have structures that are only a few atoms wide. They actually cease to behave at all like a bulk material. A hydrogen atom is about 1.06Å in diameter and silcon is about 3Å but of course silicon is in a crystal structure and the bond lengths are larger.

With so many resources going into 1nm and beyond, has anyone tried to improve upon other components like motherboards, ram, and Ethernet or other peripheral capabilities so that we can leap ahead?

saki630With so many resources going into 1nm and beyond, has anyone tried to improve upon other components like motherboards, ram, and Ethernet or other peripheral capabilities so that we can leap ahead?

You don't like 8GHz DDR5 RAMs?? Or PCI-Express 4/5? Or USB 4.0?

Minus InfinityHmm 1nm like so see how they will stop quantum tunnelling of electrons at that size. Now of course what feature sizes will actually be 1nm are unknown, but I doubt the current carrying interconnects will be that small.

I cannot see at all how they can go into the pico metre range after this, you will have structures that are only a few atoms wide. They actually cease to behave at all like a bulk material. A hydrogen atom is about 1.06Å in diameter and silcon is about 3Å but of course silicon is in a crystal structure and the bond lengths are larger.

MBCFET utilizes these tunneling currents, it is a feature rather than a deficit. NANDs use them as well, the current isn't enough for physical transfer of electrons. Only the electrons passing nonphysically can make the jump. It is funny, but nevertheless it lowers the resistance.