Tuesday, March 12th 2024

Qualcomm Snapdragon X Elite Benchmarked Against Intel Core Ultra 7 155H

Qualcomm Snapdragon X Elite is about to make landfall in the ultraportable notebook segment, powering a new wave of Windows 11 devices powered by Arm, capable of running even legacy Windows applications. The Snapdragon X Elite SoC in particular has been designed to rival the Apple M3 chip powering the 2024 MacBook Air, and some of the "entry-level" variants of the 2023 MacBook Pros. These chips threaten the 15 W U-segment and even 28 W P-segment of x86-64 processors from Intel, such as the Core Ultra "Meteor Lake," and Ryzen 8040 "Hawk Point." Erdi Özüağ, prominent tech journalist from Türkiye, has access to a Qualcomm-reference notebook powered by the Snapdragon X Elite X1E80100 28 W SoC. He compared its performance to an off-the-shelf notebook powered by a 28 W Intel Core Ultra 7 155H "Meteor Lake" processor.

There are three tests that highlight the performance of the key components of the SoCs—CPU, iGPU, and NPU. A Microsoft Visual Studio code compile test sees the Snapdragon X Elite with its 12-core Oryon CPU finish the test in 37 seconds; compared to 54 seconds by the Core Ultra 7 155H with its 6P+8E+2LP CPU. In the 3DMark test, the Adreno 750 iGPU posts identical performance numbers to the Arc Graphics Xe-LPG of the 155H. Where the Snapdragon X Elite dominates the Intel chip is AI inferencing. The UL Procyon test sees the 45 TOPS NPU of the Snapdragon X Elite score 1720 points compared to 476 points by the 10 TOPS AI Boost NPU of the Core Ultra. The Intel machine is using OpenVINO, while the Snapdragon is using Qualcomm SNPE SDK for the test. Don't forget to check out the video review by Erdi Özüağ in the source link below.
Source: Erdi Özüağ (YouTube)
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55 Comments on Qualcomm Snapdragon X Elite Benchmarked Against Intel Core Ultra 7 155H

#51
bug
NoyandBlender 2.79 isn't native it's running through Rosetta. Blender 3.1 and up are a better indicator of the SOC performance. Several reviews have placed the M3 max around the i9 13980HX of the 18" alienware M18 in blender. That laptop got a 198wPL2 and143w PL1. So similar performance at 92w for the M3 max, vs beyond 200w for the 7845HX and 13980HX.

Idk, the first two benches say M3 Max draws as much power as 13980HX and loses to AMD's 3D cache parts...
Posted on Reply
#52
Noyand
bugIdk, the first two benches say M3 Max draws as much power as 13980HX and loses to AMD's 3D cache parts...
The first two benches doesn't measure power, but the time in seconds to complete the bench.

Otherwise I don't know what's up with that 7856w celeron J :D.
Posted on Reply
#53
bug
NoyandThe first two benches doesn't measure power, but the time in seconds to complete the bench.

Otherwise I don't know what's up with that 7856w celeron J :D.
Ah, right you are.
Still the power graph don't show Apple silicon. Or I'm blind.
Posted on Reply
#54
Noyand
bugAh, right you are.
Still the power graph don't show Apple silicon. Or I'm blind.
Posted on Reply
#55
Toro
DenverSome people mistakenly believe that ARM is inherently more efficient than x86, often preaching about it as if it were a revolutionary concept and advocating for the immediate demise of x86. "x86's days are numbered"
However, the more grounded individuals understand the complexities involved and are skeptical: chipsandcheese.com/2024/03/27/why-x86-doesnt-need-to-die/
The chips and cheese article doesn't address the assertions made shortly after the release of the M1 (article). That the very high IPC of Apple's arm implementation are achieved with a very wide 8x decode block and large re-order buffer, the exact mechanisms at play are not known, but the thought is that this combination of logic achieves a high level of instruction level parallelism prior to hitting the execution units. The 8x wide decode block, as has been asserted by many, is very impractical to implement beyond 4x on x64 ISA and this places some hard limitations on improving IPC. The tradeoff is more logic, but more logic running lower clock is often more energy efficient, especially as we progress toward higher density nodes. This is likely also the reason why Apply pursued big-little so early, to minimize the resource penalty introduced by the additional logic of the performance cores.
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