Cadence today announced that MediaTek has adopted the AI-driven Cadence Virtuoso Studio and Spectre X Simulator on the NVIDIA accelerated computing platform for its 2 nm development. As design size and complexity continue to escalate, advanced-node technology development has become increasingly challenging for SoC providers. To meet the aggressive performance and turnaround time (TAT) requirements for its 2 nm high-speed analog IP, MediaTek is leveraging Cadence's proven custom/analog design solutions, enhanced by AI, to achieve a 30% productivity gain.

"As MediaTek continues to push technology boundaries for 2 nm development, we need a trusted design solution with strong AI-powered tools to achieve our goals," said Ching San Wu, corporate vice president at MediaTek. "Closely collaborating with Cadence, we have adopted the Cadence Virtuoso Studio and Spectre X Simulator, which deliver the performance and accuracy necessary to achieve our tight design turnaround time requirements. Cadence's comprehensive automation features enhance our throughput and efficiency, enabling our designers to be 30% more productive."

There are a substantial number of people who prefer to use an iPad for certain light-weight tasks over traditional laptops. For such folks, Apple's iPad lineup has always promised great performance and efficiency at reasonable prices, considering that they are willing to deal with the limitations of iPadOS. A plethora of recent reports have shed light on the expected release schedule for this year's iPads, including the entry-level budget iPad, the iPad Air, and the highest-end iPad Pro.

Of course, the iPad Pro is easily the most exciting among the bunch, although that does not seem to be the case this year. Multiple reports have pointed at a spec-bump for the iPad Pros, which will likely boast the Apple M5 SoC when it sees the light of day. Considering that the iPad got a major design overhaul just last year, no other major upgrades are anticipated for 2025. The entry-level iPad and iPad Air will witness a similar treatment, both getting an SoC upgrade to the A17 Pro and M3 respectively. This is particularly big deal for the entry-level iPad, which will now get to reap the benefits of 8 GB of memory, double that of the current generation, making the already budget-friendly iPad an even better value.

Numem, an innovator focused on accelerating memory for AI workloads, will be at the upcoming Chiplet Summit to showcase its high-performance solutions. By accelerating the delivery of data via new memory subsystem designs, Numem solutions are re-architecting the hierarchy of AI memory tiers to eliminate the bottlenecks that negatively impact power and performance.

The rapid growth of AI workloads and AI Processor/GPUs are exacerbating the memory bottleneck caused by the slowing performance improvements and scalability of SRAM and DRAM - presenting a major obstacle to maximizing system performance. To overcome this, there is a pressing need for intelligent memory solutions that offer higher power efficiency and greater bandwidth, coupled with a reevaluation of traditional memory architectures.

Noted technology tipster, Kepler L2, believes that the Sony Interactive Entertainment (SIE) engineering team has finalized the design of a PlayStation 6 (PS6) system-on-chip (SoC)—insider information was shared on the NeoGAF forum (a popular computer game discussion board) late last week. It would be natural to assume that Sony's gaming division is deep into the process of developing a follow-up to its PlayStation 5 home console, but Kepler L2's fresh revelation points to surprisingly advanced progress. Insider sources point to the PS6's chip design being: "complete and in pre-silicon validation already, with A0 tapeout scheduled for late this year."

Industry experts have analyzed PlayStation development cycles of days past—history has demonstrated a pattern of the A0 tapeout phase reaching completion around two years before the rollout of finalized products at retail. Kepler L2 reckons that this pattern will be repeated—indicating a possible launch of PlayStation by 2027. The rumored PS6 chipset has been linked to AMD's "gfx13" target—everyone's favorite Team Red tipster posits that Sony engineers are working with a "fork" of this next-gen "UDNA" graphics technology. The rumor mill has generated additional PS6 SoC-related internet chatter—last Friday, Chiphell alleged a possible adoption of Team Red's X3 V-cache technology.

Yesterday, Nintendo officially unveiled its Switch 2 handheld via a first look video presentation. Featured content did not come as a surprise to many gaming enthusiasts—a steady flow of leaks have already revealed outer and inner workings. Earlier today, the Digital Foundry team has offered their collective opinion on Nintendo's formal announcement. Their roundtable discussion first focused on the Switch 2's physical appearance—mainly a showcased physical increase in size, when lined up against the preceding (standard) model. Conversation quickly moved onto technical matters—a topic that Nintendo normally avoids discussing. The video presentation included in-game footage of a next-gen Mario Kart title—Oliver Mackenzie (a contributing DF video producer/writer) was not impressed by this short demo's visual fidelity. He noted an absence of DLSS image enhancement—surprising, given that the rumored NVIDIA Tegra T239 SoC is capable of deploying this graphics technology.

John, Rich and Oliver then moved onto discussing recently leaked clock speeds and performance figures (in handheld and docked modes)—overall, they reckon that these numbers seem fitting for a hybrid system. They noticed that the handheld GPU clock was lower than expected—based on their judgement of the Switch 2's fairly capable integrated cooling solution. In the past, Digital Foundry theorized that the NVIDIA-designed Tegra T239 will be an 8 nanometer part—rumored to be built on Samsung 8 nm DUV foundry node. Newer gaming community-generated proposals have suggested a shift to Samsung's 5 nm EUV node—mostly based on the chipset's physical footprint. In sharp contrast, the Digital Foundry guys are sticking with their 8 nm theory. Richard Leadbetter (DF's founder) has previously attempted to simulate Switch 2-esque performance on readily available Ampere-based hardware—he could revisit and perform tests on a laptop that sports Team Green's GeForce RTX 2050 mobile GPU. He believes that the leaked CPU and GPU clocks (across both modes) present plausible evidence of 8 nm-level performance, cross-referenced with his team's past analysis of the system's PCB. Debates will inevitably rage on, but Rich insists that the end result will be an example of "Occam's razor." The Tegra T239's four (long alleged) Cortex A78 cores appeared to be running at a higher frequency in portable mode than in docked—suggesting some unknown factors; perhaps a switching on or off of cores (situation dependent). Leadbetter and Co. will be looking forward to getting a proper hands-on experience at Nintendo's April to June launch events.

Apple's top-end M4 Ultra desktop-class chipset is allegedly going to feature on upcoming Mac Pro and Mac Studio refreshes—new product unveilings could be on the company's schedule (WWDC 2025). Bloomberg's Mark Gurman has divulged intriguing M4-series information within his latest newsletter. The M4 Ultra SoC—codenamed "Hidra"—was previously believed to be the most powerful processor option available on both next-gen Mac Pro and Mac Studio platforms. Now, Gurman believes that Apple engineers have created a distinct custom chipset design—exclusively designed for the Mac Pro workstation product stack—that sits above their M4 Ultra SoC.

Somewhat confusingly he suggests that "Hidra" is the codename for this top-of-the-line processor. Rumors swirled last month about the cancellation of an alleged "Extreme" model, so there is a degree of uncertainty surrounding unannounced M4 SKUs. Potential customers could choose Apple's (potentially) more powerful "Hidra-equipped" Mac Pro workstation over the highest-end M4 Ultra-based Mac Studio model. Industry experts propose that "Hidra" will arrive with an increased number of CPU and GPU cores—exceeding the M4 Ultra's speculated makeup of a 32-core CPU and an 80-core GPU.

Morse Micro, the world's leading provider of Wi-Fi HaLow chips based on the IEEE 802.11ah specification, has announced the launch of its highly anticipated second-generation MM8108 System-on-Chip (SoC). Building on the success of the first-generation MM6108 SoC, the MM8108 offers even better performance in all key areas of range, throughput, and power efficiency while also reducing the cost, effort, and time to bring the next generation of Wi-Fi HaLow enabled products to market.

The MM8108 delivers class-leading data rates of up to 43.33 Mbps using world-first sub-GHz 256-QAM modulation at an 8 MHz bandwidth, making it ideal for a range of applications in agricultural, mining, industrial, home, and city environments. Its integrated 26dBm power amplifier (PA) with exceptional power efficiency, and low-noise amplifier (LNA) ensure exceptional performance and enable global regulatory certification without the need for external Surface Acoustic Wave (SAW) filters. The exceptional power efficiency significantly extends battery life and enables the uptake of solar-powered Wi-Fi HaLow connected cameras and IoT devices.

Recently, SpacemiT, a RISC-V AI CPU company from China, announced breakthrough progress in the development of its server CPU chip SpacemiT Vital Stone V100. It now provides a complete RISC-V CPU chip hardware and software platform that fully supports server specifications.

RISC-V CPU core X100, AIA and APLIC supporting interrupt virtualization, IOMMU supporting memory virtualization, IOPMP supporting security functions, LPC and eSPI supporting communication with mainstream BMCs, etc.

• The 64-bit server-grade RISC-V CPU core X100 delivers a single-core performance of >9 points/GHz on SPECINT2006 at 2.5 GHz 12 nm. X100 supports the RVA23 Profile, full virtualization (Hypervisor 1.0, AIA 1.0, IOMMU), RAS features, Vector 1.0 extension, vector encryption and decryption, security, 64-core interconnect, and more.
• The IOMMU IP adheres to the RISC-V IOMMU architecture specification and the AXI4-Stream DTI interface, supporting configurable DID, PID, virtual address, physical address width, and various levels of translation cache sizes. It can be flexibly integrated into different locations within the SoC bus system to enable distributed peripheral virtualization and accelerator acceleration.

EarFun, a global leader in wireless audio technology, has already made waves at CES 2025 with the debut of an impressive lineup of innovative products. From reimagined open-ear listening solutions to innovative AI-powered translation earbuds, EarFun continues to lead the audio technology industry with groundbreaking advancements.

EarFun Unveils Advanced AI Translation and Dual-Unit Wireless Audio Technology
At CES 2025, EarFun will showcase OpenJump, the all-new open-ear wireless earbuds, along with the EarFun Clip, the premium Wave Life Hybrid ANC over-ear headphones at attractive pricing, the enhanced Air Pro 4+ with AI translation, and the world's 1st Lossless Auracast USB Dongle

Digital Enhancement (Hangzhou) Co., Ltd (hereafter referred to as "Digital Enhancement") is set to unveil the world's first commercial-grade Radio Processing Unit (RPU) designed for Wi-Fi wireless access at the CES International Consumer Electronics Show in Las Vegas, USA.

This groundbreaking RPU and solution leverage Digital Enhancement's innovative "Digital RF" technology, delivering a 10x performance boost in Wi-Fi high-speed coverage. The innovation promises to redefine the wireless connectivity experience for consumer electronics, paving the way for a new era of seamless and high-performance wireless connections.

Intel is significantly expanding its desktop Core Ultra 200 "Arrow Lake-S" lineup with new 65 W models along the sidelines of the 2025 International CES, but more importantly, it is bringing the "Arrow Lake" microarchitecture to the mobile space. The company is planning to launch at least 22 processor models this January, but not all of them are based on "Arrow Lake." Tom's Hardware reports that the lineup broadly revolves around the "Core 2-series" processor model numbering.

The Core Ultra 200H series consists of H-segment (conventional thickness notebook) processors in the 28 W to 45 W class, and are based on the "Arrow Lake-H" silicon. The Core Ultra 200HX series targets premium gaming notebooks and portable workstations, and consists of 55 W to 65 W class processors, including CPU overclocking capabilities on certain models. Things get interesting with the Core Ultra 200U series. These chips are based on the "Meteor Lake Refresh" silicon—an older microarchitecture—targeting the 7 W to 28 W segments for ultraportables. Lastly, there's the Core H 200 and Core U 200 series (no "Ultra" in the branding), which are based on the older "Raptor Lake" monolithic silicon, targeting mainstream notebooks.

At this point, it's basically taken for granted that Lenovo will be launching its cut-down Legion Go S gaming handheld at CES 2025, and a fresh leak from Evan Blass via The Verge points to another Legion Go handheld—a direct replacement for the current-generation Go—launching alongside the Go S. While the Go S will supposedly be powered by the less powerful AMD Ryzen Z2G and its Radeon 680M iGPU, the full-fat Legion Go 2 will likely use a more powerful processor and iGPU, suggesting that a Ryzen Z2 Extreme SoC is on the way.

Perhaps the most compelling thing about the new Legion Go handheld, though is that it will reportedly feature an OLED display. Despite the new display tech, though, the Legion Go 2 will supposedly have the same display size, detachable controllers, and FPS mode, although the images shared by Blass show significantly rounder controller edges, which should make the chunky handheld less cumbersome to hold. The leaks make no mention of SteamOS or a Steam button for the Legion Go 2, suggesting that it will still be a Windows-first gaming handheld, and the Legion Space button is still present on the face of the Legion Go 2 featured in the leaks.

During Barclays 22nd Annual Global Technology Conference, Intel was a guest and two of the interim company co-CEOs Michelle Johnston Holthaus and David Zinsner gave a little update on the state of affairs at Intel. One of the most interesting aspects of the talk was Intel's upcoming "Panther Lake" processor—a direct successor to Intel Core Ultra 200S "Arrow Lake-H" mobile processors. The company confirmed that Panther Lake would utilize an Intel 18A node and that a few select customers have powered on Panther Lake on the E0 engineering sample chip. "Now we are using Intel Foundry for Panther Lake, which is our 2025 product, which will land on 18A. And this is the first time that we're customer zero in a long time on an Intel process," said interim co-CEO Michelle Johnston Holthaus, adding, "But just to give some assurances, on Panther Lake, we have our ES0 samples out with customers. We have eight customers that have powered on, which gives you just kind of an idea that the health of the silicon is good and the health of the Foundry is good."

While we don't know what ES0 means for Intel internally, we can assume that it is one of the first engineering samples on the 18A. The "ES" moniker usually refers to engineering samples, and zero after it could be the first design iteration. For reference, Intel's "Panther Lake-H" will reportedly have up to 18 cores: 6 P-cores, 8 E-cores, and 4 LP cores. The design brings back low-power island E-cores in the SoC tile. The P-cores use "Cougar Cove," which should have a higher IPC than "Lion Cove," while keeping the existing "Skymont" E-cores. The SoC tile may move from Arrow Lake's 6 nm to a newer process to fit the LP cores and an updated NPU. The iGPU is said to use the Xe3 "Celestial" architecture. With Arrow Lake-H launching in early 2025, Panther Lake-H likely won't arrive until 2026.

AMD today announced the expansion of the AMD Versal adaptive system-on-chip (SoC) portfolio with the introduction of the Versal RF Series that includes the industry's highest compute performance in a single-chip device with integrated direct radio frequency (RF)-sampling data converters.

Versal RF Series offers precise, wideband-spectrum observability and up to 80 TOPS of digital signal processing (DSP) performance in a size, weight, and power (SWaP)-optimized design, targeting RF systems and test equipment applications in the aerospace and defense (A&D) and test and measurement (T&M) markets, respectively.

Just a few days ago, we reported on a leaked teaser for GEEKOM's upcoming QS1 Pro mini PC. The system is set to mark GEEKOM's foray into the world of Arm-based PCs, likely in a bid to take on Apple's Mac mini. However, if a recent leak is to be believed, the QS1 Pro may have a tough time pulling that off.

The leaked specifications, courtesy of a Spanish publication, reveal that the QS1 Pro will feature the Snapdragon X1E-80-100 SoC - the second-fastest member of the X Elite family, slotting in below the 84-100 SKU. The X1E-80-100 boasts 12 Oryon cores, along with a 3.8 TFLOPs Adreno GPU. Interestingly, the leaked specs claim GPU performance of up to 4.6 TFLOPs, which is either a typo, or an indication that an X1E-84-100 variant will be available.

AMD has recently filed a patent revealing plans to implement "multi-chip stacking" in future Ryzen SoCs, as Wccftech reports, quoting a post on X from @coreteks: "New patent from AMD shows how future Zen SoCs could look. Basically a novel packaging design that enables compact chip stacking and interconnection by having them partially overlap, as in this figure. The dotted line is a larger die stacked on top of those smaller ones". The patent details a new approach where smaller chiplets partially overlap with a larger die, creating space for additional components and functions on the same die. This strategy aims to improve the efficiency of the contact area, thus making room for higher core counts, larger caches, and increased memory bandwidth within the same die size. The proposed stacking will reduce the physical distance between components through overlapping chiplets, thus minimizing interconnect latency and achieving faster communication between different chip parts. The design will also improve power management, as the segregated chiplets allow for better control of each unit through power gating.

Even if long-time rival Intel has lost some of its momentum (and market share) this year, AMD's chance to push ahead with its intention to become number one in the market is to continue to innovate. In the same way that its 3D V-Cache technology made the X3D processor lineup so successful, this chip stacking approach could play a major role in future AMD Ryzen SoCs. It seems that AMD is committed to moving away from the monolithic design era and taking the road of multi-chiplet; however, it can be a long wait until (and if) this chip stacking will complete the journey from patents to design, production, and final product.

AAEON's UP brand, which began with the creation of the credit-card sized UP developer board almost a decade ago, has introduced the UP 710S, a modernized, slimline 85 mm x 56 mm single-board that retains the DNA of its iconic predecessor, but with the addition of new features and greater performance to reflect the technological advancements made over the years.

While the UP 710S retains the credit-card sized form factor of the original UP Board, AAEON has reduced the board's height by 10 mm in order to make the already compact board more suitable for deployment in space-constrained environments, with its height now measuring just 25.13 mm. While such a design change would typically require a tradeoff in the form of a reduction in I/O options, but the UP 710S maintains key functions like GPIO, I2C, SPI, and COM that were previously attainable via a 40-pin HAT through dedicated wafers.

Intel's discrete GPUs are close, and recent reports indicate Intel will reveal its next-generation Arc Battlemage graphics cards in December, moving from an earlier expected Black Friday announcement. Hardware insider Golden Pig Upgrade first mentioned this timeline shift, with data researcher Tomasz Gawroński providing supporting evidence through shipping manifest analysis. The December timing appears to position Intel's announcement before CES 2025, where AMD plans to showcase its Radeon RX 8000 series with RDNA 4 architecture, and NVIDIA will present its GeForce RTX 50 line. This will give Intel ample room to "steal" the attention of the tech press, who will be busy with NVIDIA and AMD during CES.

X account Bionic_Squash has confirmed Battlemage won't be Intel's final discrete graphics card, addressing questions about the company's long-term graphics development plans. Intel's future roadmap includes the Xe3 "Celestial" architecture, though current information only confirms its initial implementation in mobile chips at a reduced scale. The timeline for a full discrete graphics card using Celestial architecture remains unspecified. We are also left to wonder about Intel's approach to discrete GPU marketing push, as the company has yet to gain any significant footing among enthusiasts. In the coming years, Intel's expansion could prove worthwhile as it updates its GPUs with more performance from newer generations.

Microsoft's Windows-on-Arm (WoA) project has been going through an expansion phase, with the recent range of Snapdragon X SoCs powering many laptops. However, as we are about to get bombed with WoA devices in 2025, Microsoft has prepared an official ISO image of the Windows 11 operating system, available for users to download on the official website. The download size is about 5 GB and requires an Arm-based system to work, as expected. The need for Windows 11 ISO image for WoA comes from the increased number of desktop builds shipped to developers worldwide based on Arm. There are many workstations like the ones offered by ODMs, with an Ampere Altra or Altra Max processor inside.

This is also good news for enthusiasts waiting for the NVIDIA-MediaTek collaboration to drop its first goodies next year, and we expect to see some interesting solutions arise. With Microsoft investing its developer resources into producing Windows 11 Arm builds, it signals that the adoption of Arm-based devices is about to get much higher interest from the consumer standpoint.

BIOSTAR, a leading manufacturer of motherboards, graphics cards, and IPC solutions, is pleased to introduce the MT-N97 industrial computer. The BIOSTAR MT-N97 industrial computer is a compact, fanless powerhouse designed to meet the high demands of modern industrial applications. Tailor-made for system integrators, AIOT development, automation, edge computing, human-machine interfaces (HMI), and digital signage, the MT-N97 combines robust performance with unwavering stability, providing a reliable foundation for critical operations across various sectors.

Equipped with advanced specs that make it an ideal choice for high-performance, industrial-grade applications, the MT-N97 draws power from an Intel Alder Lake N SOC Processor (Intel N97, 4core, up to 3.6 GHz, TDP 12 W). It combines efficient performance with low power consumption, enhancing reliability and cost-effectiveness for continuous operation. The MT-N97's fanless design ensures quiet, noiseless performance, making it suitable for environments where minimal disruption is critical.

AMD on Tuesday released its flagship FPGA series, and possibly its most important product launch after the company's Xilinx acquisition, the Versal Premium Series Gen 2 SoC. It's hard to call this an FPGA, much in the same way as it's hard to call a modern processor "a CPU," there are many integrated devices, platform interfaces, and application-specific accelerators, and much in the same way, the Versal Premium Series Gen 2 is marketed as an "adaptive SoC," rather than a really powerful FPGA. Speaking of I/O, this is AMD's first product to implement PCI-Express Gen 6 and CXL 3.1.

There's no host platform that currently support these standards—neither EPYC "Turin" nor Xeon 6 "Granite Rapids," but it goes to show that the chip is future-ready and can put the new I/O standards to use. The chip is designed to be implemented as a standalone SoC, and so it supports both DDR5 RDIMMs and LPDDR5X, giving end-users the flexibility to go with the two vastly different memory standards depending on what their application is. These capabilities make the Versal Premium Series Gen 2 well-suited for demanding applications in sectors like data centers, communications, test and measurement, aerospace, and defense, where high-speed data processing is critical.

AAEON, a leading provider of scalable and flexible network solutions, has expanded its network security catalog with the launch of the FWS-2370, a desktop network appliance powered by Intel Atom C5000 processors and equipped with up to 14 LAN ports. Built on the Intel Atom Processor C Series platform, with the Intel Atom Processor C5315 as its default CPU, the FWS-2370 is well-suited to SD-WAN, uCPE, and UTM applications, leveraging a number of conducive on-chip technologies such as Intel QAT and Intel VT-d/VT-x. This offers expedited encryption and decryption, while the device's high core count gives it sufficient processing power to facilitate data throughput and manage multithreaded workloads.

The FWS-2370's standout feature is its Ethernet port selection, which is comprised of eight RJ-45 ports, four running at 2.5GbE and four at 1GbE, alongside four 10GbE SFP+ ports with two LAN bypasses. Further distinguishing it from existing market offerings is the option of two PoE af/at ports, which will appeal to organizations requiring redundant high-speed networking and data transfer between multiple locations.

LG Electronics (LG) and Tenstorrent are pleased to announce an expanded collaboration, building on their initial chiplet project to develop System-on-Chips (SoCs) and systems for the global market. Through this partnership, LG aims to enhance its design and development capabilities for AI chips tailored to its products and services, aligning with its vision of "Affectionate Intelligence." LG is dedicated to advancing AI-driven innovation, with a focus on enhancing its AI-powered home appliances and smart home solutions, as well as expanding its capabilities in future mobility and commercial applications.

Recognizing the critical role of high-performance AI semiconductors in implementing AI technology, LG plans to strengthen its in-house development capabilities while collaborating with leading global companies, including Tenstorrent, to boost its AI competitiveness.

Both pictures and videos of a partial teardown of Apple's recently launched Mac mini with the M4 SoC have appeared online courtesy of various Chinese sources. There are at least two interesting parts to these partial teardowns and they're related to storage and WiFi. On the storage front, Apple has moved away from having soldered NAND chips straight on the main PCB of the Mac mini, to instead having them on a custom PCB which is similar to M.2, but a custom Apple design. The PCB pictured contained a pair of 128 GB NAND chips and with the source of the teardown being from China, there's also a video showing a repair shop desoldering the two chips and replacing them with two 1 TB chips, or in other words, the SSD was upgraded from 256 GB to 2 TB.

The upgrade brought with it some extra performance as well, even if the write speed remained at a comparatively slow 2900 MB/s, the read speed went up from 2000 MB/s to 3300 MB/s which is a significant gain in performance. This is obviously not a consumer friendly upgrade path, but we'd expect to see third party upgrade options at some point in the future, assuming there's no black listing of third party storage modules. The NAND controller is still likely to be integrated into Apple's SoC, but the PCB that the NAND flash chips are mounted onto appears to have some kind of SPI flash on it as well, which might make third party upgrades a lot harder.

Nintendo has officially announced that its next-generation Switch console will feature backward compatibility, allowing players to use their existing game libraries on the new system. However, those eagerly awaiting the console's release may need to exercise patience as launch expectations have shifted to early 2025. On the official X account, Nintendo has announced: "At today's Corporate Management Policy Briefing, we announced that Nintendo Switch software will also be playable on the successor to Nintendo Switch. Nintendo Switch Online will be available on the successor to Nintendo Switch as well. Further information about the successor to Nintendo Switch, including its compatibility with Nintendo Switch, will be announced at a later date."

While the original Switch evolved from a 20 nm Tegra X1 to a more power-efficient 16 nm Tegra X1+ SoC (both featuring four Cortex-A57 and four Cortex-A53 cores with GM20B Maxwell GPUs), the Switch 2 is rumored to utilize a customized variant of NVIDIA's Jetson Orin SoC, now codenamed T239. The new chip represents a significant upgrade with its 12 Cortex-A78AE cores, LPDDR5 memory, and Ampere GPU architecture with 1,536 CUDA cores, promising enhanced battery efficiency and DLSS capabilities for the handheld gaming market. With the holiday 2024 release window now seemingly off the table, the new console is anticipated to debut in the first half of 2025, marking nearly eight years since the original Switch's launch.