Intel's server processor lineup led by the 4th Gen Xeon Scalable "Sapphire Rapids" processors face stiff competition from AMD 4th Gen EPYC "Genoa" processors that offer significantly higher multi-threaded performance per Watt on account of a higher CPU core-count. The gap is only set to widen, as AMD prepares to launch the "Bergamo" processor for cloud data-centers, with core-counts of up to 128-core/256-thread per socket. A technologically-embattled Intel is preparing quick counters as many as three new server microarchitecture launches over the next 23 months, according to Intel, in its Q4-2022 Financial Results presentation.

The 4th Gen Xeon Scalable "Sapphire Rapids," with a core-count of up to 60-core/120-thread, and various application-specific accelerators, witnessed a quiet launch earlier this month, and is shipping to Intel customers. The company says that it will be joined by the Xeon Scalable "Emerald Rapids" architecture in the second half of 2023; followed by "Granite Rapids" and "Sierra Forest" in 2024. Built on the same LGA4677 package as "Sapphire Rapids," the new "Emerald Rapids" MCM packs up to 64 "Raptor Cove" CPU cores, which support higher clock-speeds, higher memory speeds, and introduce the new Intel Trust Domain Extensions (TDX) instruction-set. The processor retains the 8-channel DDR5 memory interface, but with higher native memory speeds. The chip's main serial interface is a PCI-Express Gen 5 root-complex with 80 lanes. The processor will be built on the last foundry-level refinement of the Intel 7 node (10 nm Enhanced SuperFin); many of these refinements were introduced with the company's 13th Gen Core "Raptor Lake" client processors.

NVIDIA's next GeForce RTX 40-series "Ada" graphics card launch is widely expected to be the GeForce RTX 4070 (non-Ti), and as we approach Spring 2023, the company is expected to ramp up to the meat of its new generation, with xx60-segment, beginning with the GeForce RTX 4060 Ti. This new performance-segment SKU debuts the 4 nm "AD106" silicon. A set of leaks by kopite7kimi, a reliable source with NVIDIA leaks, shed light on possible specifications.

The RTX 4060 Ti is based on the AD106 silicon, which is expected to be much smaller than the AD104 powering the RTX 4070 series. The reference board developed at NVIDIA, codenamed PG190, is reportedly tiny, and yet it features the 16-pin ATX 12VHPWR connector. This is probably set for 300 W at its signal pins, and adapters included with graphics cards could convert two 8-pin PCIe into one 300 W 16-pin connector. The RTX 4060 Ti is expected to come with a typical graphics power value of 160 W.

Marketing pictures of two custom-design GeForce RTX 4070 "Ada" (non-Ti) graphics card models by GALAX, were leaked to the web. The more simple-looking of the two is very likely the GALAX RTX 4070 EX Gamer White; while the other more flashy of the two, could be the GALAX RTX 4070 SG White. What's interesting is that both cards are triple-slot, including with their I/O brackets, for what is supposed to be a mid performance-segment product positioned below the recently launched RTX 4070 Ti.

Rumored specifications of the RTX 4070 (non-Ti) have it, that the SKU is based on the same 4 nm "AD104" silicon as the RTX 4070 Ti, albeit significantly cut-down, with only 46 out of 60 streaming multiprocessors (SM) on the silicon being enabled (that's 76% of the available SIMD machinery). This works out to 5,888 CUDA cores, 46 RT cores, and 184 Tensor cores. The card might get the same 12 GB memory size, across the 192-bit GDDR6X memory bus of the AD104, with the same 21 Gbps memory speed, working out to 504 GB/s bandwidth. One reason why GALAX's cards look this buff could have to do with NVIDIA's partners reusing their RTX 4070 Ti board designs for their premium RTX 4070 cards.

The online datasheets of some of the first AMD Ryzen 7040 series "Phoenix Point" mobile processors went live, detailing the processor's I/O feature-set. We learn that AMD has decided to give PCI-Express Gen 5 a skip with this silicon, at least in its mobile avatar. The Ryzen 7040 SoC puts out a total of 20 PCI-Express Gen 4 lanes, all of which are "usable" (i.e. don't count 4 lanes toward chipset-bus). This would mean that the silicon has a full PCI-Express 4.0 x16 interface for discrete graphics, and a PCI-Express 4.0 x4 link for a CPU-attached M.2 NVMe slot; unlike the "Raphael" desktop MCM and the "Dragon Range" mobile MCM, whose client I/O dies put out a total of 28 Gen 5 lanes (24 usable, with x16 PEG + two x4 toward CPU-attached M.2 slots).

Another interesting aspect about "Phoenix Point" is its memory controllers. The SoC features a dual-channel (four sub-channel) DDR5 memory interface, besides support for LPDDR5 and LPDDR5x. DDR5-5600 and LPDDR5-7600 are the native speeds supported. What's really interesting is the maximum amount of memory supported, which stands at 256 GB—double that of "Raphael" and "Dragon Range," which top out at 128 GB. This bodes well for the eventual Socket AM5 APUs AMD will design based on the "Phoenix Point" silicon. Older Ryzen 5000G "Cezanne" desktop APUs are known for superior memory overclocking capabilities to 5000X "Vermeer," with the monolithic nature of the silicon favoring latencies. Something similar could be expected from "Phoenix Point."

AMD today launched two distinct kinds of mobile processors, the Ryzen 7045 "Dragon Range" serves the 45 W H- and HX-segments of performance and enthusiast notebooks with CPU core counts of up to 16-core/32-thread; while the U-segment, P-segment, and a portion of the H-segment (ranges of 15 W, 28 W, and 35 W), will be led by the Ryzen 7040 "Phoenix Point." Unlike the "Dragon Range" MCM, "Phoenix Point" is a monolithic silicon built entirely on the TSMC 4 nm EUV foundry node, and introduces a wealth of process-level and system-level power-management features.

AMD "Phoenix Point" combines an 8-core/16-thread CPU based on the "Zen 4" microarchitecture, with a powerful iGPU based on the latest RDNA3 graphics architecture, and a feature-packed AI acceleration engine based on the XDNA architecture AMD built after the Xilinx acquisition. The CPU component is a fully-fledged "Zen 4" CCX, with 8 CPU cores featuring 1 MB of dedicated L2 cache per-core, and sharing a large 32 MB L3 cache. This is an increase from the previous generation "Rembrandt" and "Cezanne" dies that had a reduced 16 MB L3 shared among the eight "Zen 3" or "Zen 3+" CPU cores.

A leaked NVIDIA company slide confirms that the upcoming GeForce RTX 4070 Ti graphics card will launch at a starting price of USD $799. This would put it $100 cheaper than what was going to be the launch price of the RTX 4080 12 GB. NVIDIA cancelled the launch of the RTX 4080 12 GB, and reportedly re-branded it to the RTX 4070 Ti. The RTX 4080 12 GB was supposed to launch alongside the RTX 4080 16 GB in mid-November 2022, but the company decided to "unlaunch" it, in the wake of bad press on the confusing and deceptive naming of the SKU, and its ambitious MSRP that would have put custom-design cards well above the $1,000-mark.

The NVIDIA slide goes on to claim that the RTX 4070 Ti will be faster than the previous-generation flagship, the RTX 3090 Ti. This is thanks to its 40 shader TFLOP/s, 93 RT TFLOP/s, and 642 Tensor TFLOP/s. The RTX 4070 Ti is expected to debut the new 4 nm "AD104" silicon, featuring 7,680 CUDA cores, 60 RT cores, 240 Tensor cores, 240 TMUs, and 80 ROPs. The card features 12 GB of 21 Gbps GDDR6X memory across a rather narrow 192-bit memory bus. The slide confirms that January 5, 2023 will be the market availability date for the RTX 4070 Ti. NVIDIA's decision to price the RTX 4070 Ti at $799 may have been influenced by the AMD Radeon RX 7900 XT priced at $899.

On the day of TSMC's celebration of the mass production start of its 3 nm node, news out of Taiwan suggests that all of its top 10 customers have cut their orders for 2023. However, the cuts are unlikely to affect its new node, but rather its existing nodes, with the 7 and 6 nm nodes said to be hit the hardest, by as much as a 50 percent utilisation reduction in the first quarter of 2023. The 28 nm and 5 and 4 nm nodes are also said to be affected, although it's unclear by how much at this point in time.

Revenue is expected to fall by at least 15 percent in the first quarter of 2023 for TSMC, based on numbers from DigiTimes. The fact that TSMC has increased its 2023 pricing by six percent should at least help offset some of the potential losses for the company, but it all depends on the demand for the rest of the year. Demand for mobile devices is down globally, which is part of the reason why so many of TSMC's customers have cut back their orders, as Apple, Qualcomm and Mediatek all produce their mobile SoCs at TSMC. Add to this that the demand for computers and new computer components are also down, largely due to the current pricing and TSMC is in for a tough time next year.

According to Reuters, Samsung is gearing up to increase the chip production capacity at its P3 factory in Pyeongtaek in South Korea, despite the fact that there's a general slowdown in the semiconductor industry, in addition to the general economic downturn. Samsung is apparently planning on adding 12-inch wafer capacity for DRAM, while also adding more 4 nm chip capacity. The P3 fab kicked off production of Samsung's most cutting-edge NAND flash chips earlier this year and is the company's largest fab overall. According to Reuters, Samsung is aiming to add at least 10 new EUV machines in 2023.

In related news via The Elec, Samsung has seen costs increase significantly when it comes to materials costs relating to the expansion of the P3 fab. So far, the company has racked up extra costs of over a trillion korean Won, or more than US$786 million, largely due to all of its contractors having raised their prices. The report also mentioned that some parts of the expansion of the P3 fab has been delayed by as much as a year, which isn't good news for Samsung and it likely means that the company will see further increases in costs before the expansions are finished.

At its 2023 International CES event, NVIDIA is expected to launch not just its desktop GeForce RTX 4070 and RTX 4070 Ti graphics cards, but more importantly, also its GeForce RTX 40-series Laptop GPU series powering next-generation gaming notebooks based on the upcoming 13th Gen Core "Raptor Lake" processors. NVIDIA seems to be making a very tight rope-walk between power-management and generational performance increase in this power- and thermal-constrained form-factor. Wccftech scored a major scoop on the specs of various RTX 40-series Laptop GPUs.

The GeForce RTX 40-series "Ada" Laptop GPU lineup will be led by the RTX 4090 Laptop GPU, based on the 4 nm "AD103" silicon (same one that powers the desktop RTX 4080). It will be equipped with 16 GB of memory, a yet-unknown core-configuration, GPU Boost frequencies of up to 2.04 GHz, and typical power draw ranging between 150 W to 175 W, which can peak up to 200 W thanks to the 25 W dynamic boost range (power permissible by the platform if the other components such as CPU aren't drawing their peak power).

Here are some of the first pictures of a GIGABYTE GeForce RTX 4070 Ti custom-design graphics cards, the RTX 4070 Ti AERO. GIGABYTE targets the AERO brand of graphics cards, motherboards, and notebooks, at creators who like to game, hence the product design that's a lot less flashy than the company's AORUS or Gaming OC brands of graphics cards. An interesting aspect of this card is that it features a 16-pin ATX 12VHPWR connector, and includes an NVIDIA-supplied power adapter that converts two 8-pin PCIe power connectors to one 12VHPWR. We know this adapter is different from the 2x 8-pin to 12-pin adapter NVIDIA included with the RTX 3080 Founders Edition, looking at the four sensor pins.

The connector has keying for 300 W, and so the typical board power of the RTX 4070 Ti will be at or below 300 W. The GeForce RTX 4070 Ti is essentially a re-branding of what would have been the RTX 4080 12 GB, had NVIDIA not decided to "unlaunch" it. The SKU maxes out the 4 nm "AD104" silicon, featuring 7,680 CUDA cores across 60 streaming multiprocessors (SM), 240 Tensor cores, 60 RT cores, 240 TMUs, and 80 ROPs. The chip features a 192-bit GDDR6X memory interface, which was at the heart of the RTX 4080 12 GB naming controversy.

A report by Moore's Law is Dead claims that NVIDIA is preparing to launch a new TITAN RTX halo product, based on a maxed-out 4 nm "AD102" silicon. Where does this put the RTX 4090 Ti? Somewhere in between the RTX 4090 and the TITAN RTX Ada, as NVIDIA gave itself plenty of segmentation headroom with the AD102 silicon, by using just 128 out of 144 SM physically present on the silicon, besides the same 21 Gbps GDDR6X memory as the previous-generation. NVIDIA's options with the new TITAN RTX include enabling all 144 SM (18,432 CUDA cores), and using faster 24 Gbps memory, giving the silicon (1152 GB/s memory bandwidth), a stock power-limit closer to the 600 W design limit of the 12VHPWR power connector (RTX 4090 stock typical board power is 450 W).

Moore's Law is Dead also posted what they claim to be the first real-world pictures of the upcoming TITAN RTX Ada. The card is an unabashed 4-slot enlargement of the dual-axial flow-through RTX 4090 Founders Edition, with the cooler capable of higher thermal loads. TITAN RTX cards are marketed as first-party Founders Edition cards only, and not through NVIDIA's AIC board partners as custom-designs. A maxed out AD102, with higher clock speeds, higher power-limit, and faster memory, should be unassailable for custom-design RTX 4090 cards, if NVIDIA wants to sell this card at the kind of prices its last TITAN RTX product sold at—USD $2,500.

It turns out that NVIDIA has not one, but two new GeForce RTX 40-series "Ada" SKUs on the anvil this January. One of these is the RTX 4070 Ti, which we know well to be a rebranding of the RTX 4080 12 GB in the face of backlash that forced NVIDIA to "unlaunch" it. The other as it turns out, is the RTX 4070, with an interesting set of specifications. Based on the same 4 nm AD104 silicon as the RTX 4070 Ti, the new RTX 4070 is significantly cut down. NVIDIA enabled 46 out of 60 streaming multiprocessors (SM) physically present on the silicon, which yield 5,888 CUDA cores—the same count as the previous-gen RTX 3070, when compared to the 7,680 that the maxed-out RTX 4070 Ti enjoys.

The GeForce RTX 4070, besides 5,888 CUDA cores, gets 46 RT cores, 184 Tensor cores, 184 TMUs, and a reduced ROP count of 64, compared to 80 of the RTX 4070 Ti. The memory configuration remains the same as the RTX 4070 Ti, with 12 GB of 21 Gbps GDDR6X memory across the chip's 192-bit memory interface, working out to 504 GB/s of memory bandwidth. An interesting aspect of this SKU is its board power, rated at 250 W, compared to the 285 W of the RTX 4070 Ti, and the 220 W of its 8 nm predecessor, the RTX 3070.

According to TrendForce's research, the total revenue of the global top 10 foundries rose by 6% QoQ to US$35.21 billion for 3Q22 as the release of the new iPhone series during the second half of the year generated significant stock-up activities across Apple's supply chain. However, the global economy shows weak performances, and factors such as China's policy on containing COVID-19 outbreaks and high inflation continue to impact consumer confidence. As a result, peak-season demand in the second half of the year has been underwhelming, and inventory consumption is proceeding slower than anticipated. This situation has led to substantial downward corrections to foundry orders as well. For 4Q22, TrendForce forecasts that the total revenue of the global top 10 foundries will register a QoQ decline, thereby terminating the boom of the past two years—when there was an uninterrupted trend of QoQ revenue growth.

Regarding individual foundries' performances in 3Q22, the group of the top five was led by TSMC, followed by Samsung, UMC, GlobalFoundries, and SMIC. Their collective global market share (in revenue terms) came to 89.6%. Most foundries were directly impacted by clients slowing down their stock-up activities or significantly correcting down their orders. Only TSMC was able to make a notable gain due to Apple's strong stock-up demand for the SoCs deployed in this year's new iPhone models. TSMC saw its revenue rise by 11.1% QoQ to US$20.16 billion, and the corresponding market share expanded to 56.1%. The growth was mainly attributed to the ≤7 nm nodes, whose share in the foundry's revenue had kept climbing and reached 54% in the third quarter. Conversely, Samsung actually experienced a slight QoQ drop of 0.1% in foundry revenue even though it had also benefited from the component demand related to the new iPhone series. Partially impacted by the weakening of the Korean won, Samsung's market share fell to 15.5%.

Apple and NVIDIA will be among the first customers of TSMC's swanky new $12 billion semiconductor fab in Arizona, USA. Apple will be the first major player to kick off mass-production in the fab, and will be closely followed by NVIDIA. Both companies plan to produce some of their inventory in Arizona, and ramp proportionately up as the fab grows in capacity.

The plan with TSMC's Arizona fab was to originally make 5 nm and 4 nm EUV chips, with an output of 20,000 wafers a month, but the company now expects to deploy a more advanced node to keep up with what will be considered cutting-edge when the fab goes live (think 2 nm-class); and also double the output to 40,000 wafers a month. The capacity should ensure Apple and NVIDIA make their most cutting-edge chips on the node (away from Asia), so there could be tighter export controls, and build supply-chain resilience in the face of security problems arising in the Taiwan straits.

Here's the first picture of the 4 nm "AD104" silicon powering what would have been the $900 GeForce RTX 4080 12 GB, and upcoming RTX 4070-series graphics cards. The third largest GPU based on the "Ada Lovelace" graphics architecture, the AD104 looks tiny. This is because it has roughly half the die-area of the AD102, estimated to be around 295 mm² (compared to 608 mm² of the AD102), which means its transistor count should be less than half, with older reports pinpointing it to 35.8 billion. The RTX 4080 12 GB was supposed to max out the AD104 silicon, enabling all 60 streaming multiprocessors (SM) physically present.

The AD104 with 60 SM hence has 7,680 CUDA cores, 60 RT cores, 240 Tensor cores, 240 TMUs, and 80 ROPs. NVIDIA has generationally narrowed the memory interface (compared to the GA104 and TU104), down to 192-bit GDDR6X. Its predecessors such as the GA104 feature 256-bit wide memory interfaces. NVIDIA is overcoming the memory bus width "deficit" by giving SKUs based on the silicon higher memory speeds (21 Gbps or more); and architecture-level improvements such as larger on-die caches. NVIDIA is reportedly planning to launch an AD104-based SKU early January 2023. VideoCardz reports that could be the RTX 4070 Ti, a re-branding of the RTX 4080 12 GB.

NVIDIA is reportedly planning to ramp its GeForce "Ada" generation into the high-volume performance segment by Summer 2023, with the introduction of the GeForce RTX 4060. The card is expected to launch somewhere around June, 2023. The card will be based on the 4 nm "AD106" silicon, the 4th chip based on the "Ada Lovelace" graphics architecture. Wolstame. a reliable source with NVIDIA leaks as Lenovo's Legion gaming desktop product manager, predicts that the RTX 4060 performance could end up matching that of the current RTX 3070 at a lower price-point.

This should make it a reasonably fast graphics card for 1440p AAA gaming with high-ultra settings, and ray tracing thrown in. What's interesting is if NVIDIA is expected to extend the DLSS 3 frame-generation feature to even this segment of graphics cards, which means a near-100% frame rate uplift can be had. Other predictions include a board power expected to be in the range of 150-180 W, and a 10% generational price-increase, which would mean that the RTX 4060 would have a launch-price similar to that of the RTX 3060 Ti (USD $399).

AMD, in its technical presentation for the new Radeon RX 7900 series "Navi 31" GPU, gave us an elaborate explanation on why it had to take the chiplets route for high-end GPUs, devices that are far more complex than CPUs. The company also enlightened us on what sets chiplet-based packages apart from classic multi-chip modules (MCMs). An MCM is a package that consists of multiple independent devices sharing a fiberglass substrate.

An example of an MCM would be a mobile Intel Core processor, in which the CPU die and the PCH die share a substrate. Here, the CPU and the PCH are independent pieces of silicon that can otherwise exist on their own packages (as they do on the desktop platform), but have been paired together on a single substrate to minimize PCB footprint, which is precious on a mobile platform. A chiplet-based device is one where a substrate is made up of multiple dies that cannot otherwise independently exist on their own packages without an impact on inter-die bandwidth or latency. They are essentially what should have been components on a monolithic die, but disintegrated into separate dies built on different semiconductor foundry nodes, with a purely cost-driven motive.

EK, the premium liquid cooling gear manufacturer, just launched the ultimate water cooling solution for the complete Gigabyte GeForce RTX 4080 lineup - Aorus Master, Gaming, Aero, and Eagle series GPUs. The EK-Quantum Vector² Master RTX 4080 D-RGB comes in the form of a water block with a black anodized aluminium backplate as an additional cooling surface.

The all-new Gigabyte GeForce RTX 4080 graphics cards are expected to be significantly more powerful than their 30-series counterparts. And while their efficiency is also improved, these cards still pull over 320 W, which means they will benefit even more from water cooling. This is especially true due to the 4 nm production process, which increases thermal density compared to the previous 8 nm chips.

Eliyan Corporation, credited for the invention of the semiconductor industry's highest-performance and most efficient chiplet interconnect, today announced two major milestones in the commercialization of its technology for multi-die chiplet integration: the close of its Series A $40M funding round, and the successful tapeout of its technology on an industry standard 5-nanometer (nm) process.

Eliyan's NuLink PHY and NuGear technologies address the critical need for a commercially viable approach to enabling high performance and cost-effectiveness in the connection of homogeneous and heterogenous architectures on a standard, organic chip substrate. It has proven to achieve similar bandwidth, power efficiency, and latency as die-to-die implementations using advanced packaging technologies, but without the other drawbacks of specialized approaches.

MediaTek today launched the Dimensity 9200, its latest 5G chipset powering the next era of flagship smartphones. Boasting extreme performance and intelligent power efficiency, the new SoC brings immersive all-day gaming experiences, ultra-sharp image capturing and support for both mmWave 5G and sub-6 GHz connectivity to consumers around the globe.

"MediaTek's Dimensity 9200 combines ultimate performance with significant power savings, extending battery life and keeping smartphones cool," said JC Hsu, Corporate Vice President and General Manager of MediaTek's wireless communications business unit at MediaTek. "With notably brighter image capturing and improved gaming speeds, along with the latest display enhancements, the Dimensity 9200 will bring new possibilities for next-gen smartphones that come in a variety of stylish and foldable form factors."

EK, the premium liquid cooling gear manufacturer, is launching a specialized water block that fits two distinct GPUs from Gigabyte - Aorus GeForce RTX 4090 Master and Gigabyte GeForce RTX 4090 GAMING. EK-Quantum Vector² Master RTX 4090 D-RGB comes in the form of a water block with a passive backplate. The all-new Aorus RTX 4090 Master and Gigabyte RTX 4090 Gaming cards are expected to be significantly more powerful than their 40-series counterparts. And while their efficiency is also improved, these cards still pull over 450 W, which means they will benefit even more from water cooling, mainly due to the 4 nm production process, which increases thermal density compared to the previous 8 nm chips. To top it off, the Master is a behemoth of a card, and opting for water cooling instead of the factory-mounted air cooler, allows you to shrink it several times in the thickness department.

The EK-Quantum Vector² Master RTX 4090 is a single-package liquid cooling solution consisting of a Vector² series water block and black-anodized aluminium backplate. As with the previous 30-series Vector² water blocks, its aesthetics are dominated by minimalist straight lines and the backplate coming around the side of the GPU to cover the PCB completely.

EK, the premium liquid cooling gear manufacturer, is now introducing the ultimate water cooling solution for ROG Strix and ASUS TUF GeForce RTX 4090 graphics cards. EK-Quantum Vector² Strix/TUF RTX 4090 D-RGB comes in the form of a water block with a passive backplate or a cooling solution with an active backplate that's sandwiching the card between two water blocks for the best possible cooling results.

The all-new RTX 4090 Strix and TUF cards are expected to be significantly more powerful than their 30-series counterparts. And while their efficiency is also improved, these cards still pull over 450 W, which means they will benefit even more from water cooling, mainly due to the 4 nm production process, which increases thermal density compared to the previous 8 nm chips.

Samsung Electronics, a world leader in advanced semiconductor technology, announced today a strengthened business strategy for its Foundry Business with the introduction of cutting-edge technologies at its annual Samsung Foundry Forum event. With significant market growth in high-performance computing (HPC), artificial intelligence (AI), 5/6G connectivity and automotive applications, demand for advanced semiconductors has increased dramatically, making innovation in semiconductor process technology critical to the business success of foundry customers. To that end, Samsung highlighted its commitment to bringing its most advanced process technology, 1.4-nanometer (nm), for mass production in 2027.

During the event, Samsung also outlined steps its Foundry Business is taking in order to meet customers' needs, including: foundry process technology innovation, process technology optimization for each specific applications, stable production capabilities, and customized services for customers. "The technology development goal down to 1.4 nm and foundry platforms specialized for each application, together with stable supply through consistent investment are all part of Samsung's strategies to secure customers' trust and support their success," said Dr. Si-young Choi, president and head of Foundry Business at Samsung Electronics. "Realizing every customer's innovations with our partners has been at the core of our foundry service."

Here's our first look at the "AD103" and "AD104" chips powering the GeForce RTX 4080 16 GB and RTX 4080 12 GB, respectively, thanks to Ryan Smith from Anandtech. These are the second- and third-largest implementations of the GeForce "Ada" graphics architecture, with the "AD102" powering the RTX 4090 being the largest. Both chips are built on the same TSMC 4N (4 nm EUV) silicon fabrication process as the AD102, but are significantly distant from it in specifications. For example, the AD102 has a staggering 80 percent more number-crunching machinery than the AD103, and a 50 percent wider memory interface. The sheer numbers at play here, enable NVIDIA to carve out dozens of SKUs based on the three chips alone, before we're shown the mid-range "AD106" in the future.

The AD103 die measures 378.6 mm², significantly smaller than the 608 mm² of the AD102, and it reflects in a much lower transistor count of 45.9 billion. The chip physically features 80 streaming multiprocessors (SM), which work out to 10,240 CUDA cores, 320 Tensor cores, 80 RT cores, and 320 TMUs. The chip is endowed with a healthy ROP count of 112, and has a 256-bit wide GDDR6X memory interface. The AD104 is smaller still, with a die-size of 294.5 mm², a transistor count of 35.8 billion, 60 SM, 7,680 CUDA cores, 240 Tensor cores, 60 RT cores, 240 TMUs, and 80 ROPs. Ryan Smith says that the RTX 4080 12 GB maxes out the AD104, which means its memory interface is physically just 192-bit wide.

The AD102 silicon on which NVIDIA's new flagship graphics card, the GeForce RTX 4090, is based, is a marvel of semiconductor engineering. Built on the 4 nm EUV (TSMC 4N) silicon fabrication process, the chip has a gargantuan transistor-count of 76.3 billion, a nearly 170% increase over the previous GA102, and a die-size of 608 mm², which is in fact smaller than the 628 mm² die-area of the GA102. This is thanks to TSMC 4N offering nearly thrice the transistor-density of the Samsung 8LPP node on which the GA102 is based.

The AD102 physically features 18,432 CUDA cores, 568 fourth-generation Tensor cores, and 142 third-generation RT cores. The streaming multiprocessors (SM) come with special components that enable the Shader Execution Reordering optimization, which has a significant performance impact on both raster- and ray traced graphics rendering performance. The silicon supports up to 24 GB of GDDR6X or up to 48 GB of GDDR6+ECC memory (the latter will be seen in the RTX Ada professional-visualization card), across a 384-bit wide memory bus. There are 568 TMUs, and a mammoth 192 ROPs on the silicon.