Intel has prepared the Core Ultra 5-238V, a Lunar Lake-MX CPU that integrates 32 GB of LPDDR5X memory into the CPU package. This new design represents a significant departure from the traditional approach of using separate memory modules, promising enhanced performance and efficiency, similar to what Apple is doing with its M series of processors. The Core Ultra 5-238V is the first of its kind for Intel to hit mass consumers. Previous attempt was with Lakefield, which didn't take off, but had advanced 3D stacked Foveros packaging. With 32 GB of high-bandwidth, low-power LPDDR5X memory directly integrated into the CPU package, the Core Ultra 5-238V eliminates the need for separate memory modules, reducing latency and improving overall system responsiveness. This seamless integration results in faster data transfer rates and lower power consumption with LPDDR5X memory running at 8533 MT.

Applications that demand intensive memory usage, such as video editing, 3D rendering, and high-end gaming, will be the first to experience performance gains. Users can expect smoother multitasking, quicker load times, and more efficient handling of memory-intensive tasks. The Core Ultra 5-238V is equipped with four big Lion Cove and four little Skymont cores, in combination with seven Xe2-LPG cores based on Battlemage GPU microarchitecture. The bigger siblings to Core Ultra 5, the Core Ultra 7 series, will feature eight Xe2-LPG cores instead of seven, with the same CPU core count, while all of them will run the fourth generation NPU.

Intel is giving its next-generation desktop processor lineup the Core Ultra 200 series processor model numbering. We detailed the processor numbering in our older report. The Core Ultra 200 series would be the company's first desktop processors with AI capabilities thanks to an integrated 50 TOPS-class NPU. At the heart of these processors is the "Arrow Lake" microarchitecture. Its development is the reason the company had to refresh "Raptor Lake" to cover its 2023-24 processor lineup. The company's "Meteor Lake" microarchitecture topped off at CPU core counts of 6P+8E, which would have proven to be a generational regression in multithreaded application performance over "Raptor Lake." The new "Arrow Lake-S" desktop processor has a maximum CPU core configuration of 8P+16E, which means consumers can expect at least the same core-counts at given price-points to carry over.

According to a report by Chinese tech publication Benchlife.info, the introduction of "Arrow Lake" would see Intel's desktop processor model numbering align with that of its mobile processor numbering, and incorporate the Core Ultra brand to denote the latest microarchitecture for a given processor generation. Since "Arrow Lake" is a generation ahead of "Meteor Lake," processor models in the series get numbered under Core Ultra 200 series.

Intel Core Ultra "Lunar Lake-MX" will be the company's bulwark against Apple's M-series Pro and Max chips, designed to power the next crop of performance ultraportables. The MX codename extension denotes MoP (memory-on-package), which sees stacked LPDDR5X memory chips share the package's fiberglass substrate with the chip, to conserve PCB footprint, and give Intel greater control over the right kind of memory speed, timings, and power-management features suited to its microarchitecture. This is essentially what Apple does with its M-series SoCs powering its MacBooks and iPad Pros. Igor's Lab scored the motherlode on the way Intel has restructured the various components across its chiplets, and the various I/O wired to the package.

When compared to "Meteor Lake," the "Lunar Lake" microarchitecture sees a small amount of "re-aggregation" of the various logic-heavy components of the processor. On "Meteor Lake," the CPU cores and the iGPU sat on separate tiles—Compute tile and Graphics tile, respectively, with a large SoC tile sitting between them, and a smaller I/O tile that serves as an extension of the SoC tile. All four tiles sat on top of a Foveros base tile, which is essentially an interposer—a silicon die that facilitates high-density microscopic wiring between the various tiles that are placed on top of it. With "Lunar Lake," there are only two tiles—the Compute tile, and the SoC tile.

There is some confidence behind removing HTT (Hyper-Threading technology) for the P-cores of its upcoming processor generations. Apparently "Lunar Lake" 17 W U-segment processors offer a substantial multithreaded performance gain of almost 50% over the current-generation "Meteor Lake," enabling Intel to do away with the power- or cache overheads that come with HTT. "Lunar Lake" will be Intel's third microarchitecture powering mobile processors under the Core Ultra brand; and its U-segment SKUs meant for ultraportables will come with processor base power values of 17 W. Intel will probably revise its platform specifications for the U-segment to denote 17 W, up from the current 15 W. Bionic Squash, a reliable source with Intel leaks, suggests so. The processors will come with a configurable base power of up to 30 W.

Intel "Lunar Lake" microarchitecture has a lot in common with the upcoming "Arrow Lake." For starters, both microarchitectures use the same combination of "Lion Cove" P-core architecture, and "Skymont" E-core architecture; however "Lunar Lake" comes with changes in the core-configuration, and the use of more advanced foundry nodes for some of its tiles. "Lunar Lake," much like "Meteor Lake," comes with a design priority for mobile platforms, which is why Intel is planning to launch this shortly after "Arrow Lake," with some reports even speaking of a late-2024 debut for the U-segment.

Intel is rumored to be preparing to tease its Core Ultra 2-series "Arrow Lake" processor at the 2024 Computex, which gets underway this June. The series itself isn't expected to launch before Q4-2024, but Computex is the only major global event between June and January for Intel to unveil or tease its next-generation processor, so here we are. At this point we don't know which exact platform of "Arrow Lake" Intel is planning to tease—whether these are the mobile variants, or the Socket LGA1851 desktop "Arrow Lake-S." An unveiling of the latter would almost definitely entail PC motherboard vendors being allowed to show off their first compatible motherboards at Computex—the perfect platform for them to do so.

The Core Ultra "Arrow Lake" retains a Foveros Tiled (chiplet) construction of "Meteor Lake," but with advancements to the chip's Compute tile, which is built on the Intel 20A foundry node, and rocks new "Lion Cove" P-cores and "Skymont" E-cores; an updated I/O tile, and an iGPU based on the updated Xe-LPG+ graphics architecture. Since the processor now serves practically all PCH functions, the mobile "Arrow Lake" is a single-chip solution, whereas the desktop "Arrow Lake-S" is expected to remain 2-chip. There will be more I/O from the CPU, though, which is why the socket has 151 more pins than the LGA1700.

Over the weekend, there have been a series of leaks from sources such as Golden Pig Upgrade, and High Yield YT, surrounding Intel's next-generation desktop processor, the Core Ultra 2-series "Arrow Lake-S." The lineup is likely to continue the new client processor naming scheme Intel introduced with the Core Ultra 1-series "Meteor Lake" on the mobile platform. "Arrow Lake-S" is rumored to debut the new Socket LGA1851, which retains cooler-compatibility with LGA1700. Although Intel has nucleated all I/O functions of the traditional PCH to "Meteor Lake," making it a single-chip solution on the mobile platform; and although the mobile "Arrow Lake" will continue to be single-chip; the desktop "Arrow Lake-S" will be a 2-chip solution. This is mainly because the desktop platform demands a lot more PCIe lanes, for a larger number of NVMe storage devices, or high bandwidth devices such as Thunderbolt and USB4 hubs, etc.

Another key finding in this latest series of leaks, is that unlike "Meteor Lake," the desktop "Arrow Lake-S" will do away with low-power island E-cores located in the SoC tile of the processor. All CPU cores are located in the Compute tile, which is expected to be built in the Intel 20A foundry node—the company's first node to implement GAAFETs (nanosheets), with backside power delivery; as well as an advanced 2nd generation EUV lithography. Intel's 1st Gen EUV is used on the current FinFET-based Intel 4 and Intel 3 foundry nodes.