Intel CEO Pat Gelsinger engaged with press/media representatives following the conclusion of his IFS Direct Connect 2024 keynote speech—when asked about Team Blue's ongoing relationship with TSMC, he confirmed that their manufacturing agreement has advanced from "5 nm to 3 nm." According to a China Times news article: "Gelsinger also confirmed the expansion of orders to TSMC, confirming that TSMC will hold orders for Intel's Arrow and Lunar Lake CPU, GPU, and NPU chips this year, and will produce them using the N3B process, officially ushering in the Intel notebook platform that the outside world has been waiting for many years." Past leaks have indicated that Intel's Arrow Lake processor family will have CPU tiles based on their in-house 20A process, while TSMC takes care of the GPU tile aspect with their 3 nm N3 process node.

That generation is expected to launch later this year—the now "officially confirmed" upgrade to 3 nm should produce pleasing performance and efficiency improvements. The current crop of Core Ultra "Meteor Lake" mobile processors has struggled with the latter, especially when compared to rivals. Lunar Lake is marked down for a 2025 launch window, so some aspects of its internal workings remain a mystery—Gelsinger has confirmed that TSMC's N3B is in the picture, but no official source has disclosed their in-house manufacturing choice(s) for LNL chips. Wccftech believes that Lunar Lake will: "utilize the same P-Core (Lion Cove) and brand-new E-Core (Skymont) core architecture which are expected to be fabricated on the 20A node. But that might also be limited to the CPU tile. The GPU tile will be a significant upgrade over the Meteor Lake and Arrow Lake CPUs since Lunar Lake ditches Alchemist and goes for the next-gen graphics architecture codenamed "Battlemage" (AKA Xe2-LPG)." Late January whispers pointed to Intel and TSMC partnering up on a 2 nanometer process for the "Nova Lake" processor generation—perhaps a very distant prospect (2026).

Smartphone chipset industry watchdogs believe that the Samsung 3 nm GAA process did not meet customer expectations, due to alleged yield issues. TSMC is seemingly victorious in this segment, as reports suggest that a next-generation 3 nm node production goal of "100,000 monthly wafers by the end of 2024" has been set. Three days ago, Samsung Foundry revealed that it is working on a very advanced SF2 GAAFET process—press outlets in South Korea propose that the manufacturing giant is hoping to outmuscle its main rival in a future 2 nm node category. Tuesday's press introduction stated that a development partnership is set: "to deliver optimized next generation ARM Cortex -X CPU developed on Samsung Foundry's latest Gate-All-Around (GAA) process technology."

A Sedaily article posits that the company's cutting-edge manufacturing tech has already attracted interest from notable parties: "Samsung Electronics is taking advantage of these advantages to win orders for the 2 nm project. Samsung Electronics took its first step by winning an order to produce a 2 nm AI accelerator from Preferred Networks (PFN), Japan's largest AI company. Qualcomm, the world's largest system semiconductor design company, has entered into discussions with Samsung Electronics' System LSI Division, which designs high-performance chips, to produce 2 nm prototypes." December 2023 news reports suggested that Samsung leadership was considering a 2 nm wafer price discount—in order to stay competitive with competing foundry services. It is possible that Qualcomm is evaluating the 2 nm SF2 GAAFET process for a distant Snapdragon 8 "Gen 5" chipset, while Samsung LSI could be working on a 2 nm "Exynos 2600" SoC design.

Taiwan Semiconductor Manufacturing Company (TSMC) is set to open its new semiconductor fabrication plant in Kumamoto Prefecture, Japan, on February 24. This facility, known as Japan Advanced Semiconductor Manufacturing (JASM), represents a significant milestone for Japan's semiconductor industry. JASM spans 52 hectares and is designed to produce mature 40, 22/28, and 12/16 nm fabrication technologies in the Fab 1. The Fab 1 has an initial monthly capacity of 40,000 300 mm wafers, scalable to 50,000 wafers per month in the near term. However, TSMC is set to expand the Kumamoto facility with Fab 2, which will produce 7 nm and 6 nm nodes and is scheduled to begin operations at the end of the 2027 calendar year. The Japanese government is set to subsidize the Fab 2 expansion with around $5 billion in aid. Combining Fab 1 and Fab 2, the JASM Kumamoto facility could produce 100,000 300 mm wafers per month once the production of Fab 2 starts. According to market research firm TrendForce, JASM provides significant additional capacity for TSMC amid a global chip shortage. It also boosts Japan's domestic chipmaking capabilities, reducing reliance on imports.

JASM is the first brand-new foreign-operated fab built in Japan. The Japanese government provided grants and tax breaks to incentivize Kumamoto Fab 1 construction as part of a national strategy to re-shore more semiconductor production and is now doing it again with Fab 2. TSMC also received subsidies from customers like Sony, SSS, DENSO and Toyota. Dr. CC Wei, CEO of TSMC, stated that JASM will "shape Japan's semiconductor landscape over the next decade." TrendForce analysts echo this sentiment, noting that JASM's advanced nodes will enable cutting-edge chip designs from Japanese automotive and consumer electronics brands. The inauguration ceremony on February 24 will be attended by TSMC partners, customers, and government representatives. JASM is expected to ramp up production over the coming year. TSMC has other non-Taiwan investments, like the facility in construction in Phoenix, Arizona, which will start mass production of chips by the end of 2027 or early 2028. At that point, the global semiconductor capacity constraints will ease significantly.

A mysterious Qualcomm Snapdragon "SM8635" model emerged earlier this month—courtesy of ever reliable smartphone tech tipster Digital Chat Station. They claimed that the unnamed mobile chipset had posted an AnTuTu score of roughly 1.7 million, with specifications including one Cortex-X4 core clocked at 2.9 GHz and an integrated Adreno 735 GPU. TSMC's 4 nm process node was also mentioned—not a particularly big revelation since the latest Snapdragon flagship is a 4 nm part. Early guess work pointed to possible Snapdragon 8s Gen 2 or Snapdragon 8 Gen 3 Lite guises, but a Geekbench Browser leak indicates that SM8635 is destined to become "Snapdragon 8s Gen 3," in Digital Chat Station's opinion.

A Realme "RMX3851" android device was tested in Geekbench 6.2.2—stated specifications include a 3.01 GHz "Big" Core clock, Adreno 735 GPU, and a 1+3+4 cluster configuration. Many believe that the SM8635 is positioned as a cut-down alternative to Snapdragon 8 Gen 3 (SM8650-AB), given that Realme specializes in producing value-oriented "near flagship" specced smartphones. Wccftech has spent hands-on time with various Qualcomm Snapdragon 8 Gen 3-powered devices: "You can see in (Realme's Geekbench entry) that the alleged Snapdragon 8s Gen 3 does not perform on the same level as its elder brother, which scores higher in both single and multi-core. For the sake of reference, I have seen the elder sibling going as high as 2,329 in single-core tests and 7,501 in multi-core tests. So, this chipset is performing at half the speed, but of course, this seems like a device that is not completely ready, so the final scores might improve." Further (insider) leaks or an official Qualcomm announcement will confirm whether the posited "Snapdragon 8s Gen 3" moniker is a good guess, although another leaked chip suggests another path. Roland Quandt reckons that a similarly configured "SM7675" SoC will be joining the Snapdragon 7 Gen family.

The AMD Radeon RX 6750 GRE (Golden Rabbit Edition) is a runaway success in China, where the card is found selling in volumes comparable to GeForce RTX 4060 Ti, and the likes. This is thanks to its aggressive pricing, and decent levels of performance given the maturity of drivers for the older RDNA2 graphics architecture. The RX 6750 GRE comes in two variants—a 10 GB variant with a 160-bit memory bus and 2,304 stream processors; and a 12 GB variant with the full 2,560 stream processors, similar to the globally available RX 6750 XT. For AMD, the success of the RX 6750 GRE couldn't have come at a better time, as it looks to mop up its 7 nm wafer allocation with TSMC with the "Navi 22" silicon, which went underutilized as GPU demand fell with the crypto-mining crash of 2022 and the subsequent move to the 5 nm next-generation; and so it needs these cards to sell at prices at least in line with the MSRP, of ¥2,219 (RMB) for the 10 GB variant, and ¥2,379 for the 12 GB model. Apparently some retailers are selling these cards below the MSRP, and AMD isn't liking this.

The way retail works in general, is that when an item is selling below MSRP, it encourages retailers to negotiate lower prices up the supply chain, which would inevitably cut income for AMD, and set off a feedback loop. To check exactly this, AMD rolled out a slew of measures. It will be monitoring the retail channel for retailers selling the card below MSRP, and impose a set of tiered penalties. For the first offense, a retailer will be penalized ¥500 per card sold below MSRP. For the second instance, this penalty goes up to ¥1,000 per card, and a stoppage of supply to the retailer. The RX 6750 GRE is so popular in China that it isn't just AMD's traditional AIB partners selling the SKU, but also several lesser known Chinese brands, which have purchased volumes of the RX 6750 GRE ASIC, and are belting out cards as the market demands. In related news, AMD is yet to launch the new Radeon RX 7600 XT in the Chinese market, because it doesn't want to disturb the flow of the RX 6750 GRE.

The cutting edge 2 nm EUV foundry node by TSMC is expected to enter risk product in Q4 2024, according to a report by Taiwan-based industry observer DigiTimes. 2 nm would be an important milestone for the foundry company, as it would be the first from the company to implement GAA (gates all around) FETs, the technological successor to FinFETs, which drove silicon fabrication node development for almost a decade, from 16 nm to 3 nm. The GAAFET technology will be critical for the foundry's journey between 2 nm and 1 nm.

TSMC is expected to risk-produce chips on its 2 nm node in its new fab at the Baoshan campus in the Hsinchu Science Park, located in northern Taiwan. Should all go well with risk production, one can expect mass production of chips by Q2-2025. Until then, refinements to the company's final FinFET node, the N3 family, will remain the cutting-edge of silicon fabrication. Samsung has a similar 2025 target set for mass production on its 2 nm node, dubbed SF2. Across the Pacific, Intel Foundry Services has its Intel 20A node, which implements GAAFET (aka RibbonFET) technology aiming for similar timelines, including an ambitious 2024 mass production target.

Apple CEO, Tim Cook, discussed planned generative AI software features during an early February earnings call: "As we look ahead, we will continue to invest in these and other technologies that will shape the future. That includes artificial intelligence, where we continue to spend a tremendous amount of time and effort, and we're excited to share the details of our ongoing work in that space later this year." His "prepared" statement did not provide any specific insights into involved technologies, but many iPhone experts believe that the upcoming release of iOS 18 could be "the biggest update" in Apple mobile operating system history. The American multinational technology giant is seemingly taking a relaxed approach with internal artificial intelligence developments—rival smartphone maker, Samsung, has already jumped into the on-the-go AI deep end with its recently launched Galaxy S24 series. Qualcomm's Snapdragon 8 Gen 3 (for Galaxy) chipset is ready to take on all sorts of artificial intelligence-augmented tasks, while a next-gen ARM Cortex-X "Blackhawk" unit (leveraging "great" LLM performance) is in the pipeline for a late 2024 rollout.

Taiwan's Economic Daily News has reached out to insider contacts, albeit on the hardware side of things—their sources reckon that Apple is working on next generation processors that sport "significantly upgraded Neural Engine performance with additional cores." Tipsters believe that plans for 2024 include an effort to "significantly strengthen the AI computing power of the (existing) M3 and A17 processors," while the true "new generation" M4 and Bionic A18 chipsets will be augmented with greater AI computing core counts. Taiwan's top foundry is reportedly in the mix: "Apple has strengthened the AI computing performance of mobile devices and greatly increased the computing power of its own processors, which has simultaneously increased its wafer investment in TSMC. According to industry sources, Apple's wafer production volume for TSMC's 3 nm enhanced version process this year is expected to increase by more than 50% compared with last year, making it firmly the largest customer of TSMC."

ASML has revealed that its cutting-edge High-NA extreme ultraviolet (EUV) chipmaking tools, called High-NA Twinscan EXE, will cost around $380 million each—over twice as much as its existing Low-NA EUV lithography systems that cost about $183 million. The company has taken 10-20 initial orders from the likes of Intel and SK Hynix and plans to manufacture 20 High-NA systems annually by 2028 to meet demand. The High-NA EUV technology represents a major breakthrough, enabling an improved 8 nm imprint resolution compared to 13 nm with current Low-NA EUV tools. This allows chipmakers to produce transistors that are nearly 1.7 times smaller, translating to a threefold increase in transistor density on chips. Attaining this level of precision is critical for manufacturing sub-3 nm chips, an industry goal for 2025-2026. It also eliminates the need for complex double patterning techniques required presently.

However, superior performance comes at a cost - literally and figuratively. The hefty $380 million price tag for each High-NA system introduces financial challenges for chipmakers. Additionally, the larger High-NA tools require completely reconfiguring chip fabrication facilities. Their halved imaging field also necessitates rethinking chip designs. As a result, adoption timelines differ across companies - Intel intends to deploy High-NA EUV at an advanced 1.8 nm (18A) node, while TSMC is taking a more conservative approach, potentially implementing it only in 2030 and not rushing the use of these lithography machines, as the company's nodes are already developing well and on time. Interestingly, the installation process of ASML's High-NA Twinscan EXE 150,000-kilogram system required 250 crates, 250 engineers, and six months to complete. So, production is as equally complex as the installation and operation of this delicate machinery.

China's homegrown Loongson 3A6000 CPU shows promise but still needs to catch up AMD and Intel's latest offerings in real-world performance. According to benchmarks by Chinese tech reviewer Geekerwan, the 3A6000 has instructions per clock (IPC) on par with AMD's Zen 4 architecture and Intel's Raptor Lake. Using the SPEC CPU 2017 processor benchmark, Geekerwan has clocked all the CPUs at 2.5 GHs to compare the raw benchmark results to Zen 4 and Intel's Raptor Lake (Raptor Cove) processors. As a result, the Loongson 3A6000 seemingly matches the latest designs by AMD and Intel in integer results, with integer IPC measured at 4.8, while Zen 4 and Raptor Cove have 5.0 and 4.9, respectively. The floating point performance is still lagging behind a lot, though. This demonstrates that Loongson's CPU design can catching up to global leaders, but still needs further development, especially for floating point arithmetic.

However, the 3A6000 is held back by low clock speeds and limited core counts. With a maximum boost speed of just 2.5 GHz across four CPU cores, the 3A6000 cannot compete with flagship chips like AMD's 16-core Ryzen 9 7950X running at 5.7 GHz. While the 3A6000's IPC is impressive, its raw computing power is a fraction of that of leading x86 CPUs. Loongson must improve manufacturing process technology to increase clock speeds, core counts, and cache size. The 3A6000's strengths highlight Loongson's ambitions: an in-house LoongArch ISA design fabricated on 12 nm achieves competitive IPC to state-of-the-art x86 chips built on more advanced TSMC 5 nm and Intel 7 nm nodes. This shows the potential behind Loongson's engineering. Reports suggest that next-generation Loongson 3A7000 CPUs will use SMIC 7 nm, allowing higher clocks and more cores to better harness the architecture's potential. So, we expect the next generation to set a bar for China's homegrown CPU performance.

NVIDIA is reportedly working to set up a new business unit focused on designing semi-custom chips for some of its largest data-center customers, Reuters reports. NVIDIA dominates the AI HPC processor market, although even its biggest customers are having to shop from its general lineup of A100 series and H100 series HPC processors. There are reports of some of these customers venturing out of the NVIDIA fold, wanting to develop their own AI processor designs. It is to cater to exactly this segment that NVIDIA is setting up the new unit.

A semi-custom chip isn't just a bespoke chip designed to a customer's specifications. It is co-developed by NVIDIA and its customer, using mainly NVIDIA IP blocks, but also integrating some third-party IP blocks the customer may want; and more importantly, approach semiconductor fabrication companies such as TSMC, Samsung, or Intel Foundry Services as separate entities from NVIDIA for their wafer allocation. For example, a company like Google may have a certain amount of wafer pre-allocation with TSMC (eg: for its Tensor SoCs powering the Pixel smartphones), which it may want to tap into for a semi-custom AI HPC processor for its cloud business. NVIDIA assesses a $30 billion TAM for this specific business unit—that's all its current customers wanting to pursue their own AI processor projects, who will now be motivated to stick to NVIDIA.

Last week SK Hynix revealed ambitious plans for its next wave of High Bandwidth Memory (HBM) products—their SEMICON Korea 2024 presentation included an announcement about cutting-edge HBM3E entering mass production within the first quarter of this year. True next-gen HBM development has already kicked off—TPU's previous report outlines an HBM4 sampling phase in 2025, followed by full production in 2026. South Korea's Pulse News believes that TSMC has been roped into a joint venture (with SK Hynix). An alleged "One Team" strategic alliance has been formed according to reports emerging from Asia—this joint effort could focus on the development of HBM4 solutions for AI fields.

Reports from last November pointed to a possible SK Hynix and NVIDIA HBM4 partnership, with TSMC involved as the designated fabricator. We are not sure if the emerging "One Team" progressive partnership will have any impact on previously agreed upon deals, but South Korean news outlets reckon that the TSMC + SK Hynix alliance will attempt to outdo Samsung's development of "new-generation AI semiconductor packaging." Team Green's upcoming roster of—"Hopper" H200 and "Blackwell" B100—AI GPUs are linked to a massive pre-paid shipment of SK Hynix HMB3E parts. HBM4 products could be fitted on a second iteration of NVIDIA's Blackwell GPU, and the mysterious "Vera Rubin" family. Notorious silicon industry tipster, kopite7kimi, believes that "R100 and GR200" GPUs are next up in Team Green's AI-cruncher queue.

The global interposer and FOWLP market is expected to be valued at USD 35.6 billion in 2024 and is projected to reach USD 63.5 billion by 2029; it is expected to grow at a CAGR of 12.3% during the forecast period according to a new report by MarketsandMarkets. The increasing demand for advanced packaging in AI and high-performance computing (HPC) are the key drivers fueling the expansion of the interposer and FOWLP market.

Interposer-based packaging is experiencing robust growth in the semiconductor industry, leveraging its ability to enhance performance and reduce power consumption by facilitating efficient connections between diverse chip components. This technology is increasingly adopted for its role in enabling high-bandwidth and high-performance applications, driving advancements in data centers, 5G infrastructure, and emerging technologies.

DigiTimes Asia has reached out to insiders at fabrication toolmakers in an effort to delve deeper into claims made by industry analysts at the start of 2024—both SemiAnalysis and China Renaissance have proposed that TSMC is unlikely to adopt High-NA EUV production techniques within a five year period. The latest news article explores a non-upgrade approach for the next couple of years: "TSMC has not placed orders for high-numerical aperture (High-NA) extreme ultraviolet (EUV) tools and is unlikely to use the technology in 2 nm and 1.4 nm (A14) process manufacturing." Intel Foundry Services (IFS) will be one of the first semiconductor manufacturers to go online with ASML's latest and greatest machinery, although no firm timeframes have been confirmed. Team Blue's Taiwanese rival (and occasional business partner) is seemingly happy with its existing infrastructure, but industry watchdogs propose that cost considerations are key factors behind TSMC's cautious planning for the next decade.

The DigiTimes insider sources believe that TSMC will not budge until at least 2029, possibly coinciding with a 1 nm production node—analysts at China Renaissance reckon that High-NA EUV machines could be delivered in the future when facilities are readied for an "A10" codenamed process. TSMC published a very ambitious "transistor count" product timeline in early January (see below)—the first "1 nm" products are supposedly targeted for a 2030 rollout, but this schedule could change due to unforeseen circumstances. Intel is expected to "phase in" its fanciest ASML gear collection once the 18A process becomes old hat—Tom's Hardware thinks that 2026 - 2027 is a feasible timeframe.

This week in its earnings call, Samsung announced that its foundry business has received a significant order for a two nanometer AI chips, marking a major win for its advanced fabrication technology. The unnamed customer has contracted Samsung to produce AI accelerators using its upcoming 2 nm process node, which promises significant gains in performance and efficiency over today's leading-edge chips. Along with the AI chips, the deal includes supporting HBM and advanced packaging - indicating a large-scale and complex project. Industry sources speculate the order may be from a major hyperscaler like Google, Microsoft, or Alibaba, who are aggressively expanding their AI capabilities. Competition for AI chip contracts has heated up as the field becomes crucial for data centers, autonomous vehicles, and other emerging applications. Samsung said demand recovery in 2023 across smartphones, PCs and enterprise hardware will fuel growth for its broader foundry business. It's forging ahead with 3 nm production while eyeing 2 nm for launch around 2025.

Compared to its 3 nm process, 2 nm aims to increase power efficiency by 25% and boost performance by 12% while reducing chip area by 5%. The new order provides validation for Samsung's billion-dollar investments in next-generation manufacturing. It also bolsters Samsung's position against Taiwan-based TSMC, which holds a large portion of the foundry market share. TSMC landed Apple as its first 2 nm customer, while Intel announced 5G infrastructure chip orders from Ericsson and Faraday Technology using its "Intel 18A" node. With rivals securing major customers, Samsung is aggressively pricing 2 nm to attract clients. Reports indicate Qualcomm may shift some flagship mobile chips to Samsung's foundry at the 2 nm node, so if the yields are good, the node has a great potential to attract customers.

TSM, Sony Semiconductor Solutions Corporation ("SSS"), DENSO Corporation ("DENSO") and Toyota Motor Corporation ("Toyota") today announced further investment into Japan Advanced Semiconductor Manufacturing, Inc. ("JASM"), TSMC's majority-owned manufacturing subsidiary in Kumamoto Prefecture, Japan, to build a second fab, which is scheduled to begin operation by the end of the 2027 calendar year. Toyota will also take a minority stake. Together with JASM's first fab, which is scheduled to begin operation in 2024, the overall investment in JASM will exceed US$20 billion with strong support from the Japanese government.

In response to rising customer demand, JASM plans to commence construction of its second fab by the end of 2024. The increased production scale is also expected to improve overall cost structure and supply chain efficiency for JASM. With both fabs, JASM's Kumamoto site is expected to offer a total production capacity of more than 100,000 12-inch wafers per month starting from 40, 22/28, 12/16 and 6/7 nanometer process technologies for automotive, industrial, consumer and HPC-related applications. The capacity plan may be further adjusted based upon customer demand. With both fabs, the Kumamoto site is expected to directly create more than 3,400 high-tech professional jobs.

Taiwan Semiconductor Manufacturing Company (TSMC) has reached a significant milestone, overtaking Intel and Samsung to become the world's largest semiconductor maker by revenue. According to Taiwanese financial analyst Dan Nystedt, TSMC earned $69.3 billion in revenue in 2023, surpassing Intel's $63 billion and Samsung's $58 billion. This is a remarkable achievement for the Taiwanese chipmaker, which has historically lagged behind Intel and Samsung in terms of revenue despite being the world's largest semiconductor foundry. TSMC's meteoric rise has been fueled by the increased demand for everything digital - from PCs to game consoles - during the coronavirus pandemic in 2020, and AI demand in the previous year. With its cutting-edge production capabilities allowing it to manufacture chips using the latest process technologies, TSMC has pulled far ahead of Intel and Samsung and can now charge a premium for its services.

This is reflected in its financials. For the 6th straight quarter, TSMC's Q4 2023 revenue of $19.55 billion also beat Intel's $15.41 billion and Samsung's $16.42 billion chip division revenue. As the world continues its rapid transformation in the AI era of devices, TSMC looks set to hold on to its top position for the foreseeable future. Its revenue and profits will likely continue to eclipse those of historical giants like Intel and Samsung. However, a big contender is Intel Foundry Services, which is slowly starting to gain external customers. If IFS takes off and new customers start adopting Intel as their foundry of choice, team blue could regain leadership in the coming years.

NVIDIA's supply of AI chips remains tight due to insufficient advanced packaging production capacity from key partner TSMC. As per the UDN report, NVIDIA will add Intel as a provider of advanced packaging services to help ease the constraints. Intel is expected to start supplying NVIDIA with a monthly advanced packaging capacity of about 5,000 units in Q2 at the earliest. While TSMC will remain NVIDIA's primary packaging partner, Intel's participation significantly boosts NVIDIA's total production capacity by nearly 10%. Even after Intel comes online, TSMC will still account for the lion's share—about 90% of NVIDIA's advanced packaging needs. TSMC is also aggressively expanding capacity, with monthly production expected to reach nearly 50,000 units in Q1, a 25% increase over December 2023. Intel has advanced packaging facilities in the U.S. and is expanding its capacity in Penang. The company has an open model, allowing customers to leverage its packaging solutions separately.

The AI chip shortages stemmed from insufficient advanced packaging capacity, tight HBM3 memory supply, and overordering by some cloud providers. These constraints are now easing faster than anticipated. The additional supply will benefit AI server providers like Quanta, Inventec and GIGABYTE. Quanta stated that the demand for AI servers remains robust, with the main limitation being chip supply. Both Inventec and GIGABYTE expect strong AI server shipment growth this year as supply issues resolve. The ramping capacity from TSMC and Intel in advanced packaging and improvements upstream suggest the AI supply crunch may be loosening. This would allow cloud service providers to continue the rapid deployment of AI workloads.

Phison Electronics, a leading provider of NAND controllers and NAND storage solutions, today announced it has introduced a full range of UFS (Universal Flash Storage) controllers (PS8325, PS8327, PS8329, PS8361). Phison's new UFS solutions support entry-level, middle, premium and flagship smartphone devices to achieve maximum performance in mobile storage and enhance user experiences.

As smartphone devices require higher performance, the storage devices of many entry-level 5G models have transitioned from eMMC to UFS 2.2 storage, and even flagship models of 4G phones have begun adopting the UFS 2.2 specification. Compared to the half-duplex mode of eMMC, the full-duplex mode of UFS 2.2 significantly increases read speeds by three times, not only handling smartphone functions that require processing large amounts of data (such as high-resolution recording and video playback), but also consuming lower power under the same performance speed as eMMC. This helps improve the battery life of smartphones and tablets, meeting the high-performance and low-power consumption needs of mobile devices.

AMD's next generation Ryzen mobile processor family is undergoing a significant re-positioning of IP within its product stack, as the company introduces the new "elite experience" segment. The "Fire Range" mobile processor is a direct successor to "Dragon Range" MCM, with two 8-core "Zen 5" chiplets. It is essentially a BGA package of the desktop "Granite Ridge" processor, and comes with up to 16 "Zen 5" cores, for flagship gaming notebooks and mobile workstations. A segment below the current "Dragon Range" is the current "Hawk Point" silicon, driving premium experiences. There is a rather large CPU performance gap between the two, as would be the case between the upcoming "Fire Range" and "Kraken Point," which is why AMD is creating the "elite experience" segment, and filling it with "Strix Halo" and "Strix Point," which will square off against Core Ultra 7 and Core Ultra 9 processors, as well as certain HX-segment 14th Gen Core mobile processors. "Strix Point" has a significant core-count increase to 12, along with a large iGPU. We've extensively covered "Strix Point" in our older article, but now we have more information on the elusive "Kraken Point."

"Kraken Point" is codename for AMD's next-generation monolithic mobile processor silicon being designed to power Ryzen processor SKUs competing against the bulk of Intel Core Ultra 5 and Core Ultra 7 SKUs. This chip will be built on a refined 4 nm EUV node by TSMC, and will be monolithic. Its most interesting aspect is the CPU complex. It reportedly features a combination of four regular "Zen 5" cores, and four "Zen 5c" low power cores. All eight cores will likely share a single CCX, which means they share a common L3 cache, which enables easy movement of threads between the two kinds of cores, without having to make round-trips to the DRAM.

AMD is looking to debut its Ryzen 9000 series "Granite Ridge" desktop processors based on the "Zen 5" microarchitecture some time around May-June 2024, according to High Yield YT, a reliable source with AMD leaks. These processors will be built in the existing Socket AM5 package, and be compatible with all existing AMD 600 series chipset motherboards. It remains to be seen if AMD debuts a new line of motherboard chipsets. Almost all Socket AM5 motherboards come with the USB BIOS flashback feature, which means motherboards from even the earliest production batches that are in the retail channel, should be able to easily support the new processors.

AMD is giving its next-gen desktop processors the Ryzen 9000 series processor model numbering, as it used the Ryzen 8000 series for its recently announced Socket AM5 desktop APUs based on the "Hawk Point" monolithic silicon. "Granite Ridge" will be a chiplet-based processor, much like the Ryzen 7000 series "Raphael." In fact, it will even retain the same 6 nm client I/O die (cIOD) as "Raphael," with some possible revisions made to increase its native DDR5 memory frequency (up from the current DDR5-5200), and improve its memory overclocking capabilities. It's being reported that DDR5-6400 could be the new "sweetspot" memory speed for these processors, up from the current DDR5-6000.

A DigiTimes Asia report posits that TSMC is preparing another VVIP foundry lane for Apple Inc.—insiders claim that the Taiwanese foundry giant is in the process of expanding production capacity into next generation 2 nm nanometer fields. This expensive and time consuming endeavor is only made possible with the reassurance of big customers being added to the foundry's order books. TSMC's 2 nm-class N2, N2P, and N2X process technologies are due in 2025 and beyond (according to recent presentation slides)—these advanced packages are set to drop with all sorts of innovations: nanosheet gate-all-around (GAA) transistors, backside power delivery, and super-high-performance metal-insulator-metal (SHPMIM). According to a DigiTimes source "Apple is widely believed to be the initial client to utilize the (next-gen) process."

Apple and NVIDIA were reported to be ahead of many important clients in the queue for TSMC's 3 nm process nodes, so it is not surprising to see old patterns repeat (according to industry rumors) again. Apple is expected to update its next generation iPhones, iPad, and Mac laptop product lines with more advanced Bionic and M-series chipsets in 2025. Last year's roster included a rollout of 3 nm TSMC silicon across Apple A17 Pro and M3 ARM-based processors.

MediaTek revealed its (now current generation) flagship Dimensity 9300 flagship mobile processor last November, but we are already hearing about its successor's foundation. Digital Chat Station published some early insights on their Weibo micro-blog—the tipster appears to have an inside track at MediaTek's system-on-chip R&D department. The imaginatively named "Dimensity 9400" chipset is reportedly earmarked for mass production chez TSMC, with the foundry's second generation 3 Nm process being the favored node—this information aligns with official announcements as well as industry rumors from last autumn. MediaTek's Dimensity 9300 sports a "one-of-a-kind All Big Core design," with no provision for puny efficiency units—built on TSMC's third generation 4 nm process with four ARM Cortex-X4 cores (going up to 3.25 GHz) and four Cortex-A720 cores (maximum 2.0 GHz).

Digital Chat Station reckons that the 9300's All Big Core configuration will carryover to its next generation sibling, albeit with some major upgrades. MediaTek hardware engineers are alleged to have selected ARM's latest and greatest CPU and Mali GPU designs—the Cortex-X5 core could be a prime candidate in the first category. The rumor mill has the next batch of flagship Exynos SoCs utilizing ARM's fifth generation design. Digital Chat Station proposes that more smartphone manufacturers could adopt a top-flight Dimensity 2024 chip, if its performance can match the closest rivals. Industry experts posit both MediaTek and Qualcomm choosing TSMC's N3E process for their upcoming flagship chipsets—this node apparently "offers improved cost-effectiveness and superior yields" when compared to the first generation N3B process (as ordered by Apple for its latest M and B-series SoCs). Dimensity 9400 is expected to take on Snapdragon 8 Gen 4—this could be a tough fight, given that Qualcomm's offering is set to debut with custom Oryon cores.

News reports from Asia point to an ongoing price battle between major chip foundries in the region—sluggish market conditions in 2023 have caused the big industry names to adjust charges, in concerted efforts to retain customers. This situation has escalated in early 2024—news media outlets claim that mainland China-situated factories have plenty of new production capacity, and are therefore eager to get their order books filled. The reports point to: "Semiconductor Manufacturing International Corporation (SMIC), Hua Hong Semiconductor and Jinghe Semiconductor lowering the price of tape-out services to chip design companies in Taiwan." Industry insiders believe that several Taiwanese IC designers have jumped onto better deals, as offered by Chinese facilities—it is alleged that Samsung, GlobalFoundries, UMC and Powerchip have all experienced a worrying increase in customer cancellations (at the tail end of 2023). The loss of long-term clients has forced manufacturers—in South Korea and Taiwan—into a price war.

TrendForce's analysis of market trends stated: "Due to the mature manufacturing processes in China, unaffected by US export restrictions, the lowered wafer fabrication costs have become attractive to Taiwanese IC design companies seeking to enhance their cost competitiveness. Reports also indicate that this competitive pressure has forced Taiwan's foundries, UMC and PSMC, to follow suit by reducing their prices. UMC has lowered its 12-inch wafer foundry services by an average of 10-15%, while its 8-inch wafer services have seen an average price reduction of 20%. These price adjustments took effect in the fourth quarter of 2023." Samsung is reportedly slashing prices by ~10-15%, and is expressing a "willingness to negotiate" with key clients in early 2024. Reports state this is a major change in attitude for the South Korean chip giant—allegedly, leadership was unwilling to budge on 2023 tape-out costs. TrendForce reckons that TSMC's response was a bit quicker: "(having) already initiated pricing concessions last year, mainly related to mask costs rather than wafer fabrication. It was reported that these concessions primarily applied to the 7 nm process and were dependent on order volumes."

TSMC (TWSE: 2330, NYSE: TSM) today announced consolidated revenue of NT$625.53 billion, net income of NT$238.71 billion, and diluted earnings per share of NT$9.21 (US$1.44 per ADR unit) for the fourth quarter ended December 31, 2023.

Year-over-year, fourth quarter revenue was essentially flat while net income and diluted EPS both decreased 19.3%. Compared to third quarter 2023, fourth quarter results represented a 14.4% increase in revenue and a 13.1% increase in net income. All figures were prepared in accordance with TIFRS on a consolidated basis. In US dollars, fourth quarter revenue was $19.62 billion, which decreased 1.5% year-over-year but increased 13.6% from the previous quarter.

TSMC's Fab 21 Phase 2 facility is currently under construction in the Greater Phoenix area, Arizona—this secondary production facility was originally announced as housing a 3 nm process production line (opening by 2026), but that company target will be missed by a sizable margin. The transcription of the company's Q4 2023 Earnings Call presents another set of shifted expectations—outgoing CEO, Dr. Mark Liu—admitted that a number of factors are expected to delay Phase 2's opening by another year or two: "The second fab shell is under construction, but what technology [to use] in that shell is still under discussion...I think that also has to do with how much incentives that fab, the U.S. Government can provide…The current planning [for the fab] is '27 or '28, that will be timeframe."

Industry analysts believe TSMC leadership have a tough choice to make—the second Arizona factory's delayed launch could provide enough lead time to upgrade with a more advanced node (e.g. 2 nm), but ambitions could be lowered for the troubled site. An older plus more mature fabrication process could be a better fit, although the neighboring Fab 21 Phase 1 site is already set for a full 2025 initiation on 4 nm FinFET. Liu outlined this challenge: "To be honest, most of the overseas fabs, what technology is being set up, really, it is a decision of customers' demand in that area at that timing. So, nothing is definitive, but we are trying to optimize value for the overseas fab for TSMC." The current chairman will not be around for Phase 1's full deployment, but he shared some positive Arizona-related news: "We are well on track for volume production of N4, or 4 nm process technology, in the first half of 2025 [in Arizona] and are confident that once we begin operations, we will be able to deliver the same level of manufacturing quality and reliability in Arizona as from our fabs in Taiwan."