Wednesday, December 11th 2019
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Intel's Process Roadmap Gets Updated with Plans to go Back to Two Year Cadence
During the IEDM event hosted by the IEEE organization, ASML's CEO, Martin van den Brink, took the stage to elaborate more on ASML's vision of the future of semiconductors. When talking about the future of semiconductors, Mr. Brink started talking about Intel and their vision for the future. Intel's slides were showing many things including backporting of IP to older processes and plan to go back to "tick-tock" two-year cadence to restore the previous confidence in Intel's manufacturing capabilities.
Perhaps one of the most interesting notes about the presentation is the fact that Intel is working hard to realize its plans of bringing back a two-year cadence of "tick-tock" process realization. That means that in the future, presumably after 10 nm debut problems are solved, Intel wants to do the old process and optimization tactics. A slide (shown below) titled "In Moore We Trust" is speaking a lot about Intel's future plans, showing few things in particular: Intel's upcoming 10 nm++ and 10 nm+++ nodes, and the possibility of backporting.When it comes to 10 nm++ and 10 nm+++ nodes, Intel is displaying that they are already working on improved versions of 10 nm+ node used in Ice Lake chips so that new and improved versions of 10 nm node will be ready for higher frequencies and better performance. The current version of 10 nm+ node is not very capable frequency wise, as there is currently only one Ice Lake SKU that can reach 4 GHz, while current 14 nm products are capable of reaching 5 GHz with ease. These upcoming nodes are supposed to address this problem by providing faster transistors.
Additionally, backporting is now going to node manufacturing, not IP only anymore. So far Intel spoke of backporting as a means to deliver new IP built for 10 nm for example to older process like 14 nm if needed. However, the new slide shows the intention of Intel to apply backporting techniques to a semiconductor process. For example, 7 nm can get backported to 10 nm node in form of 10 nm+++ so that it still officially is 10 nm by Intel's standards, but features overall transistor improvements that were supposed to be released on 7 nm node.
Intel is also developing new nodes that are going to be released as far as ten years from now. Shown above is the 1.4 nm node, scheduled for release in 2029 when it will supposedly be launched. The 1.4 nm node is supposed to have a density of 1.6 billion transistors per square millimeter, which is equivalent to many of the early 14 nm Broadwell CPUs. It is unimaginable to think about such distant technologies now, plus, as the roadmap shows, all the information displayed is subject to change.
Source:
WikiChip
Perhaps one of the most interesting notes about the presentation is the fact that Intel is working hard to realize its plans of bringing back a two-year cadence of "tick-tock" process realization. That means that in the future, presumably after 10 nm debut problems are solved, Intel wants to do the old process and optimization tactics. A slide (shown below) titled "In Moore We Trust" is speaking a lot about Intel's future plans, showing few things in particular: Intel's upcoming 10 nm++ and 10 nm+++ nodes, and the possibility of backporting.When it comes to 10 nm++ and 10 nm+++ nodes, Intel is displaying that they are already working on improved versions of 10 nm+ node used in Ice Lake chips so that new and improved versions of 10 nm node will be ready for higher frequencies and better performance. The current version of 10 nm+ node is not very capable frequency wise, as there is currently only one Ice Lake SKU that can reach 4 GHz, while current 14 nm products are capable of reaching 5 GHz with ease. These upcoming nodes are supposed to address this problem by providing faster transistors.
Additionally, backporting is now going to node manufacturing, not IP only anymore. So far Intel spoke of backporting as a means to deliver new IP built for 10 nm for example to older process like 14 nm if needed. However, the new slide shows the intention of Intel to apply backporting techniques to a semiconductor process. For example, 7 nm can get backported to 10 nm node in form of 10 nm+++ so that it still officially is 10 nm by Intel's standards, but features overall transistor improvements that were supposed to be released on 7 nm node.
Intel is also developing new nodes that are going to be released as far as ten years from now. Shown above is the 1.4 nm node, scheduled for release in 2029 when it will supposedly be launched. The 1.4 nm node is supposed to have a density of 1.6 billion transistors per square millimeter, which is equivalent to many of the early 14 nm Broadwell CPUs. It is unimaginable to think about such distant technologies now, plus, as the roadmap shows, all the information displayed is subject to change.
33 Comments on Intel's Process Roadmap Gets Updated with Plans to go Back to Two Year Cadence
I am cringing hard right now, TechPowerup doesn't even know that 1.4nm node is just a marketing name and not the real size of the transistors???????
In the meantime, AMD is launching real processors lol
That's the most tarded roadmap ever conceived and Intel has released some doozies lol
It's an admittance of their node failures, current and future. They don't expect to hit any of these timelines.
That said, nice roadmap, can I buy one? No? *shocked, walks away*
With that said intel really needs to get their crap together. While I doubt AMD will stagnate anytime soon as they have ALOT of growing to do to catch up to Intel. One company completely thrashing the other is never good for the consumer.
I do hope AMD's 4000 ryzen finally takee away the gaming crown from intel just so I can stop seeing "King of gaming" as about the only good thing for intel. Plus intel really needs to fix these vulnerabilitie issues that seem to pop up almost a new one monthly.
More like 100 of them after all 14x14nm=196, and 1,4^1,4=1,96, 100 times smaller. well not exactly.. 16 Mtr and 1600Mtr/mm2.
I need a good job and forget about computers for a while and come back when this is ready.
The fact that Intel has now cut the price of the new Cascade Lake-X 10000 series by about half strongly suggests there was never any justification for Intel's past pricing schemes. This means they were not operating in good faith with their customer base.
I have zero sympathy for them... They sat around with their thumbs up their butts doing absolutely nothing for 7 years when they had a technological lead over AMD, and now AMD has caught them with their pants down and there's nothing they can do. They brought this on themselves with their years of greedy, arrogant complacency.
Backport opportunity is just another escape hatch to find solid ground when their research efforts blow up in their face like it's been as of late.
Optimal cost (Profit) path they're still wishing for shown.
EUV and "New Features", "New Features", "New Features", ....... What new features?
Would be beyond sad to say that in...... 2025 right?
This looks like a thing taken from one of the boardroom meeting slideshow presentations and posted here.
I mean seriously, that's what it looks like.
Smaller nodes give us smaller transistors that use less power to operate between on and off state.
Who doesn't understand that and claim to be an enthusiast? Plus it's probably a slightly edited PR sheet from Intel.
So maybe lay off the harsh sauce.
Its almost like the marketing team was given orders to produce a weekly 'Look, we've totally recovered our mojo' moment. Its hilarious
Ten years for five shrinks. Let's count a little, where were we in 2009?
ark.intel.com/content/www/us/en/ark/products/41315/intel-core-i7-870-processor-8m-cache-2-93-ghz.html
Hmm... >32>22>14.... and didn't it get progressively harder? :P
Little correction : The fin width is 8nm (on intel 14nm) and 6nm (on TSMC 10 and 7nm) but we can extrapolate that on intel 1.4nm, the fin width won't be that small (and it's just the width anyway). I just read the source document, there is no talk about number of atoms, no talk about metal layers and no talk about copper transistors. So i guess you just made that up?
And i dont claim to be an enthusiast, i am one.
And i would really want to lay off the harsh sauce, but as you can see, you guys aren't helping me...
I suppose I did make all of this up, all CPU transistors contain tiny people, trapped and forced to learn math..... It's a huge conspiracy.