Monday, October 18th 2021
AMD Ryzen Mobile "Raphael-H" Series Could Pack 16 Cores Based on Zen 4 Architecture
As we await the update of AMD's highly anticipated 6000 series Rembrandt APUs based on Zen 3 cores and RDNA2 graphics, we are in for a surprise with information about the next generation, more than a year away, of Ryzen 7000 series mobile processors based on Zen 4 architecture. Codenamed Raphael-H, it co-exists with the upcoming lineup of Phoenix APUs, which come after the 6000 series Rembrandt APU lineup. This mobile variant of the forthcoming desktop Raphael processors features as many as 16 cores based on Zen 4 architecture. What is so special about the Raphael-H is that it represents a mobile adaptation of desktop processors, and we are not sure how it will be different from the Phoenix APUs. However, we assume that Phoenix is going to feature a more powerful graphics solution.
The confusing thing is the timeline of these processors. First comes the Rembrandt APUs (6000 series) and then both the Raphael-H and Phoenix mobile processors. AMD could disable iGPU on mobile Raphael-H designs. However, that is just a guess. We have to wait to find out more in the upcoming months.
Source:
via VideoCardz
The confusing thing is the timeline of these processors. First comes the Rembrandt APUs (6000 series) and then both the Raphael-H and Phoenix mobile processors. AMD could disable iGPU on mobile Raphael-H designs. However, that is just a guess. We have to wait to find out more in the upcoming months.
24 Comments on AMD Ryzen Mobile "Raphael-H" Series Could Pack 16 Cores Based on Zen 4 Architecture
Before
After
For what ? for the Cores Count:confused:
This a terrible future, like on Android drölf cores but most in use are 4 Effi and 4 Performance Cores from 10, 12 etc.
CPU is around 27%
100% Load on IGP
No the CPU dont clocks down, the IGP clocks down :laugh:
In Kaverie Times the Powermanagment works in the right sight:
40% CPU usage
100% IGP usage
CPU Clocks down:)
I'm coding close to metal for many architectures. I'm also coding in high-level languages, too. Usually, my peers whine that I code slowly. Only that once my code is deployed, everyone just forgets it's there. It simply runs, taking care of itself, exceptions handling and all. I actually code everything for security and fault tolerance.
99% percent of all crashes blamed on my code turn out to be because of someone else's code.
I just failed to understand what silicon errata have to do with sloppy coding and non-existent QA?
"I wonder what they broke in exchange?"
Oh is that leet speak then?!
I'm struggling with most of what you said, relative to the OP personally.
Be nice to know what Zen 4 brings so I could get excited.
I don't practice 1337 speak except when in very select circles. Last thing I aim for is bluepilling my epeen on public forum.
The problem wasn't there with all previous Windows OS's, just with Windows 11, and it was fixed with just an update, it didn't require a new chip.
But true, every chip also has faults, but not in this case we're talking about.
I only read techpowerup so that’s why I asked if it has been resolved yet?