Friday, September 29th 2023
AMD Zen 5 Microarchitecture Referenced in Leaked Slides
A couple of slides from AMD's internal presentation were leaked to the web by Moore's Law is Dead, referencing what's allegedly the next-generation "Zen 5" microarchitecture. Internally, the performance variant of the "Zen 5" core is referred to as "Nirvana," and the CCD chiplet (CPU core die) based on "Nirvana" cores, is codenamed "Eldora." These CCDs will make up either the company's Ryzen "Granite Ridge" desktop processors, or EPYC "Turin" server processors. The cores themselves could also be part of the company's next-generation mobile processors, as part of heterogenous CCXs (CPU core complex), next to "Zen 5c" low-power cores.
In broad strokes, AMD describes "Zen 5" as introducing a 10% to 15% IPC increase over the current "Zen 4." The core will feature a larger 48 KB L1D cache, compared to the current 32 KB. As for the core itself, it features an 8-wide dispatch from the micro-op queue, compared to the 6-wide dispatch of "Zen 4." The integer execution stage gets 6 ALUs, compared to the current 4. The floating point unit gets FP-512 capabilities. Perhaps the biggest announcement is that AMD has increased the maximum cores per CCX from 8 to 16. At this point we don't know if it means that "Eldora" CCD will have 16 cores, or whether it means that the cloud-specific CCD with 16 "Zen 5c" cores will have 16 cores within a single CCX, rather than spread across two CCXs with smaller L3 caches. AMD is leveraging the TSMC 4 nm EUV node for "Eldora," the mobile processor based on "Zen 5" could be based on the more advanced TSMC 3 nm EUV node.
The opening slide also provides a fascinating way AMD describes its CPU core architectures. According to this, "Zen 3" and "Zen 5" are new cores, while "Zen 4" and the future "Zen 6" cores are leveraged cores. If you recall, "Zen 3" had provided a massive 19% IPC uplift over "Zen 2," which helped AMD dominate the CPU market. Although with a more conservative 15% IPC gain estimate over "Zen 4," the "Zen 5" core is expected to have as big of an impact on AMD's competitiveness.
Speaking of the "Zen 6" microarchitecture and the "Morpheus" core, AMD is anticipating a 10% IPC increase over "Zen 5," new FP16 capabilities for the core, and a 32-core CCX (maximum core-count). This would see a second round of significant increases in CPU core counts.
Diving deep into the "Zen 5" core, and we see AMD introduce an even more advanced branch prediction unit. If you recall, branch predictor improvements had the largest contribution toward the generational IPC gain of "Zen 4." The new branch predictor comes with zero bubble conditional branches capabilities, accuracy improvements, and a larger BTB (branch target buffer). As we mentioned, the core has a larger 48 KB L1D cache, and an unspecified larger D-TLB. There are throughput improvement across the front-end and load/store stages, with dual basic block fetch units, 8-wide op dispatch/rename; Op Fusion, a 50% increase in ALCs, a deeper execution window, a more capable prefetcher, and updates to the CPU core ISA and security. The dedicated L2 cache per core remains 1 MB in size.
Sources:
cyperalien (Reddit), Moore's Law is Dead (YouTube)
In broad strokes, AMD describes "Zen 5" as introducing a 10% to 15% IPC increase over the current "Zen 4." The core will feature a larger 48 KB L1D cache, compared to the current 32 KB. As for the core itself, it features an 8-wide dispatch from the micro-op queue, compared to the 6-wide dispatch of "Zen 4." The integer execution stage gets 6 ALUs, compared to the current 4. The floating point unit gets FP-512 capabilities. Perhaps the biggest announcement is that AMD has increased the maximum cores per CCX from 8 to 16. At this point we don't know if it means that "Eldora" CCD will have 16 cores, or whether it means that the cloud-specific CCD with 16 "Zen 5c" cores will have 16 cores within a single CCX, rather than spread across two CCXs with smaller L3 caches. AMD is leveraging the TSMC 4 nm EUV node for "Eldora," the mobile processor based on "Zen 5" could be based on the more advanced TSMC 3 nm EUV node.
Speaking of the "Zen 6" microarchitecture and the "Morpheus" core, AMD is anticipating a 10% IPC increase over "Zen 5," new FP16 capabilities for the core, and a 32-core CCX (maximum core-count). This would see a second round of significant increases in CPU core counts.
Diving deep into the "Zen 5" core, and we see AMD introduce an even more advanced branch prediction unit. If you recall, branch predictor improvements had the largest contribution toward the generational IPC gain of "Zen 4." The new branch predictor comes with zero bubble conditional branches capabilities, accuracy improvements, and a larger BTB (branch target buffer). As we mentioned, the core has a larger 48 KB L1D cache, and an unspecified larger D-TLB. There are throughput improvement across the front-end and load/store stages, with dual basic block fetch units, 8-wide op dispatch/rename; Op Fusion, a 50% increase in ALCs, a deeper execution window, a more capable prefetcher, and updates to the CPU core ISA and security. The dedicated L2 cache per core remains 1 MB in size.
111 Comments on AMD Zen 5 Microarchitecture Referenced in Leaked Slides
Take your off-topic beef somewhere else.
Are we talking about possible Zen 5 architecture or the history of gains and and players in the cpu market today?
TPU needs some moderators..
And if the level of moderation was at the very strong end of the spectrum, it could be viewed as the actual article itself needs moderation as the article covers "leaks", and a certain YouTube channel that many here have attacked. But then of course if TPU did not cover things like this they would not get anywhere near as much traffic and end up being a half-dead and soul-less tech-site like AnandTech or Toms Hardware (both owned by the same company FYI), so decisions need to be made about the content put out by TPU, and the level of moderation. I am perfectly happy with things as they are as IMHO it appears to be well balanced with a ban on vulgarity and personal attacks, but otherwise letting free-speech rule, and that is ultimately how people find the best solutions to problems, people talking, even if that does become off-topic regularly.
However, for every person arguing, there are 10 that are quietly reading and internally deciding who they agree with, or none, and ultimately the discussion moves on, which we saw repeatedly within this thread, often as a new person comes with a new comment, off-topic or not, they have chosen to engage, wich IHMO betters us all. Now perhaps with your and my post replying, that are ironically both off-topic. With the free market of ideas I may have changed your opinion, or not, but without free speech, we would not even be able to discuss this, or have the various insights into who has the rights to even make x86 CPU's, what is considered a good IPC gain from one generation to the next, the relative cost of CPU's and so on.
As I say, I like this forum, and website, and wouldn't change anything (unless I really spent some time looking for things to change.).
Getting the post back on track..
There isn't a single mention of Zen5 on AMD's official site which is honestly comforting.
Let everyone froth at the grey matter with anticipation and conjecture as we weave our way through a bunch of bs leaks, accidental releases and supposed inside sources.
That is until we get the actual, non-engineering sample release from AMD. Waiting is fun. Fake PR is lame.
@btarunr You might want to ask some questions here...
Should we also look into bots? Same story.
Easier to find them with identical writing style (human) or complete lack of writing style (bot).
Me? I'm on one account like you ( ;) ). I recently stepped back into forms because of the aforementioned issues which are beginning to subside.
We're your posts delayed and screened for 3 months before you could post in real-time? Moderation. That was fun..
We're off topic, again.
THREADRIPPER FTW!!!!!!!1 :)
@btarunr
@the54thvoidExcept that I do not believe you, and considering that I have looked at some of your other posts, you generally write well, and accurately, which is why I take this as a statement of fact that you use multiple accounts. If you wish to discuss this further, I suggest that you do so with various Admins. I personally consider this matter closed and the conclusions drawn by the Admins as resolute, and perhaps we may discuss further this subject as it was originally penned, however MORE "leaks" have come out, so we may sadly see a repeat of this.
Here however on a Tech forum, few people ever use their real names including you, me and "Shoskunk", therefore "here", and with these examples, there is no good reason to have multiple accounts, only nefarious ones, and especially so with an anonymous user such as "Skoskunk" who admits to having more than one account here, meaning that you can, I and I expect he/she/it does, gang up on people, or bounce conversations of of himself to push an agenda. Remember when a computer parts representative was found to be doing that on a popular tech forum many years ago (SPCR I believe).! That guy was having conversations with himself, giving false positive reviews and so on. He was fired, but the harm he had caused to users was very real as they bought 3rd rate products that were expensive based upon this his actions, and the harm he caused to the company he worked for was massive, so there are real world examples of this happening in forums like this, and there is absolutely no good reason to have multiple account here on TPU.