Monday, August 5th 2024

NEO Semiconductor Announces 3D X-AI Chip as HBM Successor

NEO Semiconductor, a leading developer of innovative technologies for 3D NAND flash memory and 3D DRAM, announced today the development of its 3D X-AI chip technology, targeted to replace the current DRAM chips inside high bandwidth memory (HBM) to solve data bus bottlenecks by enabling AI processing in 3D DRAM. 3D X-AI can reduce the huge amount of data transferred between HBM and GPUs during AI workloads. NEO's innovation is set to revolutionize the performance, power consumption, and cost of AI Chips for AI applications like generative AI.

AI Chips with NEO's 3D X-AI technology can achieve:
  • 100X Performance Acceleration: contains 8,000 neuron circuits to perform AI processing in 3D memory.
  • 99% Power Reduction: minimizes the requirement of transferring data to the GPU for calculation, reducing power consumption and heat generation by the data bus.
  • 8X Memory Density: contains 300 memory layers, allowing HBM to store larger AI models.
"Current AI Chips waste significant amounts of performance and power due to architectural and technological inefficiencies," said Andy Hsu, Founder & CEO of NEO Semiconductor. "The current AI Chip architecture stores data in HBM and relies on a GPU to perform all calculations. This separated data storage and data processing architecture makes the data bus an unavoidable performance bottleneck. Transferring huge amounts of data through the data bus causes limited performance and very high power consumption. 3D X-AI can perform AI processing in each HBM chip. This can drastically reduce the data transferred between HBM and GPU to improve performance and reduce power consumption dramatically."
A single 3D X-AI die includes 300 layers of 3D DRAM cells with 128 GB capacity and one layer of neural circuit with 8,000 neurons. According to NEO's estimation, this can support up to 10 TB/s of AI processing throughput per die. Using twelve 3D X-AI dies stacked with HBM packaging can achieve 120 TB/s processing throughput, resulting in a 100X performance increase.
"The application of 3D X-AI technology can accelerate the development of emerging AI use cases and promote the creation of new ones," said Jay Kramer, President of Network Storage Advisors. "Harnessing 3D X-AI technology to create the next generation of optimized AI Chips will spark a new era of innovation for AI Apps."
Source: NEO Semiconductor
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6 Comments on NEO Semiconductor Announces 3D X-AI Chip as HBM Successor

#2
HOkay
99% power reduction. Uh huh. I believe them & need no further evidence.
Posted on Reply
#3
InVasMani
Wonder how long it will be before a company tries to acquire them. This seems quite promising.
Posted on Reply
#4
tfp
3D, AI, and X? Did they miss any buzz words/aberrations? I'm assuming "e" and "i" are no longer in vouge.
Posted on Reply
#5
Minus Infinity
HOkay99% power reduction. Uh huh. I believe them & need no further evidence.
In AI work loads. We already have seen announced other products like this that slash AI power usage compared to GPU/GPGPU that rely on a lot of memory swaps and matrix multiplications,
Posted on Reply
#6
LabRat 891
This looks like one of the 'neuro-emulative' memory technologies Intel was looking to compete with, using 3DXpoint memory.

If even remotely related, I wonder what IBM, etc. are working on/invested in?
Posted on Reply
Aug 7th, 2024 17:22 EDT change timezone

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