OPENEDGES Technology, Inc., the leading provider of memory subsystem intellectual property (IP), today announced the launch of the Universal Chiplet Interconnect Express (UCIe) Controller IP, named OUC. UCIe is an open industry standard for a die-to-die interconnect, and co-developed by industry giants including AMD, Arm, ASE Group, Google Cloud, Intel, Meta, Microsoft, Qualcomm, and Samsung. UCIe is becoming a new trend in the semiconductor industry due to its advantages, such as increased semiconductor circuit integration, reduced production costs, and higher yields. OPENEDGES is contributing to UCIe consortium as a contributing member.

The OUC, deriving its name from OPENEDGES UCIe Controller, is tailored for highly customizable, package-level integration, facilitating die-to-die interconnect and protocol connections. It creates an interoperable, multi-vendor ecosystem set to revolutionize chip integration methodologies across the industry.Leveraging OPENEDGES' extensive expertise in interconnect IP development, the OUC is a versatile and highly configurable die-to-die controller that complies with the UCIe 1.1 standard. It extends on-chip AXI interconnections to multi-die connections, delivering an advanced solution for multi-die connectivity across diverse applications. The controller utilizes flits (flow control units) optimized for reliability and latency, preventing overflow at the receiver buffer. Furthermore, the OUC ensures seamless communication by synchronizing AXI parameters with its link partner, accommodating different AXI configurations through padding and cropping as per the default operation rules defined in AXI.

Designed for seamless multi-die communication, the OUC effortlessly integrates with OPENEDGES' on-chip interconnect IP, OIC. This synergy between OIC and OUC simplifies the extension of on-chip interconnects to form multi-chiplet interconnects, utilizing OIC's ActiveQoS and efficient bandwidth transfer capabilities to meet the complex demands of today's semiconductor needs.

"Using our extensive experience with the development of interconnect IP, we were able to achieve development milestones more quickly," said Ethan Hyun-Gyu Kim, the team leader of Interconnect and UCIe Chiplet Controller IP. "It is our intention to continually optimize our products in accordance with the evolving chiplet standards, and to actively assist our clients in ensuring their chips are successfully mass-produced."

"As chip complexity increases with advanced integration, the demand for UCIe is steadily growing," said Sean Lee, CEO of OPENEDGES Technology. "OPENEDGES will continue to provide a competitive and diverse IP portfolio, following our offerings in the memory subsystem and NPU IP. We will not only adapt the industry trends but define them, providing our clients with the tools to build the technological landscapes of the future."

This accomplishment was supported by the Institute of Information & communications Technology Planning & Evaluation (IITP) grant funded by the Korean government (MSIT) (RS-2023-00222171, Development of Tbps/mm interface IP and Silicon Photonics Application Technology for AI and Automotive SoC Chiplet Interfaces).