IC Insights' November Update to the 2020 McClean Report, released later this month, includes a discussion of the forecasted top-25 semiconductor suppliers in 2020. This research bulletin covers the expected top-15 2020 semiconductor suppliers (Figure 1).

The November Update also includes a detailed five-year forecast through 2024 of the IC market by product type (including dollar volume, unit shipments, and average selling price) and a forecast of the major semiconductor industry capital spenders for 2020. A five-year outlook for total semiconductor industry capital spending is also provided.

Semiconductor foundries across the board are preparing to raise price quotes of their 8-inch wafers from 2021. A DigiTimes report sheds light on various foundry companies, including UMC (United Microelectronics), Global Foundries, and Vanguard International Semiconductor (VIS) have raised their 8-inch foundry quotes by 10-15% in Q4-2020, with the quotes set to rise by another 20-40% in 2021. Foundries don't tend to use flat pricing, and instead rely on quotes specific to the size and design requirements of an order (by a fabless chip designer).

The foundry industry operates broadly on silicon fabrication nodes and wafer sizes. This article by Telescope Magazine provides insights into the typical use-cases for each wafer size. Although pertaining strictly to pricing of 8-inch (200 mm) wafers, an impending price-rise across the semiconductor industry can be extrapolated on the basis on significant labor cost increases. TSMC is planning to implement a 20% pay hike for its personnel in 2021.

The Taiwan Economic Daily claims that TSMC has achieved a major internal breakthrough for the eventual rollout of 2 nm fabrication process technology. According to the publication, this breakthrough has turned TSMC even more optimistic towards a 2023 rollout of 2 nm risk production - which is all the more impressive considering reports that TSMC will be leaving the FinFet realm for a new multi-bridge channel field effect transistor (MBCFET) architecture - itself based on the Gate-All-Around (GAA) technology. This breakthrough comes one year after TSMC put together an internal team whose aim was to pave the way for 2 nm deployment.

MBCFET expands on the GAAFET architecture by taking the Nanowire field-effect transistor and expanding it so that it becomes a Nanosheet. The main idea is to make the field-effect transistor three-dimensional. This new complementary metal oxide semiconductor transistor can improve circuit control and reduce leakage current. This design philosophy is not exclusive to TSMC - Samsung has plans to deploy a variant of this design on their 3 nm process technology. And as has been the norm, further reductions in chip fabrication scale come at hefty costs - while the development cost for 5 nm has already achieved $476M in cost, Samsung reports that their 3 nm GAA technology will cost in excess of $500M - and 2 nm, naturally, will come in even costlier than that.

In the latest report by DigiTimes, it is said that TSMC has placed an order on 13 Extreme Ultra-Violet (EUV) machines from the Dutch company ASML. Thanks to the rapid increase in demand for its silicon, TSMC has developed plans for expansion across the next few years to satisfy the existing and upcoming customers. Usually, the company knows and can predict its demand for a future period. That is why TSMC is expanding its capacities with 13 additional ASML Twinscan NXE EUV scanners. These machines are set to be delivered by the course of 2021. It is unknown exactly when these machines are going to be delivered and installed at TSMC's facilities, however, it is fascinating that the demand for the company's capacities is ever-expanding. The price of single EUV machinery is as much as $175.75 million, so it is estimated that the expansion of capacity will cost TSMC a whopping $2.284,75 million. Despite the high pricing, the Return on Investment (ROI) is very high for TSMC.

TSMC plans to open a new 3.5 billion dollar foundry in Arizona with a new wholly-owned US subsidiary. The new foundry will begin construction in 2021 with an expected completion date of 2024. The new facility will target production volumes of 20,000 wafers per month with 5 nm production being the main priority. TSMC will be joining Intel who also produces chips in Arizona enabling them to tap into this well-established supply chain. TSMC plans to employ 1,600 staff at the facility which will be their most advanced facility outside of Taiwan. The new foundry will likely be popular with US customers and military applications requiring more secure facilities.

Apple has recently announced its transition to Apple Silicon, meaning that every processor inside its products will be custom designed by the company. However, that seems to be becoming a bit of a problem. The sole supplier of chips for Apple has been Taiwan Semiconductor Manufacturing Company (TSMC), which Apple collaborated with for the past few years. The sheer capacity of TSMC is enough to satisfy the demand from several companies and thus it allows some of them to book its capacity. With Apple demanding more and more capacity than ever before, it is becoming quite hard to keep up with it. That is why Apple is, according to some analysts for Business Korea, looking for a foundry beyond TSMC's to manufacture its chips.

According to the source, Apple is looking at the direction of Samsung Electronics and its silicon manufacturing facilities. Samsung has recently started the production of its 5 nm silicon manufacturing node. We have reported that the first SoCs are set to arrive soon. However, it may be possible that Apple's M1 lineup of SoCs will be a part of that first wave. Apple is reportedly going to tap both TSMC and Samsung to qualify enough supply for the huge demand of the products based on the latest 5 nm technology.

TSMC (TWSE: 2330, NYSE: TSM) today announced its net revenues for October 2020: On a consolidated basis, revenues for October 2020 were approximately NT$119.30 billion, a decrease of 6.5 percent from September 2020 and an increase of 12.5 percent from October 2019. Revenues for January through October 2020 totaled NT$1,097.02 billion, an increase of 27.7 percent compared to the same period in 2019.

Phison Electronics, the industry leader in flash controller technology, is delivering the storage industry's fastest PCIe Gen 4x4 NVMe SSD solution, its second generation PS5018-E18 (E18) PCIe 4.0 controller. The E18 succeeds the PS5016-E16 released in late 2019.

Phison designed the new E18 from the ground up on the efficient TSMC 12 nm process node. This provides SSD manufacturers with a state-of-the-art controller solution in an increasingly competitive field. The controller utilizes Phison's proprietary CoXProcessor 2.0 technology, an innovative SSD architecture that enables E18 to deliver exceptional performance and power efficiency. Phison architecture is also primed for AI-assisted storage, where its distributed architecture uses many small cores to perform the workload in parallel. The E18 is ideal for gamers, content creators, and computing enthusiasts, which demand the best experience. This ultra-low latency is possible only with NVMe SSDs.

Semiconductor manufacturing has been the latest victim of the recent trade war between China and the United States. With the US imposing sanctions on Chinese manufacturers, they have not been able to use any US technology without the approval of the US government. That has caused many companies to lose customers and switch their preferred foundry. The US government has also decided to sanction a Chinese company Huawei from accessing any US-technology-based manufacturing facilities, thus has prevented the Chinese company from manufacturing its chips in the facilities of TSMC. Left without almost any way to keep up with the latest semiconductor technology, Huawei is reportedly working on its own manufacturing facilities.

According to the Financial Times, Huawei is about to enter domestic silicon production with its partner company Shanghai IC R&D. And a big note here is that the manufacturing facility will not use any US technology. The production is allegedly going to start as soon as the end of this year, and the first process that will come out the door will be a rather outdated 45 nm node. The company is expecting to move on to a more advanced 28 nm node by the end of next year. While the capacities are unknown, we can assume that it will be enough for the company's purposes. With this move, Huawei will be 100% independent from any US influence and will own the complete vector of software and hardware, that is a custom made design by the company.Huawei R&D Center

Recently, the technology trade war between the US and China has been very challenging for Chinese semiconductor manufacturers. With a new regulation to prevent the use of US technology on foreign lands, the US administration has managed to prevent many companies from manufacturing the latest processes, and they have lost a part of their customer base. In awe of this craze, it seems like many silicon designers are storming to the competing foundries to get their designs taped out. According to the DigiTimes report, TSMC has seen a massive spike in demand for its 28 nm semiconductor node. The surge is going to reach a peak of almost 100% in the fourth quarter this year. The growth is mainly being driven by Chinese customers who are switching their manufacturing facilities. The report indicated that Qualcomm, as well, is a big part of the growth besides the remaining companies.

Apple has established itself as a master of silicon integrated circuit design and has proven over the years that its processors deliver the best results, generation after generation. If we take a look at the performance numbers of the latest A14 Bionic, you can conclude that its performance is now rivaling some of the x86_64 chips. So you would wonder, what is inside this SoC that makes it so fast? That is exactly what ICmasters, a semiconductor reverse engineering and IP services company, has questioned and decided to find out. For starters, we know that Apple manufactures the new SoCs on TSMC's N5 5 nm node. The Taiwanese company promises to pack 171.3 million transistors per square millimeter, so how does it compare to an actual product?

ICmasters have used electron microscopy to see what the chip is made out of and to measure the transistor density. According to this source, Apple has a chip with a die size of 88 mm², which packs 11.8 billion N5 transistors. The density metric, however, doesn't correspond to that of TSMC. Instead of 171.3 million transistors per mm², the ICmasters measured 134.09 million transistors per mm². This is quite a difference, however, it is worth noting that each design will have it different due to different logic and cache layout.

TSMC, the world's leading semiconductor manufacturing company, is rumored to start production of its 6th generation Chip-on-Wafer-on-Substrate (CoWoS) packaging technology. As the silicon scaling is getting ever so challenging, the manufacturers have to come up with a way to get as much performance as possible. That is where TSMC's CoWoS and other chiplet technologies come. They allow designers to integrate many integrated circuits on a single package, making for a cheaper overall product compared to if the product used one big die. So what is so special about 6th generation CoWoS technology from TSMC, you might wonder. The new generation is said to enable a massive 12 stacks of HBM memory on a package. You are reading that right. Imagine if each stack would be an HBM2E variant with 16 GB capacity that would be 192 GB of memory on the package present. Of course, that would be a very expensive chip to manufacture, however, it is just a showcase of what the technology could achieve.

Update 16:44 UTC—TheEnglish DigiTimes report indicates that this technology is expected to see mass production in 2023.

In its Q3 earnings, Intel disclosed that it is now shipping Intel's first discrete GPU - DG1. Codenamed Intel Iris Xe MAX, the GPU is set to arrive in ultraportable laptops and designs. It is based on Xe-LP design, which is Intel's GPU configuration for iGPUs and low-power models. However, to satisfy the needs of gamers, Intel will not be good with just this GPU configuration. The company would need something faster and ore power-hungry to power the highest framerates and highest resolutions. Enter the world of Xe-HPG DG2 GPU. Made for gamers, it features all the hardware-enabled features you would expect in such a GPU, like raytracing, etc. This GPU is manufactured outside Intel's fabs, most likely at TSMC's facilities. Right now, this GPU is in the alpha phase and is booting in Intel's labs, meaning that the final silicon is just a few months away.

IC Insights recently released its September Update to the 2020 McClean Report that presented the second of a two-part analysis on the global IC foundry industry and included a look at the pure-play foundry market by region.

China was responsible for essentially all of the total pure-play foundry market increase in 2018. In 2019, the U.S./China trade war slowed China's economic growth but its foundry marketshare still increased by two percentage points to 21%. Moreover, despite the Covid-19 shutdown of China's economy earlier this year, China's share of the pure-play foundry market is forecast to be 22% in 2020, 17 percentage points greater than it registered in 2010 (Figure 1).

A report straight from DigiTimes claims that NVIDIA is looking to upgrade their Ampere consumer GPUs from Samsung's 8 nm to TSMC's 7 nm. According to the source, the volume of this transition should be "very large", but most likely wouldn't reflect the entirety of Ampere's consumer-facing product stack. The report claims that TSMC has become more "friendly" to NVIDIA. This could be because TSMC now has available manufacturing capacity in 7 nm due to some of its clients moving to the company's 5 nm node, or simply because TSMC hadn't believed NVIDIA to consider Samsung as a viable foundry alternative - which it now does - and has thus lowered pricing.

There are various reasons being leveraged at this, none with substantial grounds other than "reported from industry sources". NVIDIA looking for better yields is one of the appointed reasons, as is its history as a TSMC customer. NVIDIA shouldn't have too high a cost porting its manufacturing to TSMC in terms of design changes to the silicon level so as to cater to different characteristics of TSMC's 7 nm, because the company's GA100 GPU (Ampere for the non-consumer market) is already manufactured at TSMC. The next part of this post is mere (relatively informed) speculation, so take that with a saltier disposition than what came before.

Apple announced plans to transition their Mac lineup to in-house ARM-based processors earlier this year. This decision came as a result of Apple's dependence on Intel for new processors each year and their recent underwhelming improvements. The upcoming 12 core chip is expected to be manufactured on TSMC's 5 nm node which should deliver significant power savings and performance. Apple has been working to optimize macOS and first party applications for the new processors along with sending out developer transition kits to hopefully ensure major software is supported at launch. The processor is rumored to debut in an upcoming 13-inch MacBook Pro or a new MacBook Air and should launch at a dedicated event in November according to a recent report by Bloomberg.

Update, October 7th 2020: AMD has confirmed it has ceased production for the RX 5700, but that RX 5700 XT manufacturing will be ongoing at least until 1Q2021. It's unclear what this means for the company's RDNA2 launch plans; it could be speculated the company will be releasing halo products first, with lower tiers being launched at a later time, in line with NVIDIA's usual launch cadence. This would justify the RX 5700 being kept in fabrication, since with a substantial price cut, it could become a mainstream AMD product).

A report originated from Cowcotland paints AMD as having ceased production on the Navi 10-powered RX 5700 XT and RX 5700. No reference or custom designs are currently being manufactured for either of these GPUs. AMD having ceased production on these cards makes sense, considering the upcoming announcement for the RX 6000 series scheduled for October 28th. This serves as a way for the supply channel to keep draining its supply of RX 5700 cards ahead of the upcoming RDNA 2 solutions. Them being discontinued means that AMD is looking to replace them - at least price-wise - on their product stack.

Interestingly, it appears that the RX 5600 XT is still being manufactured - it's likely AMD reduced manufacturing of Navi 10 so as to feed only this GPU, which should, as such, remain in the market for a little while until AMD launches an RDNA 2 equivalent - if those are the company's plans. TSMC capacity is freed for additional wafers for other AMD product requirements - which, with both Zen 3, next-gen consoles, and RDNA 2 all launching between the same time frame - should tend towards infinity.

AMD is preparing to launch the new iteration of desktop CPUs based on the latest Zen 3 core, codenamed Vermeer. On October 8th, AMD will hold the presentation and again deliver the latest technological advancements to its desktop platform. The latest generation of CPUs will be branded as a part of 5000 series, bypassing the 4000 series naming scheme which should follow, given that the prior generation was labeled as 3000 series of processors. Nonetheless, AMD is going to bring a new Zen 3 core with its processors, which should bring modest IPC gains. It will be manufactured on TSMC's 7 nm+ manufacturing node, which offers a further improvement to power efficiency and transistor density.

Today, we have gotten the first benchmark of AMD's upcoming Ryzen 7 5800X CPU. Thanks to the popular hardware leaker, TUP APISAK, we have the first benchmark of the new Vermeer processor, compared to Intel's latest and greatest - Core i9-10900K. The AMD processor is an eight-core, sixteen threaded model compared to the 10C/20T Intel processor. While we do not know the final clocks of the AMD CPU, we could assume that the engineering sample was used and we could see an even higher performance. Below you can see the performance of the CPU and how it compares to Intel. By the numbers shown, we can expect AMD to possibly be a new gaming king, as the numbers are very close to Intel. The average batch result for the Ryzen 7 5800X was 59.3 FPS and when it comes to CPU frames it managed to score 133.6 FPS. Intel's best managed to average 60.3 FPS and 114.8 FPS from the CPU framerates. Both systems were tested with NVIDIA's GeForce RTX 2080 GPUs.

TSMC has had quite a good time recently. They are having all of their capacity fully booked and the development of new semiconductor nodes is going good. Today, thanks to the report of DigiTimes, we have found out that TSMC is ramping up the production lines to prepare for 3 nm high-volume manufacturing. The 3 nm node is expected to enter HVM in 2022, which is not that far away. In the beginning, the new node is going to be manufactured on 55.000 wafers of 300 mm size, and it is expected to reach as much as 100.000 wafers per month output by 2023. With the accelerated purchase of EUV machines, TSMC already has all of the equipment required for the manufacturing of the latest node. We are waiting to see more details on the 3 nm node as we approach its official release.

TSMC, the leading semiconductor foundry in the world, has reportedly begun construction of its 2 nm manufacturing facility. According to a DigiTimes report, translated by @chiakokhua on Twitter, besides the construction of 2 nm R&D center, TSMC has also started the construction of the manufacturing facility for that node, so it will be ready in time. Please do note that the node name doesn't represent the size of the transistor, so it will not actually be 2 nm wide. The new facilities will be located near TSMC's headquarters in Hsinchu Science Park, Taiwan. The report also confirms the first details about the node, specifically that it will use Gate-All-Around (GAA) technology. And there is also another interesting piece of information regarding even smaller node, the planning for 1 nm node has begun according to the source.

Besides advanced nodes, TSMC also laid out clear plans to accelerate the push of advanced packaging technology. That includes SoIC, InFO, CoWoS, and WoW. All of these technologies are classified as "3D Fabric" by the company, even though some are 2.5D. These technologies will be mass-produced at "ZhuNan" and "NanKe" facilities starting in the second half of 2021, and are expected to significantly contribute to the company's profits. It is also reported that the competing foundry, Samsung, has a 3D packaging technology of its own called X-cube, however, it is attracting customers a lot slower than TSMC due to the high costs of the new technology.

Currently, Intel's best silicon manufacturing process available to desktop users is their 14 nm node, specifically the 14 nm+++ variant, which features several enhancements so it can achieve a higher frequencies and allow for faster gate switching. Compare that to AMD's best, a Ryzen 3000 series processor based on Zen 2 architecture, which is built on TSMC's 7 nm node, and you would think AMD is in clear advantage there. Well, it only sort of is. German hardware overclocker and hacker, der8auer, has decided to see how one production level silicon compares to another, and he put it to the test. He decided to use Intel's Core i9-10900K processor and compare it to AMD's Ryzen 9 3950X under a scanning electron microscope (SEM).

First, der8auer took both chips and detached them from their packages; then he proceeded to grind them as much as possible so SEM could do its job of imaging the chips sans the substrate and protective barrier. This was followed by securing the chips to a sample holder using an electrically conductive adhesive to improve penetration of the high energy electrons from the SEM electron gun. To get as fair a comparison as possible, he used the L2 cache component of both processors as they are usually the best representatives of a node. This happens because the logic portion of the chip differs according to architecture; hence, level two cache is used to get a fair comparison - it's design is much more standardized.

TSMC has hit a jackpot with its newer nodes like 7 nm and now 5 nm, as the company is working with quite good yields. To boast, TSMC has seen all of its capacity of 7 nm being fully booked by customers like AMD, Apple, and NVIDIA. However, it seems like the company's next-generation 5 nm node is also getting high demand. According to the latest report from DigiTimes, TSMC's N5 5 nm node is fully booked to the end of 2020. And the biggest reason for that is the biggest company in the world - Apple. Since Apple plans to launch the next-generation iPhone, iPad, and Arm-based MacBook, the company has reportedly booked most of the 5 nm capacity for 2020, meaning that there are lots of chips that Apple will consume. TSMC can't be dependent only on one company like Apple, so the smaller portion of capacity went to other customers as well.

TSMC, one of the biggest silicon manufacturers in the world, usually doesn't disclose company pricing of the silicon it manufactures and only shares that with its customers. It appears that RetiredEngineer (@chiakokhua on Twitter) got a hold of the pricing of TSMCs wafers on every manufacturing node starting from 90 nm down to 5 nm. That includes a wide portfolio of 65, 40, 28, 20, 16/12, 10, and 7 nm nodes as well. The table shown below includes information dating to April 2020, so it is possible that some things are now different and they surely are. There are a few quite interesting notes from the image, namely the price increase as the node shrinks.

From 90 nm to 20 nm, the price of the wafer didn't increase as much, however, starting from 16/12 nm node(s), TSMC has seen costs per wafer, and other costs increase exponentially. For example, just compare the 10 nm wafer price of $5992 with the price of a 5 nm wafer which costs an amazing $16988. This is more than a 180% price increase in just three years, however, the cost per transistor is down as you get around 229% higher density in that period, making TSMC actually in line with Moore's Law. That is comparing Transistor density (MTr / mm²) of52.51 million transistors for the 10 nm node and 173 million transistors per mm² of the 5 nm node .

Today we have found out that Sony has reportedly cut PlayStation 5 launch supply due to bad yields of the SoC powering the console. Previously, we reported that Sony has doubled production of the new console amid high demand, where the company expected to sell 10 million units in the fiscal year. The original plan was to have around 15 million units of the new console available by March 31st, 2021. Sony has been spending a lot of resources to get as many units out to consumers, however, the bad SoC yields have held the company back significantly.

It is reported by Bloomberg that instead of the original 15 million units Sony plans to supply, there will be only 11 million of them. That represents a massive reduction of 4 million units. And you are wondering how bad the yields of the new SoC are to have that big reduction. According to the source, TSMC and Sony are seeing only 50% yields on the production run. It is reported that the yields are gradually improving but have not yet reached the level needed to have a stable supply. This represents a big problem for the company and we don't know who is to blame. TSMC has been very good at manufacturing 7 nm silicon, however, it could be bad design from AMD and Sony that is making the production difficult. We are waiting for more information.

Rambus Inc. (NASDAQ: RMBS), a premier silicon IP and chip provider making data faster and safer, today announced it has achieved a record 4 Gbps performance with the Rambus HBM2E memory interface solution consisting of a fully-integrated PHY and controller. Paired with the industry's fastest HBM2E DRAM from SK hynix operating at 3.6 Gbps, the solution can deliver 460 GB/s of bandwidth from a single HBM2E device. This performance meets the terabyte-scale bandwidth needs of accelerators targeting the most demanding AI/ML training and high-performance computing (HPC) applications.

"With this achievement by Rambus, designers of AI and HPC systems can now implement systems using the world's fastest HBM2E DRAM running at 3.6 Gbps from SK hynix," said Uksong Kang, vice president of product planning at SK hynix. "In July, we announced full-scale mass-production of HBM2E for state-of-the-art computing applications demanding the highest bandwidth available."