NVIDIA has recently announced the company's first standalone Grace CPU that will come out as a product in 2023. NVIDIA has designed Grace on Arm ISA, likely ARM v9, to represent a new way that data centers are built and deliver a whole new level of HPC and AI performance. However, the CPU competition in a data center space is considered one of the hardest markets to enter. Usually, the market is a duopoly between Intel and AMD, which supply x86 processors to server vendors. In the past few years, there have been few Arm CPUs that managed to enter the data canter space, however, NVIDIA is aiming to deliver much more performance and grab a bigger piece of the market.

As a self-proclaimed leader in AI, Intel is facing hard competition from NVIDIA in the coming years. In an interview with Fortune, Intel's new CEO Pat Gelsinger has talked about NVIDIA and how the company sees the competition between the two. Mr. Gelsinger is claiming that Intel is a leader in CPUs that feature AI acceleration built in the chip and that they are not playing defense, but rather offense against NVIDIA. You can check out the whole quote from the interview below.

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NVIDIA today announced its first data center CPU, an Arm-based processor that will deliver 10x the performance of today's fastest servers on the most complex AI and high performance computing workloads.

The result of more than 10,000 engineering years of work, the NVIDIA Grace CPU is designed to address the computing requirements for the world's most advanced applications—including natural language processing, recommender systems and AI supercomputing—that analyze enormous datasets requiring both ultra-fast compute performance and massive memory. It combines energy-efficient Arm CPU cores with an innovative low-power memory subsystem to deliver high performance with great efficiency.

Intel has just launched its Ice Lake-SP lineup of Xeon Scalable processors, featuring the new Sunny Cove CPU core design. Built on the 10 nm node, these processors represent Intel's first 10 nm shipping product designed for enterprise. However, there is another 10 nm product going to be released for enterprise users. Intel is already preparing the Sapphire Rapids generation of Xeon processors and today we get to see more details about it. Thanks to the anonymous tip that VideoCardz received, we have a bit more details like core count, memory configurations, and connectivity options. And Sapphire Rapids is shaping up to be a very competitive platform. Do note that the slide is a bit older, however, it contains useful information.

The lineup will top at 56 cores with 112 threads, where this processor will carry a TDP of 350 Watts, notably higher than its predecessors. Perhaps one of the most interesting notes from the slide is the department of memory. The new platform will make a debut of DDR5 standard and bring higher capacities with higher speeds. Along with the new protocol, the chiplet design of Sapphire Rapids will bring HBM2E memory to CPUs, with up to 64 GBs of it per socket/processor. The PCIe 5.0 standard will also be present with 80 lanes, accompanying four Intel UPI 2.0 links. Intel is also supposed to extend the x86_64 configuration here with AMX/TMUL extensions for better INT8 and BFloat16 processing.

Intel Core i9-11900K processor, the flagship model from the 11th generation "Rocket Lake" CPU lineup, has been overclocked to more than 7 GHz by the "Rog-Fisher". Thanks to the report coming from VideoCardz, we have information that the top-end Rocket Lake processor is possibly a very good overclocker. Running at 7048 MHz, the CPU managed to achieve that frequency using "only" 1.873 V. There is no doubt that the system was being cooled by LN2, as such overclocks need it to remain stable, however, we don't have any data on that. The CPU was paired with the ASUS ROG Maximus XIII Apex motherboard, designed for extreme overclocking purposes.

It is important to note that the CPU didn't run any benchmarks, as it was just validated at that frequency by Valid x86. The sample was likely supplied by Intel, so it could be a cherry-picked model. For the official benchmark results of Rocket Lake processors, we have to wait until tomorrow (March 30th), when NDA lifts.

AMD's CPU offerings are generally considered to best Intel's competition, especially since the company's Zen 3, Ryzen-5000 series of CPUs launched to great critical and customer acclaim. However, silicon performance can only get you so far - one other issue impacting market penetration is availability of said processors. As AMD fights for constrained wafer supply from TSMC - in no small part due to their focusing of their entire portfolio on the company's highly-sought 7 nm process - users worldwide are generally seeing insufficient stocks of AMD silicon to satisfy their needs. And as such, it seems that at least some users are going with Intel solutions, due to their higher availability in the market.

According to a report from Mercury Research, AMD's constrained chip supply has led the company to a market share loss QoQ. AMD's desktop penetration fell from 20.1% to 19.3% in a single quarter, and its mobile market share saw a similar decrease, going from a 20.1% share down to 19.1%. Of course, not only from market share and shipments are a company's financials made of; AMD ushered in higher ASP (Average Selling Price) for its products, leading the company to a 50% increase in YoY revenue. This doesn't mean AMD is selling less CPUs, however; the x86 CPU market grew a massive 20.1% YoY, so AMD is actually shipping more product than in previous years - it just couldn't account for the entirety of that x86 market increase. Overall, and considering AMD's desktop, mobile, and server markets, the company's x86 market share decreased by 0.7% in Q4 2020 to 21.7% - still a very significant increase, YoY, from its previous 15.5% of the market pie.

The original "Nehalem" CPU microarchitecture from 2008 was pivotal to Intel, as it laid the foundation for Intel's mainline server and client x86 processors for the following 12-odd years. Glenn Hinton, the lead architect behind "Nehalem," announced that he is rejoining Intel after 3 years of retirement, to work on a new high-performance CPU project. Hinton states that his decision to rejoin Intel out of his retirement was influenced by Pat Gelsinger joining the company as its new CEO. Jim Keller, a CPU architecture lead behind several commercially-successful architectures, recently left Intel after a brief stint leading an undisclosed CPU core project. Keller later took up the mantle of CEO at hardware start-up Tenstorrent.

Pat Gelsinger leading Intel is expected to have a big impact on its return to technological leadership in its core businesses, as highlighted in Gelsinger's recent comments on the need for Intel to be better than Apple (which he referred to as "that lifestyle company") at making CPUs, in reference to Apple's new M1 chip taking the ultraportable notebook industry by storm. The other front Intel faces stiff competition from, is AMD, which has achieved IPC parity with Intel, and is beating it on energy-efficiency, taking advantage of the 7 nm silicon fabrication process.

Intel's future CEO Pat Gelsinger, who supersedes current CEO Bob Swan come February 15th, has reportedly compared Intel with Apple's efforts, in wake of that company's decision to leave the Intel ecosystem in favor of in-house designed ARM CPUs. As Apple M1-powered devices hit reviewers' tables, the opinions mostly went one-sided in favor of Apple's decision, clamoring for that particular CPU design to be only lightly short of a computing miracle, considering the amount of computing power provided at that chip's TDP, and running circles around Apple's previous Intel implementations.

According to The Oregonian, a local newspaper from (you guessed it) Oregon where Intel has a strong branch presence, Intel held an all-hands meeting of its Oregon workforce, attended by future Intel CEO Pat Gelsinger, who is quoted as having remarked that "We [Intel] have to deliver better products to the PC ecosystem than any possible thing that a lifestyle company in Cupertino makes. We have to be that good, in the future." Considering how Apple's M1 has raised the world's attention to the ARM architecture as a competitor with strong enough arguments to face the x86 ecosystem (as if ARM powering the world's current fastest supercomputer wasn't a strong enough argument), that seems like a strong yet adequate statement. We'll see how Intel fares with its Alder lake CPUs, which essentially bring ARM's design philosophy of an heterogeneous CPU with both high-performance and high-efficiency cores to the x86 table.

AMD is always in development mode and just when they launch a new product, the company is always gearing up for the next-generation of devices. Just a few months ago, back in November, AMD has launched its Zen 3 core, and today we get to hear about the next steps that the company is taking to stay competitive and grow its product portfolio. In the AnandTech interview with Dr. Lisa Su, and The Street interview with Rick Bergman, the EVP of AMD's Computing and Graphics Business Group, we have gathered information about AMD's plans for Zen 4 core development and RDNA 3 performance target.

Starting with Zen 4, AMD plans to migrate to the AM5 platform, bringing the new DDR5 and USB 4.0 protocols. The current aim of Zen 4 is to be extremely competitive among competing products and to bring many IPC improvements. Just like Zen 3 used many small advances in cache structures, branch prediction, and pipelines, Zen 4 is aiming to achieve a similar thing with its debut. The state of x86 architecture offers little room for improvement, however, when the advancement is done in many places it adds up quite well, as we could see with 19% IPC improvement of Zen 3 over the previous generation Zen 2 core. As the new core will use TSMC's advanced 5 nm process, there is a possibility to have even more cores found inside CCX/CCD complexes. We are expecting to see Zen 4 sometime close to the end of 2021.

Tachyum Inc. today announced that it is signing early adopter customers for the software emulation system for its Prodigy Universal Processor, customers may begin the process of native software development (i.e. using Prodigy Instruction Set Architecture) and porting applications to run on Prodigy. Prodigy software emulation systems will be available at the end of January 2021.

Customers and partners can use Prodigy's software emulation for evaluation, development and debug, and with it, they can begin to transition existing applications that demand high performance and low power to run optimally on Prodigy processors. Pre-built systems include a Prodigy emulator, native Linux, toolchains, compilers, user mode applications, x86, ARM and RISC-V emulators. Software updates will be issued as needed.

Designing a custom processor can be a rewarding thing. You can control your ecosystem surrounding it and get massive rewards in terms of application-specific performance uplift, or lower total cost of ownership. It seems like cloud providers have figured out that at their scale, designing a custom processor can get all of the above with the right amount of effort put into it. If you remember, in 2018, Amazon has announced its Graviton processor based on Arm instruction set architecture. Today, the company has almost 10% of its AWS instances based on the Graviton 1 or 2 processors, which is a massive win for a custom design.

Following Amazon's example, the next company to join the custom server processor race is going to be Microsoft. The Redmond based giant is looking to build a custom lineup of processors that are meant to satisfy Microsoft's most demanding sector - server space. The company's Azure arm is an important part where it has big and increasing revenue. By building a custom processor, it could satisfy the market needs better while delivering higher value. The sources of Bloomberg say that Microsoft is planning to use Arm ISA, and start building independence from the x86 vendors like Intel and AMD. Just like we saw with AWS, the industry cloud giants are starting to get silicon-independent and with their scale, they can drive the ecosystem surrounding the new processors forward rapidly. The sources are also speculating that the company is building custom processors for Surface PCs, and with Windows-on-Arm (WoA) project, Microsoft has laid the groundwork in that field as well.

According to the International Data Corporation (IDC) Worldwide Quarterly Server Tracker, vendor revenue in the worldwide server market grew 2.2% year over year to $22.6 billion during the third quarter of 2020 (3Q20). Worldwide server shipments declined 0.2% year over year to nearly 3.1 million units in 3Q20. Volume server revenue was up 5.8% to $19.0 billion, while midrange server revenue declined 13.9% to $2.6 billion, and high-end servers declined by 12.6% to $937 million.

"Global demand for enterprise servers was a bit muted during the third quarter of 2020 although we did see areas of strong demand," said Paul Maguranis, senior research analyst, Infrastructure Platforms and Technologies at IDC. "From a regional perspective, server revenue within China grew 14.2% year over year. And worldwide revenues for servers running AMD CPUs were up 112.4% year over year while ARM-based servers grew revenues 430.5% year over year, albeit on a very small base of revenue."

Apple's M1 SoC is possibly the year's biggest semiconductor success story, as the chip has helped Apple begin its transition away from Intel's x86 machine architecture, and create its own silicon that's optimized for its software and devices; much like its A-series SoCs powering iOS devices. The company now plans to scale up this silicon with a new 32-core version designed for high-performance Mac devices, such as the fastest MacBook Pro models; and possibly even iMac Pros and Mac Pros. The new silicon could debut in a new-generation Mac Pro in 2022. Bloomberg reports that the new silicon will allow this workstation to be half the size of the current-gen Mac Pro workstation in form, while letting Apple keep its generational performance growth trajectory.

In addition, Apple is reportedly developing a 16-core "big" + 4 "small" core version of the M1, which could power more middle-of-the-market Macs, such as the iMac desktop, and the bulk of the MacBook Pro lineup. The 16B+4s core chip could debut as early as Spring 2021. Elsewhere, the company is reportedly stepping up efforts to develop its own high-end professional-visualization GPU that it can use in its iMac Pro and Mac Pro workstations, replacing the AMD Radeon Pro solutions found in the current generation. This graphics architecture will be built from the ground-up for the Metal 3D graphics API, as well as a parallel compute accelerator. Perhaps the 2022 debut of the Arm-powered Mac Pro could feature this GPU.

Maxon ported the its latest Cinebench R23 benchmark to the macOS "Big Sur" Apple M1 platform, and the performance results are groundbreaking. An Apple M1-powered MacBook Pro allegedly scored 1498 points in the single-core Cinebench R23 test, beating the 1382 points of the Core i7-1165G7 reference score as tested by Maxon. These scores were posted to Twitter by an M1 MacBook Pro owner who goes by "@mnloona48_" The M1 chip was clocked at 3.10 GHz for the test. The i7-1165G7 uses Intel's latest "Willow Cove" CPU cores. In the same test, the M1 scores 7508 points in the multi-core test. If these numbers hold up, we can begin to see why Apple chose to dump Intel's x86 machine architecture in favor of its own Arm-powered custom silicon, as the performance on offer holds up against the highest IPC mobile processors in the market.

AMD today announced the new AMD Instinct MI100 accelerator - the world's fastest HPC GPU and the first x86 server GPU to surpass the 10 teraflops (FP64) performance barrier. Supported by new accelerated compute platforms from Dell, Gigabyte, HPE, and Supermicro, the MI100, combined with AMD EPYC CPUs and the ROCm 4.0 open software platform, is designed to propel new discoveries ahead of the exascale era.

Built on the new AMD CDNA architecture, the AMD Instinct MI100 GPU enables a new class of accelerated systems for HPC and AI when paired with 2nd Gen AMD EPYC processors. The MI100 offers up to 11.5 TFLOPS of peak FP64 performance for HPC and up to 46.1 TFLOPS peak FP32 Matrix performance for AI and machine learning workloads. With new AMD Matrix Core technology, the MI100 also delivers a nearly 7x boost in FP16 theoretical peak floating point performance for AI training workloads compared to AMD's prior generation accelerators.

Apple late Monday sent out a public invite to an online launch event dated November 10, without revealing what it is. With new generation iPhones and Watches and iPads already announced it's likely that the November 10 event could deal with Macs, specifically, the company's very first MacBooks powered by a non-Intel processor since the company embraced x86 some decade-and-a-half ago.

Apple, having gained in-house expertise in designing powerful Arm-based SoCs, is likely to debut a new Arm-based processor with sufficient muscle to drive MacBooks, in what will be a "client-first" strategy of replacing x86 with Arm for Apple. This will likely see the most client-segment products, such as MacBooks and Mac Mini, get the processor, followed by MacBook Pros, iMacs, and lastly workstation-segment products such as the Mac Pro and iMac Pro. The November 10 event will likely only cover the very first Arm-powered MacBooks. Apple has been selling Arm-powered Mac Minis to ISVs along with a special version of macOS "Big Sur," so they could port their Mac software to the new platform. Arm-powered Macs could also see some form of unification between the iOS and macOS software ecosystems.

Thai PC enthusiast TUM_APISAK discovered a Geekbench 5 database listing for an upcoming AMD Ryzen 9 5950X "Zen 3" processor, obtained on MacOS. Don't worry, Apple isn't making an AMD-powered iMac Pro as its x86 swansong, because the listing points to a Hackintosh setup using Acidanthera boot-loader. The 5950X engineering sample scores 17448 points multi-threaded, and 2024 points single-core. Here's the best part—the processor appears to be overclocked to 6 GHz, as pointed out in the gb5 files of the benchmark listings, which show the processor's frequency swing between 5931 MHz and 6023 MHz during the test. harukaze5719 compiled a nice bar-graph that compares the 6 GHz overclocked 5950X "Zen 3" to 5.88 GHz overclocked 3950X "Zen 2," and other processors in its class, such as the Core i9-10900K. Find the Geebench listing here.

Microsoft has announced that they will be pushing x64 app support on their Windows 10 on Arm operating system. This is part of a move by Microsoft to mainstream adoption of their OS (and related services) on Arm-based platforms, ensuring that the company has a foothold in that market - especially as competition between Arm and x86-x64 architectures increases further and reaches more and more areas. Whereas before, Arm was relegated to low-power, relatively low performance designs, recent years have seen Arm's design performance (and philosophy) looking for higher performance use-cases both in the consumer and server/supercomputing spaces. One needs not look further than NVIDIA's plans to acquire Arm to see how much stock is being placed in Arm's future,

The x64 application support for Windows 10 on Arm will first be enabled for Windows Insiders come November, and will support all Windows 10 on Arm system released in the last couple of years, no matter the processor. This support works through emulation, though, so it remains to be seen exactly how well - and at what performance - these applications run. Microsoft has already improved tools and SDKs for application porting efforts to its Windows 10 on Arm ecosystem, and the company will be releasing custom-tailored versions of the Edge Browser, Microsoft Teams, and Visual Studio that play on the platform's strengths. Interesting times lie ahead of us - and if NVIDIA is able to go through with its Arm acquisition (which is a long way from being a guarantee), we might be looking at NVIDIA-branded laptops that run Windows 10 on Arm alongside branded Arm CPUs and NVIDIA GPUs.

In big corporate mergers and acquisitions involving multi-national corporations, money is the easy part, with the hard part being competition regulators of major markets giving their assent. The NVIDIA-Arm deal could get entangled in the US-China tech trade-war, with Beijing likely to use its approval of the deal as a bargaining chip against the US. Former Lenovo chief engineer Ni Guangnan predicts that the Chinese government's position would be to try and fight the deal on anti-trust grounds, as it could create a monopoly of chip-design tools. China's main concern, however, would be Arm IP falling into the hands of a US corporation, the California-based NVIDIA, which would put the IP under US export-control regulations.

Both Arm and NVIDIA announced an agreement for the latter to acquire Arm from SoftBank in a deal valued at USD $40 billion. NVIDIA CEO has been quoted as calling it the "deal of the century," as it would put NVIDIA in control of the biggest CPU machine architecture standard after Intel's x86, letting it scale the IP from low-power edge SoCs, to large data-center processors. Chinese regulators could cite recent examples of US export controls harming the Chinese tech industry, such as technology bans over Huawei and SMIC, in its action against the NVIDIA-Arm deal. Arm's 200-odd Chinese licensees have shipped over 19 billion chips based on the architecture as of mid-September 2020.

In the era of Artificial Intelligence of Things (AIoT), Industrial PC (IPC) is expected more than just a computer for general data processing. Faced with the increasing workload at the edge, end devices are required to be smart, automated and interconnected, which reflects on the demands of AI computing and M2M (Machine-to-Machine) communication in small-sized PCs.

The demand for AI computing emerged on the account of the decentralization trends in recent years to reduce cloud computing workloads and costs, and to reinforce AI performance at the edge, high-end embedded solutions is a must. But to downsize them and meanwhile support the conditions required by edge environments, like tight spaces and abrupt temperature changes, it's definitely a challenge for IPC manufactures.

Intel is giving finishing touches to six new Pentium Silver and Celeron "Jasper Lake" entry-level processors. Built on the 10 nm silicon fabrication process, these processors leverage the "Tremont" CPU cores, or the "small" x86-64 cores Intel is deploying on its "Lakefield" Core Hybrid processors. The chips also feature a low-power trim of the company's Gen11 iGPU (same graphics architecture found in "Ice Lake-U" and "Lakefield" processors). The desktop SKUs consist of three parts with TDP rated at 10 W, while the three other mobile SKUs offer 6 W TDP.

The desktop lineup is led by the Pentium Silver J6005, a 4-core/4-thread part with 2.00 GHz clock speeds, up to 3.00 GHz "maximum quad-core burst speed," and 4 MB L2 cache. The Celeron J5105 is next in line, with 2.00 GHz clocks, 2.80 GHz burst speeds, a slightly slower iGPU, and 4 MB L2 cache. At the bottom end of the desktop lineup is the Celeron J4505, a 2-core/2-thread part clocked at 2.00 GHz with 2.90 GHz burst, and 4 MB L2 cache. The mobile lineup is led by the Pentium Silver N6000, a 4-core/4-thread part with 1.10 GHz clocks, 3.10 GHz burst speeds, and 4 MB L2 cache. The Celeron N5100 is right behind, clocked at 1.10 GHz and 2.80 GHz clocks. At the bottom of the stack is the Celeron N4500, a 2-core/2-thread part with 1.10 GHz base and 2.80 GHz burst.An Intel video presentation on the "Tremont" CPU core architecture follows.

Intel is monetizing its "small" x86 cores across its product lineup, and not just in entry-level client processors. These cores will be part of Intel's current- and upcoming Hybrid processors, and have been serving Intel's re-branded Atom line of high core-count low-power server processors targeting micro-servers, NAS, network infrastructure hardware, and cellular base-stations. A company slide scored by AdoredTV unveils Intel's Atom "Grand Ridge" 24-core processor. A successor to the 24-core Atom P5962B "Snow Ridge" processor built on 10 nm and featuring "Tremont" CPU cores, "Grand Ridge" sees the introduction of the increased IPC "Gracemont" CPU cores to this segment. These cores make their debut in 2021 under the "Alder Lake" microarchitecture as "small" cores.

The "Grand Ridge" silicon is slated to be built on Intel's 7 nm HLL+ silicon fabrication node, and features 24 "Gracemont" cores across six clusters with four cores, each. Each cluster shares a 4 MB L2 cache among the four cores, while a shared L3 cache of unknown size cushions transfers between the six clusters. Intel is deploying its SCF (scalable coherent fabric) interconnect between the various components of the "Grand Ridge" SoC. Besides the six "Gracemont" clusters, the "Grand Ridge" silicon features a 2-channel DDR5 integrated memory controller, and a PCI-Express gen 4.0 root complex that puts out 16 lanes. It also features fixed function hardware that accelerates network stack processing. There are various USB and GPIO connectivity options relevant to 5G base-station setups. Given Intel's announcement of a delay in rolling out its 7 nm node, "Grand Ridge" can only be expected in 2022, if not later.

Tachyum Inc. announced that its Prodigy Universal Processor has successfully completed software emulation testing across x86, ARM and RISC-V binary environments. This important milestone demonstrates that Prodigy will enable customers to run their legacy applications transparently at launch with better performance than any contemporary or future ARM or RISC-V processors. Coupled with hyperscale data center workhorse programs such as Hadoop, Apache and more, which Tachyum is recompiling to Prodigy native code, this capability will ensure that Prodigy customers can run a broad spectrum of applications, right out of the box. Tachyum customers consistently indicate that they would run 100% native applications within 9-18 months of transitioning to the Tachyum platform to exceed performance of the fastest Xeon processor. The emulation is to smoothly transition to native software for Tachyum Prodigy.

It was reported last week that NVIDIA is "interested" in acquiring UK chip-design firm Arm from Japan's SoftBank that holds a treasure chest of tech IP. Now Bloomberg reports that things are getting serious between NVIDIA and SoftBank, with the two reportedly engaged in "advanced talks" over the possible acquisition of Arm by NVIDIA. The graphics and scalar compute giant recently surpassed Intel in market capitalization.

With a few quick moves, NVIDIA stands a real chance of displacing Intel as makers of the world's most popular CPU machine architecture, driven mainly by smartphones, tablets, networking infrastructure, wearables, and IoT devices. The Arm architecture is also taking strides into the server space, and Apple recently decided to dump Intel x86 in favor of Arm-powered homebrew SoCs. Arm could cost NVIDIA an arm and a leg. New Street Research LLP estimated Arm's valuation at USD $44 billion if its IPO took off in 2021, and as much as $68 billion by 2025.

"I hope AVX512 dies a painful death, and that Intel starts fixing real problems instead of trying to create magic instructions to then create benchmarks that they can look good on." These were the words of Linux and Git creator Linus Torvalds in a mailing list, expressing his displeasure over "Alder Lake" lacking AVX-512. Torvalds also cautioned against placing too much weightage on floating-point performance benchmarks, particularly those that take advantage of exotic new instruction sets that have a fragmented and varied implementation across product lines.

"I've said this before, and I'll say it again: in the heyday of x86, when Intel was laughing all the way to the bank and killing all their competition, absolutely everybody else did better than Intel on FP loads. Intel's FP performance sucked (relatively speaking), and it matter not one iota. Because absolutely nobody cares outside of benchmarks." Torvalds believes AVX2 is "more than enough" thanks to its proliferation, but advocated that processor manufacturers design better FPUs for their core designs so they don't have to rely on instruction set-level optimization to eke out performance.