Friday, January 11th 2019

AMD Radeon VII Detailed Some More: Die-size, Secret-sauce, Ray-tracing, and More

AMD pulled off a surprise at its CES 2019 keynote address, with the announcement of the Radeon VII client-segment graphics card targeted at gamers. We went hands-on with the card earlier this week. The company revealed a few more technical details of the card in its press-deck for the card. To begin with, the company talks about the immediate dividends of switching from 14 nm to 7 nm, with a reduction in die-size from 495 mm² on the "Vega 10" silicon to 331 mm² on the new "Vega 20" silicon. The company has reworked the die to feature a 4096-bit wide HBM2 memory interface, the "Vega 20" MCM now features four 32 Gbit HBM2 memory stacks, which make up the card's 16 GB of memory. The memory clock has been dialed up to 1000 MHz from 945 MHz on the RX Vega 64, which when coupled with the doubled bus-width, works out to a phenomenal 1 TB/s memory bandwidth.

We know from AMD's late-2018 announcement of the Radeon Instinct MI60 machine-learning accelerator based on the same silicon that "Vega 20" features a total of 64 NGCUs (next-generation compute units). To carve out the Radeon VII, AMD disabled 4 of these, resulting in an NGCU count of 60, which is halfway between the RX Vega 56 and RX Vega 64, resulting in a stream-processor count of 3,840. The reduced NGCU count could help AMD harvest the TSMC-built 7 nm GPU die better. AMD is attempting to make up the vast 44 percent performance gap between the RX Vega 64 and the GeForce RTX 2080 with a combination of factors.
First, AMD appears to be maximizing the clock-speed headroom achieved from the switch to 7 nm. The Radeon VII can boost its engine clock all the way up to 1800 MHz, which may not seem significantly higher than the on-paper 1545 MHz boost frequency of the RX Vega 64, but the Radeon VII probably sustains its boost frequencies better. Second, the slide showing the competitive performance of Radeon VII against the RTX 2080 pins its highest performance gains over the NVIDIA rival in the "Vulkan" title "Strange Brigade," which is known to heavily leverage asynchronous-compute. AMD continues to have a technological upper-hand over NVIDIA in this area. AMD mentions "enhanced" asynchronous-compute for the Radeon VII, which means the company may have improved the ACEs (async-compute engines) on the "Vega 20" silicon, specialized hardware that schedule async-compute workloads among the NGCUs. With its given specs, the Radeon VII has a maximum FP32 throughput of 13.8 TFLOP/s

The third and most obvious area of improvement is memory. The "Vega 20" silicon is lavishly endowed with 16 GB of "high-bandwidth cache" memory, which thanks to the doubling in bus-width and increased memory clocks, results in 1 TB/s of memory bandwidth. Such high physical bandwidth could, in theory, allow AMD's designers to get rid of memory compression which probably frees up some of the GPU's number-crunching resources. The memory size also helps. AMD is once again throwing brute bandwidth to overcome any memory-management issues its architecture may have.
The Radeon VII is being extensively marketed as a competitor to GeForce RTX 2080. NVIDIA holds a competitive edge with its hardware being DirectX Raytracing (DXR) ready, and even integrated specialized components called RT cores into its "Turing" GPUs. The "Vega 20" continues to lack such components, however AMD CEO Dr. Lisa Su confirmed at her post-keynote press round-table that the company is working on ray-tracing. "I think ray tracing is important technology; it's something that we're working on as well, from both a hardware/software standpoint."

Responding to a specific question by a reporter on whether AMD has ray-tracing technology, Dr. Su said: "I'm not going to get into a tit for tat, that's just not my style. So I'll tell you that. What I will say is ray tracing is an important technology. It's one of the important technologies; there are lots of other important technologies and you will hear more about what we're doing with ray tracing. You know, we certainly have a lot going on, both hardware and software, as we bring up that entire ecosystem."

One way of reading between the lines would be - and this is speculation on our part - that AMD could working on retrofitting some of its GPUs powerful enough to handle raytracing with DXR support through a future driver update, as well as working on future generations of GPUs with hardware-acceleration for many of the tasks that are required to get hybrid rasterization work (adding real-time raytraced objects to rasterized 3D scenes). Just as real-time raytracing is technically possible on "Pascal" even if daunting on the hardware, with good enough work directed at getting a ray-tracing model to work on NGCUs leveraging async-compute, some semblance of GPU-accelerated real-time ray-tracing compatible with DXR could probably be achieved. This is not a part of the feature-set of Radeon VII at launch.

The Radeon VII will be available from 7th February, priced at $699, which is on-par with the SEP of the RTX 2080, despite the lack of real-time raytracing (at least at launch). AMD could shepherd its developer-relations on future titles being increasingly reliant on asynchronous compute, the "Vulkan" API, and other technologies its hardware is good at.
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154 Comments on AMD Radeon VII Detailed Some More: Die-size, Secret-sauce, Ray-tracing, and More

#126
ValenOne
medi01WCC level of speculations in an article that in essence highlights what nVidia would like to highlight about VegaVII vs 2080.

How do things of that kind work, do authors of these texts simply root for nVidia, do they come from Huang's headquarters, are they somehow censored by NV's PR team?
Just curious.
A reminder for AMD, build a GPU with large classic GPU hardware NOT medium size GP104 class classic GPU hardware with 13 TFLOPS DSP.
Posted on Reply
#127
Manoa
I suspected for some time that augmenting polaris was better than using vega for games, look verry "simple" for AMD: just double everything on polaris and you got a steallar gaming card :)
Posted on Reply
#128
medi01
Assimilator...crying about NVIDIA...
Because "lack of tensor cores" (who the hell needs them in gaming) and elusive "RT stuff" (how many games support it, one?) is so important to highlight when talking about AMD product.
Posted on Reply
#129
londiste
medi01Because "lack of tensor cores" (who the hell needs them in gaming) and elusive "RT stuff" (how many games support it, one?) is so important to highlight when talking about AMD product.
Futureproof is a large argument for Radeon 7, mostly with the 16GB VRAM. Similar argument can be made for RTX and DLSS.
Posted on Reply
#130
medi01
londisteFutureproof is a large argument for Radeon 7, mostly with the 16GB VRAM. Similar argument can be made for RTX and DLSS.
Except we have seen newer games use more RAM (and with consoles beefed up and pushing 4 it will be a given), and god knows if RT will be anything, but "nvidia paid us to implement it, so here is that gimmick for ya" until RT could be run by the masses and as for DLSS, its usefulness is arguable at best.
Posted on Reply
#131
londiste
VRAM is not that straightforward either. More is always good but actual usefulness is not that clear. New consoles are next year (2020) at best and current generation sits at 8GB RAM total (XBox One X is an outlier with 12 but that will not change things much). Given the GTX1080Ti/RTX2080 performance if Radeon 7 will perform in the same level it will not really be a 4K card.
Posted on Reply
#132
Manoa
yhe DLSS suckx, RT mutch better than DLSS, I don't mind RT. I see this limited RT as another rasterization hack: there is no way to properly reflections in rasterization so this was the only way, this is whay it used for reflections in battelfield 5 (I think). but it show that even this littel usage is so insane heavy that crawl everything. if you think about the 2000 cards you see verry littel innovation for improved graphics: selective shaders are for reducing graphics. RT is the only thing that is innovation for increasing graphics. some people alredy mentioned that nvidea reach limit in term of rasterization, and performance shows that the rasterization cores give verry littel improvement compared to pascal, if you think about the increasing silicon problems and costs, engineer (mutch) better rasterization cores would be expencive, it seem to me that both nvidea and AMD did the same thing: they saved re-engineering costs this round and I think I know whay - it not worth with this round of silicon, I think some bigger improvements in silicon like used to be in like 2007 with 65nm to 45 nm re-engineering was worth becouse it gived so mutch, with modern verry littel improvements it not :)
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#133
londiste
@Manoa , what do you mean by innovation? RT and Tensor stuff is new and unused but the shaders themselves are based on Volta, not Pascal and come with couple of other new things as well. The features they come with are actually often enough very close to what Vega brought to the table. RPM seems to be the big one here. Turing has RPM same as Vega - which accounts for several benchmark wins Vega had over Pascal and no longer has over Turing. To bolster cache and memory system Turing actually got caches increased even compared to Volta. Mesh shaders are suspected to have some commonalities with primitive shaders, at least in the idea if maybe not implementation.

This time around Radeon VII is the one with less innovation. Even less so if we look at gaming. Not sure if 1:2 FP64 and wider memory bus count as innovation here.

All that is architecturally speaking. 7nm is a quality on its own :)
Posted on Reply
#134
Manoa
so nvidea did improve the rasterization cores after all, I guess it becouse they have so many money so AMD can't afford it then that the problem
lel man volta 3000$ xD
Not sure if 1:2 FP64 and wider memory bus count as innovation here
it not :x but I wish it was: if games used high precision computations it could give better graphics but I think the cards would burn becouse high power will used and temperature...
Posted on Reply
#135
londiste
Manoaif games used high precision computations it could give better graphics but I think the cards would burn becouse high power will used and temperature...
There does not seem to be any need for higher precision. Even if there was, 1:2 FP64 is the best case scenario for performance. Current trend is exactly the opposite - using FP16 for some calculations that do not need the precision. Use of that is very situational and does not bring great boost but these days every little bit helps. This is where Rapid Packed Math (RPM) comes in, this runs 2:1 FP16 ;)
Posted on Reply
#136
Manoa
yhe it the true, 780 Ti 192 FP32, maxwell 96, pascal 64 ?
you don't think graphics is lower when used 16 bit float insted of 32 bit ?
I meen in sound this the true, more bit/sample give more quality.
there is also floated textures, I don't realy understand whay it don't need, it a trade ? more speed over more quality ? or more accuracy don't give more quality at all ?
I know GIMP have float point mode operation, and on the right monitor it realy look good...
Posted on Reply
#137
ValenOne
ManoaI suspected for some time that augmenting polaris was better than using vega for games, look verry "simple" for AMD: just double everything on polaris and you got a steallar gaming card :)
RX-580 2X wide would have
4MB L2 cache
12 TFLOPS at 1340 Mhz,
64 ROPS at 1340 Mhz, bottlenecked problem. Polaris ROPS are not connected to L2 cache, hence highly dependant on external memory performance when compared to Vega 64 ROPS.
8 raster engines at 1340 Mhz, equivalent to six raster engines at 1800Mhz
512 GB/s memory bandwidth.
Still has problems with 64 ROPS at low clock speed.

Ideally, Vega M GH 2X wide would have
48 CU at 1536 Mhz would yield 9.4 TFLOPS
8 raster engines with 8 Shader Engines at 1536 Mhz
128 ROPS at 1536 Mhz
londisteFutureproof is a large argument for Radeon 7, mostly with the 16GB VRAM. Similar argument can be made for RTX and DLSS.
DLSS is just pixel reconstruction with multiple samples from previous frames which sounds like PS4 Pro's pixel reconstruction process.

www.pcgamer.com/nvidia-turing-architecture-deep-dive/

[INDENT]On previous architectures, the FP cores would have to stop their work while the GPU handled INT instructions, but now the scheduler can dispatch both to independent paths. This provides a theoretical immediate performance improvement of 35 percent per core.[/INDENT]

devblogs.nvidia.com/nvidia-turing-architecture-in-depth/

[INDENT]Turing introduces a new processor architecture, the Turing SM, that delivers a dramatic boost in shading efficiency, achieving 50% improvement in delivered performance per CUDA Core compared to the Pascal generation. These improvements are enabled by two key architectural changes. First, the Turing SM adds a new independent integer datapath that can execute instructions concurrently with the floating-point math datapath. In previous generations, executing these instructions would have blocked floating-point instructions from issuing.[/INDENT]
[INDENT][/INDENT]
[INDENT][/INDENT]
devblogs.nvidia.com/nvidia-turing-architecture-in-depth/

[INDENT]Turing Tensor Cores add new INT8 and INT4 precision modes for inferencing workloads that can tolerate quantization and don’t require FP16 precision. Turing Tensor Cores bring new deep learning- based AI capabilities to GeForce gaming PCs and Quadro-based workstations for the first time. A new technique called Deep Learning Super Sampling (DLSS) is powered by Tensor Cores. DLSS leverages a deep neural network to extract multidimensional features of the rendered scene and intelligently combine details from multiple frames to construct a high-quality final image[/INDENT]

VII supports INT8 and INT4 for deep learning- based AI capabilities.

Refer to Microsoft's DirectML. Read www.highperformancegraphics.org/wp-content/uploads/2018/Hot3D/HPG2018_DirectML.pdf
Posted on Reply
#138
FordGT90Concept
"I go fast!1!11!1!"
rvalenciaAsync compute and Sync compute shaders has TMU read-write path software optimizations.
Again, read Avalanche Studios lecture on TMU read-write workaround on ROPS bound situations.

And yet, the numbers say it doesn't really matter:
www.techspot.com/review/1762-just-cause-4-benchmarks/
rvalenciaAMD knows ROPS bound problem hence compute shader's read-write path workaround marketing push and VII's 1800Mhz clock speed with lower CU count.
Neither of those things have anything to do with ROPs and everything to do with TSMC 7nm.
rvalenciaNVIDIA's GPU designs has higher clock speeds to speed up classic GPU hardware.
Maxwell and newer utilize long render pipelines which translates to higher clockspeeds. AMD did similar with the NCU in Vega.
rvalenciaRX-580... AMD hasn't mastered 64 ROPS over 256 bit bus design, hence RX-580 is stuck at 32 ROPS with 256 bit bus. R9-290X has 64 ROPS with 512 bit bus which is 2X scale over R9-380X/RX-580's design.
And yet RX 580 is faster than R9 290X by a great deal.
Posted on Reply
#139
ValenOne
medi01Because "lack of tensor cores" (who the hell needs them in gaming) and elusive "RT stuff" (how many games support it, one?) is so important to highlight when talking about AMD product.
For tensor issue, AMD plans to support DirectML
FordGT90ConceptAnd yet, the numbers say it doesn't really matter:
www.techspot.com/review/1762-just-cause-4-benchmarks/



Neither of those things have anything to do with ROPs and everything to do with TSMC 7nm.


Maxwell and newer utilize long render pipelines which translates to higher clockspeeds. AMD did similar with the NCU in Vega.


And yet RX 580 is faster than R9 290X by a great deal.
1. Too bad for you,
RTX 2080 has 4 MB L2 cache while GTX 1080 Ti has ~3 MB L2 cache. This is important for tile cache rendering.


2. Wrong, Without memory bandwidth increase, Vega 56 at 1710 Mhz with faster ROPS and raster engines beating Strix Vega 64 at 1590 Mhz shows VII's direction with 1800 Mhz with memory bandwidth increase.

3. NCU itself doesn't compete the graphics pipeline.

4. RX-580 has delta color compression, 2 MB L2 cache for TMU and geometry (not connected to ROPS), higher clock speed for geometry/quad rastizer units and 8 GB VRAM selection.

R9-290X/R9-390X wasn't updated with Polaris IP upgrades. R9-390X has 8 GB VRAM.


Only Xbox One X's 44 CU GPU has the updates. NAVI 12 has 40 CU with unknown ROPS count, 256 bit GDDR6 and clock speed comparable to VII

You selected NVIDIA gameworks tile with geometry bias, NV GPUs has higher clock speed for geometry and raster engines.

RTX 2080 has six GPC with six raster engines, 4MB L2 cache and 64 ROPS with up to 1900 Mhz stealth overclock. Higher L2 cache storage = lower latency, less external memory hit rates.
GTX 1080 Ti has six GPC with six raster engines, 3MB L2 cache and 88 ROPS with up to 1800 Mhz stealth overclock.


R9-390X's 5.9 TFLOPS beats RX-480's 5.83 TFLOPS

R9-390 Pro's 5.1 TFLOPS beats RX-480's 5.83 TFLOPS
Posted on Reply
#140
FordGT90Concept
"I go fast!1!11!1!"
rvalenciaOnly Xbox One X's 44 CU GPU has the updates. NAVI 12 has 40 CU with unknown ROPS count, 256 bit GDDR6 and clock speed comparable to VII
Xbox One X uses a Polaris design (40 CUs, 2560 shaders, 32 ROPs, 160 TMUs). Virtually nothing is known about Navi at this point other than it is coming.
rvalenciaYou selected NVIDIA gameworks tile with geometry bias, NV GPUs has higher clock speed for geometry and raster engines.
Don't know what games Avalanche Studios makes, do you? Hint: I referenced Just Cause 4 for a reason.
Posted on Reply
#141
ValenOne
FordGT90ConceptXbox One X uses a Polaris design (40 CUs, 2560 shaders, 32 ROPs, 160 TMUs). Virtually nothing is known about Navi at this point other than it is coming.

Don't know what games Avalanche Studios makes, do you? Hint: I referenced Just Cause 4 for a reason.
1. Not 100 percent correct. X1X GPU's ROPS has 2MB render cache which doesn't exist for Polaris like RX-580. gpucuriosity.wordpress.com/2017/09/10/xbox-one-xs-render-backend-2mb-render-cache-size-advantage-over-the-older-gcns/


2. So what? Just Cause 4 is a Gameworks title. Avalanche Studios knows ROPS bound workaround with TMUs

Without Gameworks,


Posted on Reply
#142
londiste
Forza Horizon 4 clearly has some type of problem for Nvidia cards at low resolutions. FH3 initially had some CPU usage issue for Nvidia cards and as far as I can see, so does FH4.
By 2160p AMD cards will drop off far faster than Nvidia counterparts.
Posted on Reply
#143
ValenOne
londisteForza Horizon 4 clearly has some type of problem for Nvidia cards at low resolutions. FH3 initially had some CPU usage issue for Nvidia cards and as far as I can see, so does FH4.
By 2160p AMD cards will drop off far faster than Nvidia counterparts.
If there's CPU bound issue, several GPU's frame rate results would flat line into common frame rate number.

Vega 64 has inferior delta color compression when compared NVIDIA's version which is remedied by VII's higher 1TB/s memory bandwidth.
Posted on Reply
#144
FordGT90Concept
"I go fast!1!11!1!"
rvalencia1. Not 100 percent correct. X1X GPU's ROPS has 2MB render cache which doesn't exist for Polaris like RX-580. gpucuriosity.wordpress.com/2017/09/10/xbox-one-xs-render-backend-2mb-render-cache-size-advantage-over-the-older-gcns/
Vega does have L2 cache for ROPs but it's not clear how much. Cache is expensive.
rvalencia2. So what? Just Cause 4 is a Gameworks title. Avalanche Studios knows ROPS bound workaround with TMUs
Avalanche Studios clearly went out of their way to do optimization work for Vega yet, the gains are small. Most likely the game was engineered to run on Pascal and it hammered the ROPs. Transitioning some of the workload off of the ROPs solved their problem. That's not necessarily because of a design flaw in Vega, more that they were porting their rendering code from Pascal to Vega and had to create a work around where architecturally they are different. That's what optimization is about in general.
rvalenciaWithout Gameworks,
Now you're spamming random benchmarks that in no way prove your point.



Edit: Apparently Radeon VII can use DirectML which in practice can replace DLSS:
www.overclock3d.net/news/gpu_displays/amd_s_radeon_vii_supports_directml_-_an_alternative_to_dlss/1

That may imply that Vega 20 has tensor cores.
Posted on Reply
#145
mtcn77
Nvidia has DCC, TBR, L2 client ROPs and double ROPs per AMD counterpart.
You cannot compare L2 client ROPs memory controller's overclock range with discrete ROPs memory controller. The memory controller of L2-ROPs only dispatches batched transactions, it has much less traffic since you need to hit maximum memory transfer rate to hit its 'actual' clock. ROPs are at a different frequency than the memory controller.
Posted on Reply
#147
mtcn77
Besides, Nvidia has texture L1 client to L2(TBR) and uses DCC to compress any L1 traffic in L2. Normally their texture bandwidth without L1 caching is the memory interface bandwidth. With texture bandwidth amplification, the card does not write more but can read more textures than AMD's 1TB/s card.
Posted on Reply
#148
ValenOne
mtcn77Besides, Nvidia has texture L1 client to L2(TBR) and uses DCC to compress any L1 traffic in L2. Normally their texture bandwidth without L1 caching is the memory interface bandwidth. With texture bandwidth amplification, the card does not write more but can read more textures than AMD's 1TB/s card.
R9-290X at 1Ghz already has 1TB/s L2 cache bandwidth which makes GCNs cryptocurrency friendly cards

VII's 1.8Ghz scaling would be about 1.8 TB/s L2 cache bandwidth. Vega has compressed texture I/O from external memory.

Don't make me run CUDA app L2 cache benchmark on my GTX 1080 Ti and GTX 980 Ti.
FordGT90ConceptI was wrong here, Vega 20 presumably runs DirectML on its compute shaders. DirectML can use tensor cores (if available), compute shaders (if available), or CPU cores.
On older DX12 hardware, all lesser datatypes are either emulated into 32bit datatype or run at the same rate as 32bit datatype while newer hardware has higher performance benefits.

DirectML is important for uniformed API access to rapid pack math features in newer hardware while offer software compatibility with older hardware. DirectML benefits the next Xbox One hardware release.

Polaris GPU already pack math feature but it's usage doesn't increase TFLOPS rate and reduces the available stream processors for 32bit datatypes while Vega fixes this Polaris issue.
mtcn77Besides, Nvidia has texture L1 client to L2(TBR) and uses DCC to compress any L1 traffic in L2. Normally their texture bandwidth without L1 caching is the memory interface bandwidth. With texture bandwidth amplification, the card does not write more but can read more textures than AMD's 1TB/s card.
R9-290X at 1Ghz has 1TB/s L2 bandwidth while GTX 980 Ti has about 600 GB/s L2 bandwidth (via CUDA app, disables DCC). R9-290X's ROPS are not connected to L2 cache while GTX 980 Ti's ROPS are connected to L2 cache (for tile cache render loop).

VII's 1800Mhz scale from R9-290X's 1Ghz design reaches to 1.8 TB/s L2 cache bandwidth.

Vega 56/64 has 4MB L2 cache for TMU and ROPS.
FordGT90Concept1. Vega does have L2 cache for ROPs but it's not clear how much. Cache is expensive.


2. Avalanche Studios clearly went out of their way to do optimization work for Vega yet, the gains are small. Most likely the game was engineered to run on Pascal and it hammered the ROPs. Transitioning some of the workload off of the ROPs solved their problem. That's not necessarily because of a design flaw in Vega, more that they were porting their rendering code from Pascal to Vega and had to create a work around where architecturally they are different. That's what optimization is about in general.


3. Now you're spamming random benchmarks that in no way prove your point.



Edit: Apparently Radeon VII can use DirectML which in practice can replace DLSS:
www.overclock3d.net/news/gpu_displays/amd_s_radeon_vii_supports_directml_-_an_alternative_to_dlss/1

That may imply that Vega 20 has tensor cores.
1. Vega 56/64 has 4MB L2 cache. www.tomshardware.com/news/visiontek-radeon-rx-vega-64-graphics-card,35280.html

2. Not complete. Geometry/Raster Engines are another problem for AMD GPUs when NVIDIA GPU counterparts has higher clockspeed. Vega 56 at 1710Mhz with 12 TFLOPS beating Strix Vega 64 at 1590Mhz with 13 TFLOPS shows higher clockspeed improves Geometry/Raster Engines/ROPS/L2 cache despite Vega 56's lower TFLOPS.

3. Don't deny Gameworks issues. Hint: Geometry and related rasterization conversion process, and NVIDIA GPU counterparts has higher clockspeed that benefits classic GPU hardware. I advocate for AMD to reduce CU count (reduce power consumption) and trade for higher clock speed e.g. Vega 48 with 1900Mhz to 2Ghz range.
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#149
mtcn77
rvalenciaR9-290X at 1Ghz already has 1TB/s L2 cache bandwidth which makes GCNs cryptocurrency friendly cards

VII's 1.8Ghz scaling would be about 1.8 TB/s L2 cache bandwidth. Vega has compressed texture I/O from external memory.

Don't make me run CUDA app L2 cache benchmark on my GTX 1080 Ti and GTX 980 Ti.


On older DX12 hardware, all lesser datatypes are either emulated into 32bit datatype or run at the same rate as 32bit datatype while newer hardware has higher performance benefits.

DirectML is important for uniformed API access to rapid pack math features in newer hardware while offer software compatibility with older hardware. DirectML benefits the next Xbox One hardware release.

Polaris GPU already pack math feature but it's usage doesn't increase TFLOPS rate and reduces the available stream processors for 32bit datatypes while Vega fixes this Polaris issue.



R9-290X at 1Ghz has 1TB/s L2 bandwidth while GTX 980 Ti has about 600 GB/s L2 bandwidth (via CUDA app, disables DCC). R9-290X's ROPS are not connected to L2 cache while GTX 980 Ti's ROPS are connected to L2 cache (for tile cache render loop).

VII's 1800Mhz scale from R9-290X's 1Ghz design reaches to 1.8 TB/s L2 cache bandwidth.

Vega 56/64 has 4MB L2 cache for TMU and ROPS.


1. Vega 56/64 has 4MB L2 cache. www.tomshardware.com/news/visiontek-radeon-rx-vega-64-graphics-card,35280.html

2. Not complete. Geometry/Raster Engines are another problem for AMD GPUs when NVIDIA GPU counterparts has higher clockspeed. Vega 56 at 1710Mhz with 12 TFLOPS beating Strix Vega 64 at 1590Mhz with 13 TFLOPS shows higher clockspeed improves Geometry/Raster Engines/ROPS/L2 cache despite Vega 56's lower TFLOPS.

3. Don't deny Gameworks issues. Hint: Geometry and related rasterization conversion process, and NVIDIA GPU counterparts has higher clockspeed that benefits classic GPU hardware. I advocate for AMD to reduce CU count (reduce power consumption) and trade for higher clock speed e.g. Vega 48 with 1900Mhz to 2Ghz range.
I concur, however I was pointing out that the IMC has less consequences in a TBR & L2-ROP design. AMD would certainly be able to clock the gpu higher in case they integrated TBR, but also most of Nvidia's advantage is due to r:w amplification through TBR, not frequency alone. They can only write 616GB/s, yes, but setup occurs in reference of texture reads at 1.5TB/s.
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#150
ValenOne
mtcn77I concur, however I was pointing out that the IMC has less consequences in a TBR & L2-ROP design. AMD would certainly be able to clock the gpu higher in case they integrated TBR, but also most of Nvidia's advantage is due to r:w amplification through TBR, not frequency alone. They can only write 616GB/s, yes, but setup occurs in reference of texture reads at 1.5TB/s.
Running CUDA apps disables delta color compression.
NVIDIA Maxwell/Pascal/Turing GPUs doesn't have PowerVR's "deferred tile render" but it has immediate mode tile cache render.



For my GTX 1080 Ti and 980 Ti GPUs, I can increase L2 cache bandwidth with an overclock.

Vega 56 at higher clock speed still has performance increase without increasing memory bandwidth and Vega ROPS has multi-MB L2 cache connection like Maxwell/Pascal's ROPS designs.
VII rivalling the fastest Turing GPU with 64 ROPS would be RTX 2080.

Battlefield series games are well known for software tiled compute render techniques which maximises older AMD GCNs with L2 cache connections with TMUs.


For Vega architecture from radeon.com/_downloads/vega-whitepaper-11.6.17.pdf
From AMD's white paper

Vega uses a relatively small number of tiles, and it operates on primitive batches of limited size compared with those used in previous tile-based rendering architectures. This setup keeps the costs associated with clipping and sorting manageable for complex scenes while delivering most of the performance and efficiency benefits.


AMD Vega Whitepaper:

[INDENT]The Draw-Stream Binning Rasterizer (DSBR) is an important innovation to highlight. It has been designed to reduce unnecessary processing and data transfer on the GPU, which helps both to boost performance and to reduce power consumption. The idea was to combine the benefits of a technique already widely used in handheld graphics products (tiled rendering) with the benefits of immediate-mode rendering used high-performance PC graphics.[/INDENT]
[INDENT]Pixel shading can also be deferred until an entire batch has been processed, so that only visible foreground pixels need to be shaded. This deferred step can be disabled selectively for batches that contain polygons with transparency. Deferred shading reduces unnecessary work by reducing overdraw (i.e., cases where pixel shaders are executed multiple times when di erent polygons overlap a single screen pixel).[/INDENT]



PowerVR's deferred tile render is patent heavy.
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