Wednesday, August 2nd 2023
PCI-SIG Exploring an Optical Interconnect to Enable Higher PCIe Technology Performance
PCI-SIG today announced the formation of a new workgroup to deliver PCI Express (PCIe) technology over optical connections. The PCI-SIG Optical Workgroup intends to be optical technology-agnostic, supporting a wide range of optical technologies, while potentially developing technology-specific form factors.
"Optical connections will be an important advancement for PCIe architecture as they will allow for higher performance, lower power consumption, extended reach and reduced latency," said Nathan Brookwood, Research Fellow at Insight 64. "Many data-demanding markets and applications such as Cloud and Quantum Computing, Hyperscale Data Centers and High-Performance Computing will benefit from PCIe architecture leveraging optical connections."
"We have seen strong interest from the industry to broaden the reach of the established, multi-generational and power-efficient PCIe technology standard by enabling optical connections between applications," said PCI-SIG President and Chairperson Al Yanes. "PCI-SIG welcomes input from the industry and invites all PCI-SIG members to join the Optical Workgroup, share their expertise and help set specific workgroup goals and requirements."
Existing PCI-SIG workgroups will continue their generational march towards a 128GT/s data rate in the PCIe 7.0 specification, while this new optical workgroup will work to make the PCIe architecture more optical-friendly.
Source:
PCI-SIG
"Optical connections will be an important advancement for PCIe architecture as they will allow for higher performance, lower power consumption, extended reach and reduced latency," said Nathan Brookwood, Research Fellow at Insight 64. "Many data-demanding markets and applications such as Cloud and Quantum Computing, Hyperscale Data Centers and High-Performance Computing will benefit from PCIe architecture leveraging optical connections."
Existing PCI-SIG workgroups will continue their generational march towards a 128GT/s data rate in the PCIe 7.0 specification, while this new optical workgroup will work to make the PCIe architecture more optical-friendly.
32 Comments on PCI-SIG Exploring an Optical Interconnect to Enable Higher PCIe Technology Performance
Interested in if they intend some kind of standard adapter/backwards compatibility, or if this is expected to be 'industry-use only'?
For example Cornings Optically based 5m Thunderbolt cable is ~£400
A Passive 2 meter cable from a reputable brand is like ~£30
Fibre Optics are fairly well developed, but there's immense 'headroom' for faster and faster transfer rates.
...and PCIe is 32-bit and 64-bit PCI and PCI-X backwards compatible by PCI-SIG spec too. 'Parallel' was just the transport mechanism, right?
Still requires a bridge chip for the signals. That's what I'm curious about.
Something that could be done as well is better use of 3D environment space in regard to PCB's and interconnects. Running a PCIE slot 6 to 7 inches away isn't nearly as optimal as a quarter inch interconnecct between two short 3D planes of a PCB's. I'd re-thinking how PC's are built and setup is a one area for notable improvements on trace layouts and optimal performance by reducing the distances on those things by stacking pcb's cleverly to reduces overall trace lengths between destination sources.
It's a monumental attempt to force a different standard into an established market. ATX is long in the tooth, but somebody will need to shoulder the cost of re tooling, well, everything. New cases, PSU designs, PCB designs, ece.
In all seriousness now, BTX was too soon and was seen as Intel trying to push a change so they could sell their failing Netburst designs. Power and cooling needs were quite modest compared to today’s stuff. Now we’re starting to max out air cooling in the space we have to work with. Even then, OEMs are already taking some liberties with the ATX form factor. I’m really surprised the aftermarket world hasn’t pushed for something different. I guess it does take cooperation from AMD and Intel on designing something around the CPU.
I am curious about heat. tranceivers get prettttttyyyy warm.
Geeze, that takes me back. o_O
It's mostly a things with ITX boards since they are the most space limited.
I think we're overdue for approaching it a bit more optimally. In a good case design you could probably squeeze in 4 full size ATX or micro ATX boards with pretty short connections between them especially with optical. some kind of PCIE connection along each of the 3 upper board edges and you could connect one of each to another board for 4 boards in total. That's certainly gives you a lot of PCB space to work with. It complicates cooling more depending on how dense you get with it. Depending on how spread apart they are at least w/o optical you kind of are back to square one on long trace lengths.