Monday, December 16th 2019
Intel CPU Based on New Architecture Leaks
Today Intel's CPU based on yet unannounced architecture got revealed in the SiSoft benchmark database. Featuring six cores and twelve threads running at 3 GHz, it appears like a regular 14 nm CPU that's already available, however, when digging through the details, many things are revealed. The newly submitted CPU has a different L2 cache configuration from previous CPU offerings, with this chip featuring 1.25 MB of L2 cache per core, it is unlike anything else Intel currently offers. Ice Lake mobile chips feature 512 KB, while the highest amount of L2 cache is currently present on i9-10980XE, which features 1 MB of L2.
It is unknown where this CPU fits in the whole 14/10 nm lineup, as we don't know if this is an iteration of 10 nm Tiger Lake or the rumored 14 nm Rocket Lake CPU. All we know is that this CPU features new architecture compared to Skylake iterations that are currently being used, judging by L2 cache bump, which usually happens on new architectures. The platform used for benchmarking this CPU was SuperMicro X12DAi-N SMC X12 dual-socket motherboard, which featured two of these new CPUs for a total of 12 cores and 24 threads.
Source:
Tom's Hardware
It is unknown where this CPU fits in the whole 14/10 nm lineup, as we don't know if this is an iteration of 10 nm Tiger Lake or the rumored 14 nm Rocket Lake CPU. All we know is that this CPU features new architecture compared to Skylake iterations that are currently being used, judging by L2 cache bump, which usually happens on new architectures. The platform used for benchmarking this CPU was SuperMicro X12DAi-N SMC X12 dual-socket motherboard, which featured two of these new CPUs for a total of 12 cores and 24 threads.
19 Comments on Intel CPU Based on New Architecture Leaks
Basically, another 14nm[add some pluses here] part for multi-socket servers, which on Intel's slides appeared as Cooper Lake SP.
Scheduled for release Q1 2020, I think.
Nuff said.
NEXT
This is X11, so the new one may be a server board, as suggested by SiSoftware.
Could it be another Conroe?
Probably not..
Intel is such a gigantic snooze-fest and has been for years.
This cache configuration would very likely indicate it's Sunny Cove or Willow Cove based.You should know better.
If genuine, a dual CPU configuration would indicate Xeon SP, which are energy optimized, not performance optimized, so is not intended to compete with your typical i7/i9 or Ryzen 7/9 desktop CPUs in performance per core.
This being a dual socket CPU eliminates the possibility of this being a Tiger Lake (-S) or "Rocket Lake-S", as those dies will not support multi-socket configurations. Dual socket support is limited to Xeon scalable.
Unless we see a big leap in some way, Intel has nothing. Im not seeing those leaps here.
AMD does the same thing, well except for the extreme hype train of course.Second generation 10nm will reach much wider deployment and production volume than the first generation. Unless you have actually seen it, you really can't assess it yet. Don't forget that 14nm were terrible in the beginning, 14nm+ were okay, 14nm++ excellent.You said "we will see", and yet you show some prejudgement here by claiming Intel has nothing ;)
Sunny Cove is beyond anything anything else on the market, so towards the end of 2020 we should see some exciting products from both camps. This will be fun times ;)
So what, even IF they get a dual socket 10nm going... it still doesn't bring us anything. They've managed to find a use for a low power optimized node, because that is all we've seen so far, but who is really waiting for that baby step when 7nm is already in volume production and offering 1. EUV progress (cheaper dies higher yields), 2. both high performance and low power options and 3. actually does have performance to offer beyond what 14nm is capable of.
This race has already been run even if Intel brings us 10nm. That is why I pasted the performance metric there. Nobody is waiting for average performance revamped once more, and even on 10nm its too late to the party, while on 14nm its complete and utter nonsense.
Is this supported by hard fact? Of course not. This is crystal ball material... do come back to revisit this topic and see how it turned out I'd say :)