Tuesday, December 10th 2024
Kioxia Develops OCTRAM (Oxide-Semiconductor Channel Transistor DRAM) Technology
Kioxia Corporation, a world leader in memory solutions, today announced the development of OCTRAM (Oxide-Semiconductor Channel Transistor DRAM), a new type of 4F2 DRAM, comprised of an oxide-semiconductor transistor that has a high ON current, and an ultra-low OFF current, simultaneously. This technology is expected to realize a low power DRAM by bringing out the ultra-low leakage property of the InGaZnO transistor. This was first announced at the IEEE International Electron Devices Meeting (IEDM) held in San Francisco, CA on December 9, 2024. This achievement was jointly developed by Nanya Technology and Kioxia Corporation. This technology has the potential to lower power consumption in a wide range of applications, including AI and post-5G communication systems, and IoT products.
The OCTRAM utilizes a cylinder-shaped InGaZnO vertical transistor (Fig.1) as a cell transistor. This design enables the adaptation of a 4F2 DRAM, which offers significant advantages in memory density compared to the conventional silicon-based 6F2 DRAM.
The InGaZnO vertical transistor achieves a high ON current of over 15μA/cell (1.5 x 10-5 A/cell) and an ultra-low OFF current below 1aA/cell (1.0 x 10-18 A/cell) through device and process optimization (Fig.2). In the OCTRAM structure, the InGaZnO vertical transistor is integrated on top of a high aspect ratio capacitor (capacitor-first process). This arrangement allows for the decoupling of the interaction between the advanced capacitor process and the InGaZnO performance (Fig.3).
InGaZnO is a compound of In (indium), Ga (gallium), Zn (zinc), and O (oxygen)
Source:
Kioxia
The OCTRAM utilizes a cylinder-shaped InGaZnO vertical transistor (Fig.1) as a cell transistor. This design enables the adaptation of a 4F2 DRAM, which offers significant advantages in memory density compared to the conventional silicon-based 6F2 DRAM.
InGaZnO is a compound of In (indium), Ga (gallium), Zn (zinc), and O (oxygen)
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3 Comments on Kioxia Develops OCTRAM (Oxide-Semiconductor Channel Transistor DRAM) Technology
(I understand it's not that simple, there seem to be a few patents related to IGZO and IGZO TFTs, one will only expire in 2030, etc. But there may still be something to what I said above.)
Does anyone know off the top of his mind if refreshes are not just a battery, but also a performance issue? There’s an Intel paper I’ve spotted right away, which claims a rather insane 17% impact versus hypothetical no refreshes on a DDR3 system with eight cores. :wtf: users.ece.cmu.edu/~yoonguk/papers/chang-hpca14.pdf
So, I figure, maybe they’d want to cut down on refreshes instead. (Which, in turn, requires inter-cell consistency, as longer cycles would exacerbate any differences in charge loss between cells.)
Also Wikipedia claims (added at the very end of 2012) that cells were being refreshed every 64ms (swathes of time in hardware terms), with easy increases possible to 500ms if the chips are at room temperature instead of the top of their operating range, and further towards even the ten second mark (!) if you cut out the 1% of RAM with the weakest cells. This honestly seems like a no-brainer for energy savings, especially in standby, I wonder how many manufacturers have done this. :twitch: (Conversely, in all untweaked computers, this would amount to a nice increase in stanby time. But yeah, maybe things have already moved on from 2012?) en.wikipedia.org/wiki/Memory_refresh#Refresh_interval