Thursday, May 30th 2024
Intel's "Skymont" E-core Posts a Double-digit IPC Gain Over "Crestmont": Leaked Presentation
Amid all the attention the next-generation "Lion Cove" P-cores powering the upcoming "Lunar Lake" and "Arrow Lake" microarchitectures get as they compete with AMD's "Zen 5," it's easy to lose sight of the next-generation "Skymont" E-cores that will feature in both the upcoming Intel microarchitectures, and as standalone cores in the "Twin Lake" low-power processor. Pictures from an Intel presentation, possibly to PC OEMs, got leaked to the web. These are just thumbnails, we can't see the whole slides, but the person who took the pictures captioned them in a now-deleted social media post on the Chinese microblogging platform Weibo.
And now, the big reveal—the "Skymont" E-core is said to offer a double-digit IPC gain over the "Crestmont" E-core powering the current "Meteor Lake" processor, which in itself posted a roughly 4% IPC gain over the "Gracemont" E-cores found in the "Raptor Lake" and "Alder Lake" microarchitectures. Such an IPC gain over "Gracemont" should make the "Skymont" E-core match the IPC of the "Sunny Cove" or "Willow Cove" P-cores powering the "Ice Lake" and "Tiger Lake" microarchitectures, respectively, which were both within the 90th percentile of the AMD "Zen 3" core in IPC.Intel is achieving this double-digit IPC gain over "Crestmont" through an improved branch prediction unit, a broader 9-wide Decode unit compared to the 6-wide Decode unit of "Crestmont," and an 8-wide integer ALU, compared to 4 Integer ALU on its predecessor, a dependency optimization in the out-of-order engine, and deeper queuing across the engine. The E-cores might still be arranged in clusters that share an L2 cache among a certain number of cores.
Source:
HXL (Twitter)
And now, the big reveal—the "Skymont" E-core is said to offer a double-digit IPC gain over the "Crestmont" E-core powering the current "Meteor Lake" processor, which in itself posted a roughly 4% IPC gain over the "Gracemont" E-cores found in the "Raptor Lake" and "Alder Lake" microarchitectures. Such an IPC gain over "Gracemont" should make the "Skymont" E-core match the IPC of the "Sunny Cove" or "Willow Cove" P-cores powering the "Ice Lake" and "Tiger Lake" microarchitectures, respectively, which were both within the 90th percentile of the AMD "Zen 3" core in IPC.Intel is achieving this double-digit IPC gain over "Crestmont" through an improved branch prediction unit, a broader 9-wide Decode unit compared to the 6-wide Decode unit of "Crestmont," and an 8-wide integer ALU, compared to 4 Integer ALU on its predecessor, a dependency optimization in the out-of-order engine, and deeper queuing across the engine. The E-cores might still be arranged in clusters that share an L2 cache among a certain number of cores.
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