NVIDIA could launch successors to its GeForce GTX 1060 series and GTX 1050 series only by 2019, according to a statement by an ASUS representative, speaking with PC Watch. This could mean that the high-end RTX 2080 Ti, RTX 2080, and RTX 2070, could be the only new SKUs for Holiday 2018 from NVIDIA, alongside cut-rate GeForce GTX 10-series SKUs. This could be a combination of swelling inventories of 10-series GPUs, and insufficient volumes of mid-range RTX 20-series chips, should NVIDIA even decide to extend real-time ray-tracing to mid-range graphics cards.

The way NVIDIA designed the RTX 2070 out of the physically smaller TU106 chip instead of TU104 leads us to believe that NVIDIA could carve out the GTX 1060-series successor based on this chip, since the RTX 2070 maxes it out, and NVIDIA needs to do something with imperfect chips. An even smaller chip (probably half-a-TU104?) could power the GTX 1050-series successor.

With no end to its 10 nm transition woes in sight (at least not until late-2019), Intel is left with refinement of its existing CPU micro-architectures on the 14 nanometer node. The client-desktop segment sees the introduction of the "Whiskey Lake" (aka Coffee Lake Refresh) later this year; while the enterprise segment gets the 14 nm "Cascade Lake." To its credit, Cascade Lake introduces a few major platform innovations, such as support for Optane Persistent Memory, silicon-level hardening against recent security vulnerabilities, and Deep Learning Boost, which is hardware-accelerated neural net building/training, and the introduction of VNNI (Variable Length Neural Network Instructions). "Cascade Lake" makes its debut towards the end of 2018. It will be succeeded in 2019 by Ice Lake the new "Cooper Lake" architecture.

"Cooper Lake" is a refresh of "Cascade Lake," and a stopgap in Intel's saga of getting 10 nm right, so it could build "Ice Lake" on it. It will be built on the final (hopefully) iteration of the 14 nm node. It will share its platform with "Cascade Lake," and so Optane Persistent Memory support carriers over. What's changed is the Deep Learning Boost feature-set, which will be augmented with a few new instructions, including BFLOAT16 (a possible half-precision floating point instruction). Intel could also be presented with the opportunity to crank up clock speeds across the board.

One of the first Intel NUC (next unit of computing) mini PCs to feature completely discrete GPUs (and not MCMs of CPUs and GPUs), the "Crimson Canyon" NUC8i3CYSM and NUC8i3CYSN, are up for pre-order. The former is priced at USD $529, while the latter goes for $574. The two combine Intel's 10 nm Core i3-8121U "Cannon Lake" SoC with AMD Radeon 540 discrete GPU. Unlike the "Hades Canyon" NUC, which features an MCM with a powerful AMD Radeon Vega M GPU die and a quad-core "Kaby Lake" CPU die; the "Crimson Canyon" features its processor and GPU on separate packages. The Radeon 540 packs 512 stream processors, 32 TMUs, and 16 ROPs; with 2 GB of GDDR5 memory.

All that's differentiating the NUC8i3CYSM from the NUC8i3CYSN is memory. You get 4 GB of LPDDR4 memory with the former, and 8 GB of it with the latter. Both units come with a 2.5-inch 1 TB HDD pre-installed. You also get an M.2-2280 slot with PCIe 3.0 x4 wiring, and support for Optane caching. Intel Wireless-AC 9560 WLAN card handles wireless networking, while an i219-V handles wired. Connectivity includes four USB 3.0 type-A ports, one of which has high current; an SDXC card reader, CIR, two HDMI 2.0 outputs, and 7.1-channel HD audio. The NUC has certainly grown in size over the years. This one measures 117 mm x 112 mm x 52 mm (WxDxH). An external 90W power-brick adds to the bulk.

Intel is one of the few semiconductor companies that manufactures a majority of its products on its own silicon fabrication foundries. The breadwinner for the company continues to be CPUs, and a majority of its revenues continue to come from its client-computing group (CCG). CPUs, like GPUs, are required to be built on the latest silicon fabrication process to keep up (or catch up) with Moore's Law. Intel is plagued with severe technological roadblocks toward advancing its foundry process from 14 nanometer (nm) to its next step, 10 nm. In its latest Q2-2018 earnings call, the company confirmed that the 10 nm node won't put out before Q4-2019, even as rival AMD's CEO announced that its first 7 nm processors will be up for purchase by the end of 2018 (a year ahead with a more advanced process, on paper). Analysts are beginning to paint a very grim future for Intel's foundry business.

The prospects for Intel going fabless, at least for its cutting-edge products, is higher than ever. Analysts, speaking with Taiwan-based industry observer DigiTimes, mentioned that there is speculation of Intel scaling down its foundry business. Something like this, if true, could hint at the company looking for foundry partners with newer silicon-fabrication nodes at a more advanced stage of development (eg: GlobalFoundries 7 nm) to manufacture its processors, while relegating its own foundries to manufacture less complex products such as chipset, NAND flash, 3D XPoint memory, 5G PHYs, etc. Fancy a Core processor made by GloFo in the great state of New York?

Wrap your head around this: at some point in 2019, AMD will be selling 7 nm processors while Intel sells 14 nm processors. That how grim Intel's 10 nanometer silicon fabrication process development is looking. In the Q&A session of its Q2-2018 Earnings Call, Intel stated that the first products based on its 10 nm process will arrive only by Holiday 2019, making 14 nm micro-architectures hold the fort for not just the rest of 2018, but also most of 2019. In the client-segment, Intel is on the verge of launching its 9th generation Core "Whiskey Lake" processor family, its 5th micro-architecture on the 14 nm node after "Broadwell," "Skylake," "Kaby Lake," and "Coffee Lake."

It's likely that "Whiskey Lake" will take Intel into 2019 after the company establishes performance leadership over 12 nm AMD "Pinnacle Ridge" with a new round of core-count increases. Intel is also squeezing out competitiveness in its HEDT segment by launching new 20-core and 22-core LGA2066 processors; and a new platform with up to 28 cores and broader memory interface. AMD, meanwhile, hopes to have the first 7 nm EPYC processors out by late-2018. Client-segment products based on its architecture, however, will follow the roll-out of these enterprise parts. We could see a point in 2019 when AMD launches its 7 nm 3rd generation Ryzen processors in the absence of competing 10 nm Core processors from Intel. Posted below is an Intel slide from 2013, when the company was expecting 10 nm rollout by 2015. That's how much its plans have derailed.

A post via Chiphell makes some substantial claims on AMD's upcoming Zen 2 microarchitecture, built on the 7 nm process. AMD has definitely won the core-count war once again (albeit with a much more decisive blow to Intel's dominance than with Bulldozer), but the IPC battle has been an uphill one against Intel's slow, but sure, improvement in that area over the years. AMD did say, at the time they introduced the Zen architecture, that they had a solid understanding on Zen's choke points and its improveable bits and pieces - and took it to heart to deliver just that.

Intel's 10 nanometer FinFET silicon fabrication is coming together at a slower than expected rate, however when it does, it could vastly enlarge the canvas for the company's chip designers, according to a technical report by Tech Insights. The researchers removed the die of an Intel "Cannon Lake" Core i3-8121U processor inside a Lenovo Ideapad330, and put it under their electron microscope.

Its summary mentions quite a few juicy details of the 10 nm process. The biggest of these is the achievement of a 2.7-times increase in transistor density over the current 14 nm node, enabling Intel to cram up to 100.8 million transistors per square millimeter. A 127 mm² die with nothing but a sea of transistors, could have 12.8 billion transistors. Intel 10 nm node also utilizes third-generation FinFET technology, with a reduction in minimum gate pitch from 70 nm to 54 nm; and minimum metal pitch from 52 nm to 36 nm. 10 nm also sees Intel introduce metallization of cobalt in the bulk and anchor layers of the silicon substrate. Cobalt emerged as a good alternative to tungsten and copper as a contact material between layers, due to its lower resistance at smaller sizes,

Intel is rumored to have shelved the iteration of its upcoming Z390 Express chipset as earlier publicized, the one which had certain new hardware features. It could now re-brand the existing Z370 Express as Z390 Express and probably bolster its reference design with heftier CPU VRM specifications, to cope better with its upcoming 8-core LGA1151 processors. The Z370 Express is similar in feature-set to the brink of being identical to its predecessor, the Z270 Express. This move could impact certain new hardware features that were on the anvil, such as significantly more USB 3.1 gen 2/gen1 ports directly from the PCH, integrated WiFi MAC, and Intel SmartSound technology, which borrowed certain concepts from edge-computing to implement native speech-to-text conversion directly on the chipset, for improved voice control latency and reduced CPU overhead.

The reasons behind this move could be a combination of last-minute cost-benefit analyses by Intel's bean-counters, and having to mass-produce Z390 Express on the busier-than-expected 14 nm silicon fabrication node, as opposed to current 300-series chipsets being built on the 22 nm node that's nearing the end of its life-cycle. Intel probably needed the switch to 14 nm for the significant increases in transistor-counts arising from the additional USB controllers, the WiFi MAC, and the SmartSound logic. Intel probably doesn't have the vacant 14 nm node capacity needed to mass-produce the Z390 yet, as its transition to future processes such as 10 nm and 7 nm are still saddled with setbacks and delays; and redesigning the Z390 (as we knew it) on 22 nm may have emerged unfeasible (i.e. the chip may have ended up too big and/or too hot). The Z390 Express chipset block-diagram, which we published in our older article has been quietly removed from Intel's website. It's also rumored that this move could force AMD to rethink its plans to launch its Z490 socket AM4 chipset.

Lenovo, at Intel's Computex presser, revealed a product that could put Apple design to shame. The new Yoga Book Generation 2 is a notebook+tablet convertible, with two displays on the opposite sides of the conventional clam-shell. In the notebook mode, the bottom half converts to a keyboard, with actuators providing tactile feedback. Since the bottom half's screen is a touchscreen as much the top half, you can configure the keyboard layout and "trackpad" position any which way you want. When not typing, the bottom half becomes an extended screen of the top half. Under the hood is a "new generation" processor (very likely the 10 nm Core M3-8114Y).

ARM has announced their next, high-performance computing solution with their A76 design, which brings another large performance increase to the fledgling architecture. having been touted for some time as a true contender to the aging x86 architecture, ARM has had a way of extracting impressive performance increases with each iteration of its computing designs, in the order of 20% do 40% performance increases in an almost annual basis. Compare that to the poster-child of x86 computing, Intel, and its passivity-fueled 5 to 10% yearly performance increases, and the projections aren't that hard to grasp: at some point in time, ARM cores will surpass x86 in performance - at least on the mobility space.

The new ARM A76 design, to be manufactured on the 7 nm process, brings about a 35% increase in performance compared to last years' A75. This comes with an added 40% power efficiency (partly from the 10 nm to 7 nm transition, the rest from architecture efficiency and performance improvements), despite the increase to maximum 3.0 GHz clocks. With the added performance, ARM is saying the new A76 will deliver 4x the Machine Learning performance of its previous A75 design.

Samsung Electronics Co., Ltd., the world leader in advanced memory technology, today announced that it has started mass producing the industry's first 32-gigabyte (GB) double data rate 4 (DDR4) memory for gaming laptops in the widely used format of small outline dual in-line memory modules (SoDIMMs). The new SoDIMMs are based on 10-nanometer (nm)-class process technology that will allow users to enjoy enriched PC-grade computer games on the go, with significantly more capacity, higher speeds and lower energy consumption.

Using the new memory solution, PC manufacturers can build faster top-of-the-line gaming-oriented laptops with longer battery life at capacities exceeding conventional mobile workstations, while maintaining existing PC configurations. "Samsung's 32GB DDR4 DRAM modules will deliver gaming experiences on laptops more powerful and immersive than ever before," said Sewon Chun, senior vice president of memory marketing at Samsung Electronics. "We will continue to provide the most advanced DRAM portfolios with enhanced speed and capacity for all key market segments including premium laptops and desktops."

That Intel bringing 8 cores to the mainstream-desktop (MSDT) platform is more than a rumor now, as a curious-looking SiSoft SANDRA database entry suggests. An anonymous source submitted benchmark results of a processor with 8 cores, 16 threads, 256 KB of L2 cache per core, and 16 MB of L3 cache; clocked at 2.60 GHz (prototypes and engineering-samples are usually clocked low). This can't be i7-5960X or the i7-6900K, because the HEDT chips pack 20 MB of L3 cache. The more recent i7-7820X packs 11 MB of L3 cache, with 1 MB per core of L2 cache. It's conceivable that an MSDT chip could retain the cache hierarchy of the current MSDT processors from Intel, with 2 MB L3 cache slices per core, adding up to 12 MB on the i7-8700, for example, explaining the large 16 MB L3 cache on this chip.

The SANDRA numbers suggest similar IPC to the "Coffee Lake" architecture, while a proportionate increase in performance to the increased core-count. The chip scored 96 points with 237.03 GOPS score; 330.64 GIPS Dhrystone integer, 194.46 GFLOPS Whetstone single-precision floating-point; and 148.47 GFLOPS Whetstone double-precision; and 91.45 GOPS/GHz clocks/performance. Intel is rumored to launch an 8-core/16-thread LGA115x processor, possibly paired with its upcoming Z390 Express chipset, and possibly based on its new 10 nm silicon fabrication process; sometime either in 2H-2018 or Q1-2019.

The Intel Core i3-8121U was the first Cannon Lake processor to be revealed to the public. Today, we got word of the existence of another 10 nm chip. The Intel Core M3 8114Y, as its name implies, belongs to the low-powered Cannon Lake-Y family. It's a dual-core processor with four threads that runs at a base clock of 1.5 GHz. Although there was no mention of the processor's boost clocks, the Core M3 8114Y is expected to boost to 2.2 GHz. Like its predecessor, the chip should have a 4.5 W TDP. The 3DMark results also revealed that this model in particular supports LPDDR4 memory. Unlike the Core i3-8121U which has its iGPU disabled, the Core M3 8114Y comes with an Intel UHD Graphics iGPU.

Intel updated the ARK information page for its stealthily launched 10 nm production chip, the Core i3-8121U "Cannon Lake," to confirm that the chip supports the new AVX-512 instruction-set. This is the first "mainstream" client-segment processor by the company to feature the extremely advanced instruction-set that, if implemented properly on the software side, can double performance/Watt compared to tasks that can take advantage of AVX2.

The instruction-set made its debut with the Xeon Phi "Knights Landing" HPC processor, and made its client-segment debut with the Core X "Skylake X" HEDT processors. It remains to be seen if the implementation of AVX-512 on "Cannon Lake" is complete, or if some instructions found on HPC processors such as the Xeon Phi are omitted due to irrelevance to the client platform.

A report straight out of DigiTimes, citing industry sources, says that Intel has discontinued production of its H310 chipset. The decision has apparently stemmed from lower than expected production capacity for chipsets on the 14 nm process. When that happens, production focus must shift to a specific part: in this case, Intel obviously went with the option with the lower opportunity cost, and increased production of the Z370 chipset: the one with the increased feature-set, and, most likely than not, higher margins.

After a single month of tight supply for the H310 chipset, motherboard makers are now forced to use Intel's B360 chipset in their more cost-conscious options as well - a part which carries higher cost, and thus precludes manufacturers from hitting all the price points they usually would with a fully vertical Intel chipset lineup. Speculation has emerged claiming Intel suspended the supply of H310 because they have chosen to conduct a manufacturing process change from the tight-supply 14 nm (used across almost all of Intel's production stack, both consumer and enterprise) to a 22 nm fabrication technology. Further speculation places this constrained 14 nm supply as existent because of the delay in advancing to 10 nm, a process that Intel expected to be producing in volume by now (and since a while back, to be fair).

Intel Corporation today reported first-quarter 2018 financial results. "Coming off a record 2017, 2018 is off to a strong start. Our PC business continued to execute well and our data-centric businesses grew 25 percent, accounting for nearly half of first-quarter revenue," said Brian Krzanich, Intel CEO. "The strength of Intel's business underscores my confidence in our strategy and the unrelenting demand for compute performance fueled by the growth of data."

"Compared to the first-quarter expectations we set in January, revenue was higher, operating margins were stronger and EPS was better," said Bob Swan, Intel CFO. "Our data-centric strategy is accelerating Intel's transformation, and we're raising our earnings and cash flow expectations for the year." In the first quarter, the company generated approximately $6.3 billion in cash from operations, paid dividends of $1.4 billion and used $1.9 billion to repurchase 41 million shares of stock.

Intel, via its internal documentation that is, routinely, the source of new information on unreleased products, has revealed their next low-power architecture. Codenamed Tremont, the new architecture is expected to be developed on the company's 10 nm process (not unlike Ice Lake) and bring some performance improvements to the company's options for the embedded market.

Tremont will thus replace Intel's Goldmont Plus, which is still being manufactured on the company's 14 nm process (it hasn't been side-graded to the company's 14 nm + or ++ processes, due to these being less suited for denser chip designs). The new architecture will likely receive some specific performance improvements that mirror some of Intel's Core architecture's improvements, alongside support for new instruction sets - CLWB, GFNI (SSE-based), ENCLV, Split Lock Detection instruction set extensions are all extensions that will also be introduced in the company's Ice Lake cores, which increases the likelihood of the same process. Other functions introduced specifically for Tremont include CLDEMOTE, direct store, and user wait instructions.

big.LITTLE is an innovation by ARM, which seeks to minimize power-draw on mobile devices. It is a sort of heterogeneous multi-core CPU design, in which a few "big" high-performance CPU cores work alongside a few extremely low-power "little" CPU cores. The idea here is that the low-power cores consume much lesser power at max load, than the high-performance cores at their minimum power-state, so the high-performance cores can be power-gated when the system doesn't need them (i.e. most of the time).

Intel finds itself with two distinct x86 implementations at any given time. It has low-power CPU micro-architectures such as "Silvermont," "Goldmont," and "Goldmont Plus," etc., implemented on low-power product lines such as the Pentium Silver series; and it has high-performance micro-architectures, such as "Haswell," "Skylake," and "Coffee Lake." The company wants to take a swing at its own heterogeneous multi-core CPU, according to tech stock analyst Ashraf Eassa, with the Motley Fool.

AMD "Vega 20" is rumored to be an optical shrink of the current "Vega 10" GPU die to a newer process, either 12 nm, or 10 nm, or perhaps even 7 nm. Six new device IDs that point to "Vega 20" based products, surfaced on AMD's GPU drivers source code, with its latest commit made as recently as on 28th March. AMD "Vega 10" is a multi-chip module of a 14 nm GPU die, and two "10 nm-class" HBM2 memory stacks, sitting on a silicon interposer that facilitates high-density wiring between the three. In an effort to increase clock speeds, efficiency, or both, AMD could optically shrink the GPU die to a smaller silicon fabrication process, and carve out a new product line based on the resulting chip.

In a bid to ensure sufficient supply of NAND flash memory to meet the growing demands of not just PC, but also smartphone markets, China's Tsinghua Unigroup and Intel are in talks to license-manufacture 64-layer 3D NAND flash, based on existing IMFlash Technologies designs. IMFlash is a joint-venture between Intel and Micron Technology. Tsinghua Unigroup is one of the biggest beneficiaries of the Chinese Government's ambitious plan to invest RMB 1 trillion (USD $158 billion) over the next five years, to increase China's semiconductor self-sufficiency to 70 percent, by 2025.

The move will significantly increase supply of NAND flash memory, and is seen as a market threat to Korean NAND flash giants Samsung and SK Hynix, and Japanese Toshiba. IMFlash Technology released its first 64-layer 3D NAND flash to the market in 2017, and is currently developing a 96-layer 3D NAND flash chip, which, along with newer 10 nm-class silicon fabrication process, could double densities over the current 64-layer chips.

Israeli Economy Minister Eli Cohen today revealed that after talks with Intel, the company shared plans for a $5 billion investment in its Kiryat Gat plant, located in southern Israel. The Kiryat Gat plant currently features tools and manufacturing facilities that allow only 22 nm chips to be produced - definitely not cutting edge, but still somewhat relevant in the semiconductor market for simpler technologies. Intel's investment would bring this plant's capabilities to 10 nm manufacturing levels. The minister further stated that Intel will begin its investment this year, and was looking towards a full 2020 payoff with increased manufacturing capabilities. Naturally, with investment comes tax opportunities and government incentives, and Intel is expected to receive a 10% grant from the Israeli government to help it in this investments' funding.

Intel's next generation "Ice Lake" processor could integrate a significantly faster integrated graphics solution (iGPU), if a SiSoft SANDRA online database entry is to be believed. A prototype "Ice Lake" chip was benchmarked, with its iGPU being described by the database as "Intel UHD Graphics" based on the company's Gen 11 graphics architecture, which succeeds the current Gen 9.5 architecture implemented on "Coffee Lake" and "Kaby Lake." This iGPU is endowed with 48 execution units (EUs), which work out to 384 unified shaders; against 24 EUs and 192 shaders on Intel UHD 620. SANDRA also describes the iGPU as being able to share up to 6 GB of memory from the system memory; and featuring 768 KB of dedicated cache. Its reference clock is 600 MHz, double that of the UHD 620, although its boost clock remains a mystery. "Ice Lake" is being built on Intel's new 10 nm+ silicon fabrication process, so it's understandable for the company to significantly enlarge its iGPU.

Hot on the heels of Samsung updating its website with its next performance-segment SSD 860 Pro series, with its range-topping 4 TB variant, a similar pre-launch website update revealed the company's next mainstream SATA SSD, the 860 EVO. The drive will be available in three form-factors, 7 mm-thick 2.5-inch, M.2-2280, and mSATA; all with SATA 6 Gbps interface. The 2.5-inch version comes in 250 GB, 500 GB, 1 TB, 2 TB, and 4 TB variants; while the M.2-2280 version comes in just 500 GB, 1 TB, and 2 TB variants; and the mSATA version in 250 GB, 500 GB, and 1 TB variants. The drives combine Samsung's latest generation 3D VNAND flash memory built in the 10 nm-class sliicon fabrication process, with an updated controller and refined firmware.

The 860 EVO offers sequential transfer rates of up to 550 MB/s, with up to 520 MB/s sequential writes, up to 97,000 IOPS 4K random reads, and up to 88,000 IOPS 4K random writes. The new-generation flash is rated for "8 times higher" endurance than the 850 EVO series; with up to 2,400 TBW. Samsung is reinforcing its faith in the drive by backing it with 5-year warranties. The company is introducing the new TurboWrite feature, which is a user-configurable SLC cache. You can set anywhere between 12 GB to 72 GB of the NAND flash to function as SLC, so the controller can juggle hot data in and out of it, for improved performance, using the Samsung Magician software.

HWiNFO v. 5.7 has brought with it a smattering of improvements and additions, as is usually the case. These are worthier of a news piece than most, however, since we're looking at quite a number of interesting developments. For one, preliminary support has been added for Intel's Whiskey Lake, an upcoming mobile design that succeed's Intel's Kaby Lake products, and should bring the fight to AMD's Ryzen Mobile offerings. Furthermore, and still on the Intel camp, support for the upcoming 10 nm Ice Lake has also been added. Íf you'll remember, Ice Lake is expected to be Intel's first foray into the 10 nm+ process in the mobile camp (given away by the U/Y product codes), after numerous delays that made the company stick with its 14 nm process through three iterations and in-process improvements. These are not the only Intel developments, however; the team behind HWiNFO has also added a new feature that reveals your Intel CPU's Turbo Boost multipliers, which the company has since removed form their ARK pages and processor specifications - an issue that generated rivers of ink.

Stepping away from the blue giant's camp, there's added support for AMD's next revision of their Ryzen processors (Pinnacle Ridge, on a 12 nm process). There's also mention of upcoming support for AMD's 400-series chipsets, which should improve platform features of the AM4 socket. This addition comes after we've seen its first appearance in the PCI-SIG Integrators List.

Samsung Electronics Co., Ltd., the world leader in advanced memory technology, announced today that it has begun mass producing the industry's first 2nd-generation of 10-nanometer class (1y-nm), 8-gigabit (Gb) DDR4 DRAM. For use in a wide range of next-generation computing systems, the new 8 Gb DDR4 features the highest performance and energy efficiency for an 8 Gb DRAM chip, as well as the smallest dimensions.

"By developing innovative technologies in DRAM circuit design and process, we have broken through what has been a major barrier for DRAM scalability," said Gyoyoung Jin, president of Memory Business at Samsung Electronics. "Through a rapid ramp-up of the 2nd-generation 10 nm-class DRAM, we will expand our overall 10 nm-class DRAM production more aggressively, in order to accommodate strong market demand and continue to strengthen our business competitiveness."