Intel was once the shining star in the semiconductor manufacturing industry, with a perfectly integrated, vertical product design and manufacturing scheme. Intel was one of the few companies in the world to be able to both develop its architectures and gear their manufacturing facilities to their design characteristics, ensuring a perfect marriage of design and manufacturing. However, not all is rosy on that field, as we've seen; AMD itself also was a fully integrated company, but decided to spin-off its manufacturing arm so as to survive - thus creating GLOBALFOUNDRIES.But Intel was seen as many as the leader in semiconductor manufacturing, always at the cutting edge of - well - Moore's Law, named after Intel's founding father Gordon Moore. Now, Mehdi Hosseini, an analyst with Susquehanna, has gone on to say that the blue giant has effectively lost its semiconductor leadership. And it has, in a way, even if its 10 nm (which is in development hell, so to speak) is technically more advanced than some 7 nm implementations waiting to be delivered to market by its competitors. However, there's one area where Intel will stop being able to claim leadership: manufacturing techniques involving EUV (Extreme UltraViolet).

GLOBALFOUNDRIES today announced an important step in its transformation, continuing the trajectory launched with the appointment of Tom Caulfield as CEO earlier this year. In line with the strategic direction Caulfield has articulated, GF is reshaping its technology portfolio to intensify its focus on delivering truly differentiated offerings for clients in high-growth markets.

GF is realigning its leading-edge FinFET roadmap to serve the next wave of clients that will adopt the technology in the coming years. The company will shift development resources to make its 14/12nm FinFET platform more relevant to these clients, delivering a range of innovative IP and features including RF, embedded memory, low power and more. To support this transition, GF is putting its 7nm FinFET program on hold indefinitely and restructuring its research and development teams to support its enhanced portfolio initiatives. This will require a workforce reduction, however a significant number of top technologists will be redeployed on 14/12nm FinFET derivatives and other differentiated offerings.

It has been a rollercoaster Monday for AMD as it bled yet another bright executive. Jim Anderson, who led Computing and Graphics Group after the departure of Raja Koduri, and who is rumored to have conceived the idea of Threadripper and the client-segment monetization of the "Zen" architecture, left AMD to become CEO of Lattice Semiconductor, a company that designs FPGAs. Anderson will be paid an inducement award of company shares valued up to $2.9 million.

On the same day, AMD stock crossed $25 to close at $25.26 up 5.34 percent, a historic high since way back in 2006 as Intel was beginning to regain its footing with its Core processor family. This raises the company's market cap to $22.9 billion. AMD is better funded than ever (in over 12 years), to start a new GPU project, for example. CTO Mark Papermaster, in a company blog post assured customers that AMD is going all-in with 7 nanometer, and it could bank more heavily on TSMC to achieve its roadmap goals of first-to-market 7 nm CPU and GPU by end of the year.

Intel is one of the few semiconductor companies that manufactures a majority of its products on its own silicon fabrication foundries. The breadwinner for the company continues to be CPUs, and a majority of its revenues continue to come from its client-computing group (CCG). CPUs, like GPUs, are required to be built on the latest silicon fabrication process to keep up (or catch up) with Moore's Law. Intel is plagued with severe technological roadblocks toward advancing its foundry process from 14 nanometer (nm) to its next step, 10 nm. In its latest Q2-2018 earnings call, the company confirmed that the 10 nm node won't put out before Q4-2019, even as rival AMD's CEO announced that its first 7 nm processors will be up for purchase by the end of 2018 (a year ahead with a more advanced process, on paper). Analysts are beginning to paint a very grim future for Intel's foundry business.

The prospects for Intel going fabless, at least for its cutting-edge products, is higher than ever. Analysts, speaking with Taiwan-based industry observer DigiTimes, mentioned that there is speculation of Intel scaling down its foundry business. Something like this, if true, could hint at the company looking for foundry partners with newer silicon-fabrication nodes at a more advanced stage of development (eg: GlobalFoundries 7 nm) to manufacture its processors, while relegating its own foundries to manufacture less complex products such as chipset, NAND flash, 3D XPoint memory, 5G PHYs, etc. Fancy a Core processor made by GloFo in the great state of New York?

Wrap your head around this: at some point in 2019, AMD will be selling 7 nm processors while Intel sells 14 nm processors. That how grim Intel's 10 nanometer silicon fabrication process development is looking. In the Q&A session of its Q2-2018 Earnings Call, Intel stated that the first products based on its 10 nm process will arrive only by Holiday 2019, making 14 nm micro-architectures hold the fort for not just the rest of 2018, but also most of 2019. In the client-segment, Intel is on the verge of launching its 9th generation Core "Whiskey Lake" processor family, its 5th micro-architecture on the 14 nm node after "Broadwell," "Skylake," "Kaby Lake," and "Coffee Lake."

It's likely that "Whiskey Lake" will take Intel into 2019 after the company establishes performance leadership over 12 nm AMD "Pinnacle Ridge" with a new round of core-count increases. Intel is also squeezing out competitiveness in its HEDT segment by launching new 20-core and 22-core LGA2066 processors; and a new platform with up to 28 cores and broader memory interface. AMD, meanwhile, hopes to have the first 7 nm EPYC processors out by late-2018. Client-segment products based on its architecture, however, will follow the roll-out of these enterprise parts. We could see a point in 2019 when AMD launches its 7 nm 3rd generation Ryzen processors in the absence of competing 10 nm Core processors from Intel. Posted below is an Intel slide from 2013, when the company was expecting 10 nm rollout by 2015. That's how much its plans have derailed.

AMD in its Q2-2018 investors conference call dropped more hints at when it plans to launch its 3rd generation Ryzen processors, based on its "Zen2" architecture. CEO Lisa Su stated in the Q&A session that rollout of 7 nm Ryzen processors will only follow that of 7 nm EPYC (unlike 1st generation Ryzen preceding 1st generation EPYC). What this effectively means is that the fabled 16-core die with 8 cores per CCX won't make it to the desktop platform any time soon (at least not in the next three quarters, certainly not within 2018).

AMD CEO touched upon the development of the company's 7 nm "Rome" silicon, which will be at the heart of the company's 2nd generation EPYC processor family. 2nd generation EPYC, as you'd recall from our older article, is based on 7 nm "Zen2" architecture, and not 12 nm "Zen+." 3rd generation Ryzen is expected to be based on "Zen2." As of now, the company is said to have completed tape-out of "Rome," and is sending samples out to its industry partners for further testing and validation. The first EPYC products based on this will begin rolling out in 2019. The 7 nm process is also being used for a new "Vega" based GPU, which has taped out, and will see its first enterprise-segment product launch within 2018.

A post via Chiphell makes some substantial claims on AMD's upcoming Zen 2 microarchitecture, built on the 7 nm process. AMD has definitely won the core-count war once again (albeit with a much more decisive blow to Intel's dominance than with Bulldozer), but the IPC battle has been an uphill one against Intel's slow, but sure, improvement in that area over the years. AMD did say, at the time they introduced the Zen architecture, that they had a solid understanding on Zen's choke points and its improveable bits and pieces - and took it to heart to deliver just that.

At their technology symposium in Taipei, TSMC CEO CC Wei has made remarks, dismissing speculation that their 7 nanometer yield rate was not as good as expected. Rather the company is ramping up production capacity for 7 nm quickly, up 9% from 10.5 million wafers in 2017, to 12 million wafers in 2018. They plan to tape out more than 50 chip designs in 2018, with the majority of the tape outs for AI, GPU and crypto applications, followed by 5G and application processors.

Most of their orders for the 7 nanometer node come from big players like AMD, Bitmain, NVIDIA and Qualcomm. Apple's A12 processor for upcoming iPhones is also a major driver for TSMC's 7 nanometer growth. These orders will be fulfilled in early 2019, so it'll be a bit longer before we have 7 nm processors for the masses.

Next-gen 5 nanometer production will kick off next year, followed by mass production in late 2019 or early 2020. The company will invest as much as USD 25 billion in their new production facilities for this process node.

AMD in its Computex 2018 address earlier today, mention that its second-generation EPYC enterprise processors will be based on its 7 nanometer "Zen 2" architecture, and not 12 nm "Zen+." The company has the 7 nm silicon ready in its labs, and will begin sampling within the second half of 2018. The first products could launch in 2019, after validations. Besides improved energy-efficiency, the 12 nm "Zen+" architecture features a minor 3-5 percent IPC uplift thanks to improved multi-core clock-speed boosting, and faster caches. "Zen 2," on the other hand, presents AMD with the opportunity to make major design changes to its silicon to achieve higher IPC uplifts. The 7 nm process introduces significant transistor density uplifts over the current process. AMD is in the process of building 4-die multi-chip modules using the 12 nm "Pinnacle Ridge" silicon for its 2nd generation Ryzen Threadripper HEDT client processor family.

AMD demonstrated the world's first GPU built on the 7 nanometer silicon fabrication process, a Radeon Vega Instinct HPC/AI accelerator, with a 7 nm GPU based on the "Vega" architecture, at its heart. This chip is an MCM of a 7 nm GPU die, and 32 GB HBM2 memory stacks over four stacks (4096-bit memory bus width). It's also the first product to feature a removable InfinityFabric interface (competition to NVIDIA's NVLink interface). There will also be variants based on the common PCI-Express 3.0 x16. The card supports hardware virtualization and new deep-learning ops.

ARM has announced their next, high-performance computing solution with their A76 design, which brings another large performance increase to the fledgling architecture. having been touted for some time as a true contender to the aging x86 architecture, ARM has had a way of extracting impressive performance increases with each iteration of its computing designs, in the order of 20% do 40% performance increases in an almost annual basis. Compare that to the poster-child of x86 computing, Intel, and its passivity-fueled 5 to 10% yearly performance increases, and the projections aren't that hard to grasp: at some point in time, ARM cores will surpass x86 in performance - at least on the mobility space.

The new ARM A76 design, to be manufactured on the 7 nm process, brings about a 35% increase in performance compared to last years' A75. This comes with an added 40% power efficiency (partly from the 10 nm to 7 nm transition, the rest from architecture efficiency and performance improvements), despite the increase to maximum 3.0 GHz clocks. With the added performance, ARM is saying the new A76 will deliver 4x the Machine Learning performance of its previous A75 design.

Cadence and Micron have joined forces to build the world's first working DDR5-4400 memory module. Cadence provided their DDR5 memory controller and PHY for the prototype while Micron produced the 8 Gb chips, which were manufactured under TSMC's 7 nm process. They were able to achieve 4400 megatransfers per second, which is roughly 37.5% faster than the fastest DDR4 memory that is currently on the market. Nevertheless, Marc Greenberg from Cadence emphasized that DDR5 aims to provide increased capacity solutions, more than actual performance.

The DDR5 standard should facilitate the production of 16 Gb dies and make vertical stacking easier. Restricted by laws of physics, dies eventually get slower as they increased in size. Once you start putting 16Gb die in 1X memory technology, the distances between them starts to get longer. As a result, core timing parameters become worse. Cadence's prototype had a CAS latency of 42 (No, not a typo). Although, the test module does run at 1.1 volts, which makes it quite impressive when compared to DDR4.

It looks like AMD's processor product launch cycle is on steroids, and keeping up (or even ahead) of Intel. After launching the first 12 nm processor architecture with "Zen+," the company is giving final touches to what it hopes to be the world's first 7 nanometer processor architecture, with "Zen 2." The company will reportedly begin sampling the chip within 2018, to enable volume production and market launch in 2019. Speaking at an investors conference call following the company's Q1-2018 Results release, AMD CEO Dr. Lisa Su confirmed the 7 nm roll-out strategy of her company.

"We have a 7nm GPU based on Vega that we'll sample later this year. We have a 7nm server CPU that we'll sample later this year. And then, obviously, we have a number of products that are planned for 2019 as well. So it's a very, very busy product season for us. But we're pleased with the sort of the execution on the product roadmap," Dr. Su said. Unlike Zen+, Zen 2 is a major update to the company's processor micro-architecture, and presents the company with opportunities to improve several silicon-level specifications, such as the number of cores per CCX, the IPC of each core, the core-count of the die, the cache hierarchy, and the overall energy-efficiency.

With the latest Radeon Vega Instinct reveal, it's becoming increasingly clear that "Vega 20" is an optical shrink of the "Vega 10" GPU die to the new 7 nm silicon fabrication process, which could significantly lower power-draw, enabling AMD to increase clock-speeds. A prototype graphics card based on "Vega 20," armed with a whopping 32 GB of HBM2 memory, was put through 3DMark 11, on a machine powered by a Ryzen 7 1700 processor, and compared with a Radeon Vega Frontier Edition.

The prototype had lower GPU clock-speeds than the Vega Frontier Edition, at 1.00 GHz, vs. up to 1.60 GHz of the Vega Frontier Edition. Its memory, however, was clocked higher, at 1250 MHz (640 GB/s) vs. 945 MHz (483 GB/s). Despite significantly lower GPU clocks, the supposed "Vega 20" prototype appears to score higher performance clock-for-clock, but loses out on overall performance, in all tests. This could mean "Vega 20" is not just an optical-shrink of "Vega 10," but also benefits from newer architecture features, besides faster memory.

AMD has announced via its Twitter feed that the Vega die shrink from current 14 nm down to 7 nm has actually coalesced into a hardware product that can be tested and vetted at their labs. Via a teaser image, the company said that "7nm @RadeonInstinct product for machine learning is running in our labs."

Of course, working silicon is only half the battle - considerations such as yields, leakage, and others are all demons that must be worked out for actual production silicon, which may thus be some months off. Only AMD and TSMC themselves themselves know how the actual production run went - and the performance and power efficiency that can be expected from this design (remember that AMD's CEO Lisa SU herself said they'd partner with both TSMC and Globalfoundries for the 7 nm push, though it seems TSMC may be pulling ahead in that field). Considering AMD's timeline for the die-shrunk Vega to 7 nm - with predicted product launch for 2H 2018 - the fact that there is working silicon being sampled right now is definitely good news.

Semiconductor manufacturers have been historically bullish when it comes to the introduction of new manufacturing technologies. Intel, AMD (and then Globalfoundries), TSMC, all are companies who thrive in investors' confidence: they want to paint the prettiest picture they can in terms of advancements and research leadership, because that's what attracts investment, and increased share value, and thus, increased funds to actually reach those optimistic goals.

However, we've seen in recent years how mighty Intel itself has fallen prey to unforeseen complications when it comes to advancements of its manufacturing processes, which saw us go from a "tick-tock" cadence of new architecture - new manufacturing process, to the introduction of 14 nm ++ processes. And as Intel, Globalfoundries and TSMC race towards sub 7-nm manufacturing processes with 250 mm wafers and EUV usage, things aren't getting as rosy as the ultraviolet moniker would make us believe.

AMD "Vega 20" is rumored to be an optical shrink of the current "Vega 10" GPU die to a newer process, either 12 nm, or 10 nm, or perhaps even 7 nm. Six new device IDs that point to "Vega 20" based products, surfaced on AMD's GPU drivers source code, with its latest commit made as recently as on 28th March. AMD "Vega 10" is a multi-chip module of a 14 nm GPU die, and two "10 nm-class" HBM2 memory stacks, sitting on a silicon interposer that facilitates high-density wiring between the three. In an effort to increase clock speeds, efficiency, or both, AMD could optically shrink the GPU die to a smaller silicon fabrication process, and carve out a new product line based on the resulting chip.

Continuing with its trend of leaking AMD slides, Spanish website Informatica Cero has now published some purported company slides leading up to AMD's 2020 strategy. New information concerns the appearance of a new, value-oriented mobile APU in the form of "Dali" - let's hope performance on that is slightly more predictable than the particular style of the artist whose name it follows. Dali therefore joins AMD's "Renoir" APU and "Vermeer" CPUs (both expected in the 7 nm process) for AMD's 2020 roadmap. This is an interesting product, which AMD is likely positioning for tablets and ultraportables.

Another interesting tidbit is AMD's outlook for their Threadripper line of HEDT CPUs. The company is looking towards its 7 nm rendition of these powerhouse chips, codenamed "Castle Peak", to bring them, in a literal way, to that figurative peak. AMD compares Threadripper to a Monster Truck of computing, and is apparently hoping to introduce Castle Peak as early as 2019. AMD then plans to further refine these "process inflection point" products in a new generation to come right after, in 2020 (much like the company has done now with Zen and Zen+).

Globalfoundries' Chief Technical Officer, Gary Patton, talked about the future he believes can be possible in future manufacturing processes, calling for particular attention towards the next step in the ladder at 7 nm. Apparently, the 7 nm process at Globalfoundries has received a shot in the arm from the integration of ex IBM engineering specialists (remember that IBM practically paid Globalfoundries to take its manufacturing division of its hands), and the company now expects better than foreseen technical specs and achievements of its 7 nm process.

While a move from 14 nm to 7 nm was expected to provide, at the very best, a halving in the actual size of a chip manufactured in 7 nm compared to 14 nm, Gary Patton is now saying that the are should actually be reduced by up to 2.7 times the original size. To put that into perspective, AMD's 1000 series processors on the Zeppelin die and 14 nm process, which come in at 213 mm² for the full, 8-core design, could be brought down to just 80 mm² instead. AMD could potentially use up that extra die space to either build in some overprovisioning, should the process still be in its infancy and yields need a small boost; or cram it with double the amount of cores and other architectural improvements, and still have chips that are smaller than the original Zen dies.

Samsung Electronics, a world leader in advanced semiconductor technology, and Qualcomm Technologies, Inc., a subsidiary of Qualcomm Incorporated, today announced the intention to expand their decade-long foundry relationship into EUV (extreme ultra violet) lithography process technology, including the manufacture of future Qualcomm Snapdragon 5G mobile chipsets using Samsung's 7-nanometer (nm) LPP (Low Power Plus) EUV process technology.

Using 7LPP EUV process technology, Snapdragon 5G mobile chipsets will offer a smaller chip footprint, giving OEMs more usable space inside upcoming products to support larger batteries or slimmer designs. Process improvements, combined with a more advanced chip design, are expected to bring significant improvements in battery life.

AMD at CES shed some light on its 2018 roadmap, while taking the opportunity to further shed some light on its graphics and CPU projects up to 2020. Part of their 2018 roadmap was the company's already announced, across the board price-cuts for their first generation Ryzen processors. This move aims to increase competitiveness of its CPU offerings against rival Intel - thus taking advantage of the blue giant's currently weakened position due to the exploit saga we've been covering. This move should also enable inventory clearings of first-gen Ryzen processors - soon to be supplanted by the new Zen+ 12 nm offerings, which are expected to receive a 10% boost to power efficiency from the process shrink alone, while also including some specific improvements in optimizing their performance per watt profile. These are further bound to see their market introduction in March, and are already in the process of sampling.

On the CPU side, AMD's 2018 roadmap further points towards a Threadripper and Ryzen Pro refresh in the 2H 2018, likely in the same vein as their consumer CPUs that we just talked about. On the graphics side of their 2018 roadmap, AMD focused user's attention in the introduction of premium Vega offerings in the mobile space (with HBM2 memory integration on interposer, as well), which should enable the company to compete against NVIDIA in the discrete graphics space for mobile computers. Another very interesting tidbit announced by AMD is that they would be skipping the 12 nm process for their graphics products entirely; the company announced that it will begin sampling of 7 nm Vega products to its partners, but only on the Instinct product line of machine learning accelerators. We consumers will likely have to wait a little while longer until we see some 7 nm graphics cards from AMD.

Building on the global enthusiasm generated in 2017 by Ryzen processors and Radeon graphics technology, AMD today detailed its forthcoming roll-out plan for its new and next generation of high-performance computing and graphics products during an event in Las Vegas just prior to the opening of CES 2018. Alongside announcing the first desktop Ryzen processors with built-in Radeon Vega Graphics, AMD also detailed the full line up of Ryzen mobile APUs including the new Ryzen PRO and Ryzen 3 models, and provided a first look at the performance of its upcoming 12nm 2nd generation Ryzen desktop CPU expected to launch in April. In graphics, AMD announced the expansion of the "Vega" family with Radeon Vega Mobile and that its first 7nm product is planned to be a Radeon "Vega" GPU specifically built for machine learning applications.

"We successfully accomplished the ambitious goals we set for ourselves in 2017, reestablishing AMD as a high-performance computing leader with the introduction and ramp of 10 different product families," said AMD President and CEO Dr. Lisa Su. "We are building on this momentum in 2018 as we make our strongest product portfolio of the last decade even stronger with new CPUs and GPUs that bring more features and more performance to a broad set of markets."

Rambus, a company that has veered around the line of being an innovative company and a patent troll, has shed some more light on what can be expected from HBM3 memory (when it's finally available). In an investor meeting, representatives from the company shared details regarding HBM3's improvements over HBM2. Details are still scarce, but at least we know Rambus' expectations for the technology: double the memory bandwidth per stack when compared to HBM2 (4000 MB/s), and a more complex design, which leaves behind the 2.5D design due to increased height of the HBM3 memory stacks. An interesting thing to note is that Rambus is counting on HBM3 to be produced on 7 nm technologies. Considering the overall semiconductor manufacturing calendar for the 7 nm process, this should place HBM3 production in 2019, at the earliest.

HBM3 is also expected to bring much lower power consumption compared to HBM2, besides increasing memory density and bandwidth. However, the "complex design architectures" in the Rambus slides should give readers pause. HBM2 production has had some apparent troubles in reaching demand levels, with suspected lower yields than expected being the most likely culprit. Knowing the trouble AMD has had in successful packaging of HBM2 memory with the silicon interposer and its own GPUs, an even more complex implementation of HBM memory in HBM3 could likely signal some more troubles in that area - maybe not just for AMD, but for any other takers of the technology. Here's hoping AMD's woes were due only to one-off snags on their packaging partners' side, and doesn't spell trouble for HBM's implementation itself.

TSMC has announced the location for their first 3 nm fab: it will be built in the Tainan Science Park, southern Taiwan. Rumors pegged the new 3 nm factory as possibly being built in the US, due to political reasons; however, TSMC opted to keep their production capabilities clustered in the Tainan Science Park, where they can better leverage their assets and supply chain for the production and support of the world's first 3 nm semiconductor factory. It certainly also helped the Taiwanese government's decision to pledge land, water, electricity and environmental protection support to facilitate TSMC's latest manufacturing plan. It's expected that at least part of the manufacturing machines will be provided by ASML, a Netherlands-based company which has enjoyed 25% revenue growth already just this year.

As part of the announcement, TSMC hasn't given any revised timelines for their 3 nm production, which likely means the company still expects to start 3 nm production by 2022. TSMC said its 7 nm yield is ahead of schedule, and that it expects a fast ramp in 2018 - which is interesting, considering the company has announced plans to insert several extreme ultraviolet (EUV) layers at 7 nm. TSMC has also said its 5 nm roadmap is on track for a launch in the first quarter of 2019.

Not to be held back by silicon fabrication process limitations like in the past, AMD will build its second-generation Ryzen CPUs and Radeon Vega GPUs on the new 12 nanometer LP (low power) FinFET process by GlobalFoundries. From the looks of it, "2nd generation Ryzen" doesn't seem to be the same as "Zen2" (a micro-architectural advancement due to be built on the 7 nm process), and is more likely an optical shrink of existing 14 nm IP to the 12 nm process, giving AMD the headroom to increase yields, and clock speeds across the board. The 12 nm switch allows AMD to roll out a new "generation" of Ryzen processors as early as the first half of 2018.

The "Vega 10" silicon could be another key piece of AMD IP on the receiving end of an optical shrink to 12 nm, which will give AMD much needed power savings, letting it increase clock speeds, and probably implement faster standards of HBM2 memory, such as 2.00 GT/s. AMD will likely label this shrunk down silicon "Vega 20." There's also the possibility of AMD building a bigger new GPUs altogether. In 2019, the company will give its CPU and GPU lineups major micro-architectural upgrades, and the switch to the 7 nm node. The new "Zen2" micro-architecture with IPC increases and new ISA instruction-sets, will be launched on the CPU side, and the new "Navi" graphics architecture will take center-stage.