Today, Intel CEO Bob Swan announced changes to the company's technology organization and executive team to accelerate product leadership and improve focus and accountability in process technology execution. Effective immediately, the Technology, Systems Architecture and Client Group (TSCG) will be separated into the following teams, whose leaders will report directly to the CEO:

Technology Development, led by Dr. Ann Kelleher. An accomplished Intel leader, Kelleher has been head of Intel manufacturing, where she ensured continuous operations through the COVID-19 pandemic while increasing supply capacity to meet customer needs and accelerating the ramp of Intel's 10 nm process. She will now lead Intel technology development focusing on 7 nm and 5 nm processes. Dr. Mike Mayberry, who has been leading Technology Development, will consult and assist in the transition until his planned retirement at the end of the year. Mayberry has a 36-year track record of innovation at Intel, during which he has made key contributions in technology development and as the leader of Intel Labs.

Manufacturing and Operations, led by Keyvan Esfarjani. Esfarjani most recently led manufacturing for Intel's Non-Volatile Memory Solutions Group (NSG), in which role he set the vision and strategy for Intel's memory manufacturing and led a rapid expansion of capacity. He will now lead global manufacturing operations and continue Kelleher's work driving product ramp and the build-out of new fab capacity.

Intel today has officially launched their new Core i9-10850K CPU. The 10-core, 20-thread design slots in between the top of the line i9-10900K and the i9-10800K, and only features a small (100 MHz) clock reduction compared to the 10900K across all clocks (this means base, set at 3.6 GHz; Turbo Boost Max 2.0, reaching 5.0 GHz; Turbo Boost 3.0 going up to 5.1 GHz. Thermal Velocity Boost tech is also supported, which should allow for up to 5.2 GHz on a single core and a 4.8 GHz clock across all cores. The TDP remains the same as the 10900K at 125 W, with the same Tau and PL1/PL2 values as 10900K (56 sec, 125 W, and 250 W).

The new CPU improves on the value proposition of the 10900K by being available at around 10% less than Intel's top-of-the-line Comet Lake-S CPU, with pricing set at $453 (at 1K tray quantities). As Intel's manufacturing woes and 14 nm production output keep failing to meet demand, it's likely that the company will continue to fine-tune its product stack with as many CPUs as it can, in order to achieve higher ASP on each model than they would if they had to only count on manufacturing yields and/or manually disabling cores in chips that can't quite hit their advertised speeds for each CPU model. The Core i9-10850K retains compatibility with Intel's Z490, H470 and B460-based motherboards.

Intel's 11th Generation Core "Rocket Lake-S" desktop processors in the LGA1200 package could come with clock speeds that are of the norm these days. Intel appears unwilling to dial down clock speeds in the wake of increased IPC with the new generation "Cypress Cove" CPU cores that drive these processors. Twitter handle "leakbench," which tracks interesting Geekbench results, fished out a database listing for a "Rocket Lake-S" engineering sample with clock speeds of 3.40 GHz base, and 5.00 GHz boost.

The listing has all the telltale signs of "Cypress Cove," such as 48 KB L1D cache, 512 KB per core L2 cache, and 16 MB shared L3 cache for this 8-core/16-thread chip. "Cypress Cove" is rumored to be to be a back-port of Intel's "Willow Cove" CPU core design from its original 10 nm+ node to the 14 nm++. VideoCardz compared this "Rocket Lake-S" ES benchmark result to that of a retail Core i7-10700K, and found its single-threaded performance to be roughly 6.35 percent higher despite a 200 MHz clock-speed deficit, although for some reason, its multi-threaded performance is trailing by over 15 percent.

Intel is struggling with its node development and it looks like next-generation consumer systems are going to be stuck on 14 nm for a bit more. Preparing for that, Intel will finally break free from Skylake-based architectures and launch something new. The replacement for the current Comet Lake generation is set to be called Rocket Lake and today we have obtained some more information about it. Thanks to popular hardware leaker rogame (_rogame), we know a few stuff about Rocket Lake. Starting off, it is known that Rocket Lake features the backport of 10 nm Willow Cove core, called Cypress Cove. That Cypress Cove is supposed to bring only 10% IPC improvements, according to the latest rumors.

With 10% IPC improvement the company will at least offer some more competitive product than it currently does, however, that should be much slower than 10 nm Tiger Lake processors which feature the original Willow Cove design. It shows that backporting of the design doesn't just bring loses of the node benefits like smaller design and less heat, but rather means that only a fraction of the performance can be extracted. Another point that rogame made is that Rocket Lake will run up to 5 GHz in boost, and it will run hot, which is expected.

Intel's announcement today that their 7 nm node is facing difficulties is being taken one of two ways: as an unmitigated disaster by some, and with a tentative carefulness (lest we see another 10 nm repeat) from others. However one looks at this setback, which means AMD will still enjoy a process lead over Intel for some extra time, this is good news for AMD in more ways than just that one.

Case in point: stock price. While AMD has a much lower market cap than Intel (calculated by multiplying the value of a single stock by the number of total issued stocks), today, for the first time since 2006, AMD's shares were more valuable than Intel's on a per-share basis. AMD's $70 billion market cap still pales in comparison to Intel's $215 billion. At time of writing, AMD's stock pricing is $18 higher than Intel, at $68.67 compared to Intel's $50.79. A first in many years for the green company.

Intel Corporation today reported second-quarter 2020 financial results. "It was an excellent quarter, well above our expectations on the continued strong demand for computing performance to support cloud-delivered services, a work- and learn-at-home environment, and the build-out of 5G networks," said Bob Swan, Intel CEO. "In our increasingly digital world, Intel technology is essential to nearly every industry on this planet. We have an incredible opportunity to enrich lives and grow this company with a continued focus on innovation and execution."

Intel achieved record second-quarter revenue with 34 percent data-centric revenue growth and 7 percent PC-centric revenue growth YoY. These results were driven by strong sales of cloud, notebook, memory and 5G products in an environment where digital services and computing performance are essential to how we live, work and stay connected.

Jim Keller on Lex Fridman's AI Podcast shed some light on his thoughts on the microprocessor design fundamentals as he sees them. In a hour-and-a-half-long interview, he approaches Moore's Law and its much lauded - and ubiquitously repeated - death, as well as the need for both iterative and zero-point microprocessor design requirements.

Mr. Keller approaches the usual microprocessor design loop, where a company develops a new design from scratch and then looks at the most fundamental way of adding performance. Usually, he says, easy 10% performance increments can be found by simply looking at a design and increasing execution units - increase a buffer here, increase a cache over there, put in another add processor on this part of the pipeline. However, he also speaks of how this process in itself is limiting, inasmuch as doing this often will eventually guide processor designs towards a bottleneck and the diminishing returns problem, where any more additions made to the design don't seem to increase performance - mostly just adding complexity, area and power requirements, and generally convoluting a given design.

A Linux kernel patch contributed and signed off by Intel confirms that its upcoming Core "Alder Lake" processor will feature a hybrid core topology, much like Core Hybrid "Lakefield." The patch references "Lakefield" and "Alder Lake" under "Hybrid Core/Atom Processors." The patch possibly gives the Linux kernel awareness of the hybrid core topology, so it can schedule its work between the two types of cores on the silicon accordingly, and avoid rotating between the two core groups. Under the Android project, Linux has been aware of a similar tech from Arm since 2013.

Analogous with Arm big.LITTLE, the Intel Hybrid Core technology involves two kinds of CPU cores on a processor die, the first kind being "high performance," and the second being "low power." On "Lakefield," Intel deployed one "Sunny Cove" high performance core, and four "Tremont" low power cores. The low power cores keep the machine ticking through the vast majority of time when processing workloads requiring the high performance cores aren't present. With "Alder Lake," Intel is expected to scale up this concept, with the silicon rumored to feature eight "Golden Cove" high performance cores, and eight "Gracemont" low power ones. The chip is also expected to feature a Gen12 Xe iGPU.

Mobileye, an Intel company, and Ford Motor Company are collaborating on cutting-edge driver-assistance systems across Ford's global product lineup. As the chosen supplier of vision-sensing technology for Ford's advanced driver-assistance systems (ADAS), Mobileye will provide its EyeQ family of devices, together with vision-processing software, to support Level 1 and Level 2 ADAS in Ford vehicles globally.

"It is a privilege to extend and expand our long-standing collaboration with a company that is so committed to safety on behalf of its global customer base," said Professor Amnon Shashua, president and CEO of Mobileye. "We look forward to working closely together to bring these functionalities to market in the full Ford product lineup."

Taiwan Semiconductor Manufacturing Company, called TSMC shorty, has just become the world's biggest semiconductor company. The news broke after TSMC's stock reached a peak heights of $66.40 price per share, and market capitalization of 313 billion US dollars. That means that the Taiwanese company officially passed Intel, NVIDIA, and Samsung in terms of market capitalization, which is no small feat. And the news isn't that surprising. TSMC has been rather busy with orders from customers, just waiting for new spots so they can grab a piece of its production pipeline.

TrendForce, a market intelligence provider, estimates that TSMC has an amazing 51.9% of global semiconductor foundry share alone. That is no small feat but TSMC worked hard over the years to make it happen. With constant investments into R&D, TSMC has managed to make itself not only competitive with other foundries, but rather an industry leader. With 5 nm already going in high-volume manufacturing (HVM) in Q4 of this year, the company is demonstrating that it is the market leader with the latest node developments. Smaller nodes like 3 nm are already in development and TSMC doesn't plan to stop.

Michael Larabel over at Phoronix posted an extremely comprehensive analysis on the performance differential between AMD's Rome-based EPYC and Intel's Cascade Lake Xeons one-year after release. The battery of tests, comprising more than 116 benchmark results, pits a Xeon Platinum 8280 2P system against an EPYC 7742 2P one. The tests were conducted pitting performance of both systems while running benchmarks under the Ubuntu 19.04 release, which was chosen as the "one year ago" baseline, against the newer Linux software stack (Ubuntu 20.10 daily + GCC 10 + Linux 5.8).

The benchmark conclusions are interesting. For one, Intel gained more ground than AMD over the course of the year, with the Xeon platform gaining 6% performance across releases, while AMD's EPYC gained just 4% over the same period of time. This means that AMD's system is still an average of 14% faster across all tests than the Intel platform, however, which speaks to AMD's silicon superiority. Check some benchmark results below, but follow the source link for the full rundown.

A performance review of the Intel Core i5-L16G7 "Lakefield" Hybrid processor (powering a Samsung Galaxy S notebook) was recently published by Golem.de, which provides an in-depth look at Intel's ambitious new processor design that sets in motion the two new philosophies Intel will build its future processors on - packaging modularity provided by innovative new chip packaging technologies such as Foveros; and Hybrid processing, where there are two sets of CPU cores with vastly different microarchitectures and significantly different performance/Watt curves that let the processor respond to different kinds of workloads while keeping power-draw low. This concept was commercially proliferated first by Arm, with its big.LITTLE topology that took to the market around 2013. The "Lakefield" i5-L16G7 combines a high-performance "Sunny Cove" CPU core with four smaller "Tremont" cores, and Gen11 iGPU.

The Golem.de report reveals that Windows 10 thread scheduler is aware of the hybrid multi-core topology of "Lakefield," and that it is able to classify workloads at a very advanced level so the right kind of core is in use at any given time. The "Sunny Cove" core is called upon when interactive vast serial processing loads are in demand. This could even be something like launching applications, new tabs in a multi-process web-browser, or less-parallelized media encoding. The four "Tremont" cores keep the machine "cruising," handling much of the operational workload of an application, and is also better tuned to cope with highly parallelized workloads. This is similar to a hybrid automobile, where the combustion engine provides tractive effort from 0 kph, while the electric motor sustains a cruising speed.

Apple has recently announced its transition from Intel-based Mac computers to custom Arm-based Apple silicon equipped Macs. The speculations for such transition have lasted a few years and we finally got that confirmation. So the question remains: who will manufacture Apple's custom processors for Arm-based Macs? The answer is pretty simple. It is TSMC who will again become Apple's main supplier of silicon. With its broad offerings of the latest silicon nodes, it was no brainer choice for Apple. Combined with the history of collaboration with Apple, TSMC was the only choice for new Apple silicon. Whatever the company will use the new 5 nm node or use the "old" 7 nm one, the question remains.

TSMC expects to see huge orders from Apple in the second half of 2021, for Apple silicon, so Apple will become perhaps the biggest customer of TSMC. It is also worth pointing out that Apple will be using ASMedia's USB controller for Arm-based Macs, as the original report suggests.

Intel's upcoming Core i9-10850K processor started appearing as a configurator option on Digital Storm pre-built gaming desktops. The 10-core/20-thread Socket LGA1200 processor comes with an unlocked multiplier, but is positioned between the $440 Core i9-10900 (locked) processor and the $499 i9-10900K flagship part. Intel differentiates the i9-10900K from the i9-10850K by stripping the latter of the Thermal Velocity Boost feature. The processor now has a maximum boost frequency of 5.20 GHz, and it gets there using the Turbo Boost Max 3.0 algorithm. The lack of TVB is attributable to the processor model numbering being i9-108xx rather than i9-109xx. Despite being locked parts, the i9-10900 and i9-10900F get TVB.

It's still not known if Intel will release the Core i9-10850K to the DIY retail channel, but the fact that it's surfacing on a pre-built vendor's site points to the possibility of the chip being OEM-exclusive, and even begins to explain its raison d'être. Thermal Velocity Boost is a cooling-sensitive feature, and hitting the advertised 5.30 GHz TVB frequency comes with steep cooling requirements for OEMs, which they probably could do with less of. The processor should still perform nearly on-par with the i9-10900K in most scenarios, including gaming. Our review of the i9-10900 shows how you could potentially save $60 over choosing the i9-10900K, if you didn't plan on serious overclocking for the latter. With Intel's pricing of the i9-10850K, we can deduce that Intel values Thermal Velocity Boost at $50 (i9-10850K vs. i9-10900K), and unlocked multiplier at $10 (i9-10900 vs. i9-10850K).

Chenbro has launched the RB23708, a Level 6, 2U rackmount server barebone designed for mission-critical, storage-focused applications in Data Center and HPC Enterprise. The RB23708 is pre-integrated with an Intel Server Board S2600WFTR that supports up to two 2nd Generation Intel Xeon Scalable "Cascade Lake" Processors.

The RB23708 is an easy-to-use barebones server solution that pre-integrates a 2-socket Intel Server Board to ensure a flexible, scalable design with mission-critical reliability. Notably, it offers Apache Pass, IPMI 2.0 & Redfish compliance, and includes Intel RSTe/Intel VROC options, providing an ideal solution for hosting Video, IMS, SaaS and similar storage-focused applications.

Intel just sent out press invites to what is likely an online media event slated for September 2, 2020. The spells nothing other than a one-liner "We have something big to share..." with the September 2 date. Everyone has a theory as to what this could be, depending on who you ask. The Verge has a valid theory pointing to this being a formal launch of the 11th Gen Core "Tiger Lake" mobile processors on the basis of several notebook manufacturers slating their "Tiger Lake" based notebook launches on "Fall 2020."

We believe this could be a desktop-related unveil, possibly a performance preview or teaser of the company's 11th Gen "Rocket Lake-S" processor. Why September? Because September 2020 is going to be a busy month for AMD and NVIDIA, with both launching their next-gen consumer graphics architectures, product lines; and more interestingly, AMD rumored to launch its "Zen 3" microarchitecture in some shape or form. A Ryzen 4000 "Vermeer" product launch could trigger Intel to at least preview "Rocket Lake-S," as it's the first client-desktop microarchitecture in 5 years to introduce IPC gains on the backs of new "Cypress Cove" CPU cores that are a 14 nm back-port of "Willow Cove." It wouldn't surprise us if Intel shed more light on the performance throughput of its big new Xe graphics processors.

In a typical Battle Royale game, players fend for themselves, scour the map for loot, remain in the playable area and strategically plot to become the sole survivor. Mantisco's Hunter's Arena: Legends delivers a fresh approach to gameplay: In addition to their rival Hunters, players must contend with up to 10,000 artificial intelligence (AI) enemies, bringing together into one title the best MMORPG1, MOBA2 and Battle Royale features.

Developing a game with up to 60 players and 10,000 AI enemies was a massive technical undertaking. Mantisco needed to deliver seamless gameplay with exciting battles that keep players in the middle of the action. Intel helped Mantisco optimize gameplay through Intel Xeon servers and 10th Gen Intel Core CPU utilization that allow battles to take place simultaneously across the map. Using Intel VTune Profiler, which provides detailed profile data to improve CPU and GPU computing-intensive tasks and CPU threading performance, Mantisco created continuous and explosive moments of conflict among human and AI opponents alike through a dynamic monster respawn system.

As we approach the launch of the Intel's Ice Lake-SP Xeon processors, which will be the company's first 10 nm product for servers, we find more details on the ways CPU operates and today's discovery is an interesting one. In the latest patch submitted to Linux kernel by Intel's engineers, we find out that Intel Ice Lake Xeons have a slower frequency ramp up, meaning that there could be some latency added. However, the engineers have patched this and it should perform as expected. The patch is described as the following: "On ICX platform, the CPU frequency will slowly ramp up when woken up from C-states deeper than/equals to C1E. Although this feature does save energy in many cases this might also cause unexpected result. For example, workload might get unstable performance due to the uncertainty of CPU frequency. Besides, the CPU frequency might not be locked to specific level when the CPU utilization is low."

Intel issued a product change notification (PCH) announcing the discontinuation of its 9th Gen Core X series "Skylake-X" HEDT processors in the LGA2066 package; in addition to at least 10 Xeon W-2000 series workstation processors that are based on a similar IP. Discontinuation involves several steps, the first of which is the discontinuation announcement, which is dated July 9, 2020. The last orders for these chips will be taken on January 22, 2021, which are non-cancellable and non-returnable (for distributors, end-users are still protected by product warranties and consumer laws regardless of when they buy the processor). The last orders ship before July 9, 2021.

The Intel Core i5-10600K is currently retailing for $289.99 and $299.99 respectively on Amazon and Newegg which is well above Intel's suggested MSRP of just $262. This has created a bizarre situation where it is currently better value to purchase the CPU from Silicon Lottery where it has been verified to overclock to a set amount. Silicon Lottery sells multiple binned variants of the chip ranging from 4.7 GHz - 5.1 GHz max all-core overclock with prices starting at $289.99 going all the way up to $419.99. The $299.99 option which is guaranteed to overclock to 4.9 GHz on all 6 cores, and 5.0 GHz on up to 2 cores is arguably the best value option for the chip currently.

This guaranteed all-core overclock of 4.9 GHz provides a significant performance boost over the stock base frequency of 4.1 GHz, which equates to roughly 1% - 3% gaming performance boost which while not massive still equates to a few extra FPS. If considering one of these CPUs keep in mind the need for reasonable aftermarket cooling to ensure these chips stay cool such as the Noctua NH-U12S we used in our review.

GALAX announced plans to launch its motherboard product line in the North American market. The company will dip its toes in the market with entry-level and mid-range products, targeting both Intel Socket LGA1200 and AMD Socket AM4. For both sockets, GALAX appears to be using entry/mainstream chipsets. The LGA1200 product line consists of models based on the Intel H410 and B460 chipsets, while the AM4 line is based on the B550 chipset as AMD is yet to launch its entry-level A520 chipset. From the looks of it, GALAX's boards are pretty basic, and possibly all sub-$100 segment. The company didn't reveal specifics such as launch dates or pricing.

Intel's 12th Gen Core "Alder Lake-S" desktop processors in the LGA1700 package could see the desktop debut of Intel's Hybrid Technology that it introduced with the mobile segment "Lakefield" processor. Analogous to Arm big.LITTLE, Intel Hybrid Technology is a multi-core processor topology that sees the combination of high-performance CPU cores with smaller high-efficiency cores that keep the PC ticking through the vast majority of the time/tasks when the high-performance cores aren't needed and hence power-gated. The high-performance cores are woken up only as needed. "Lakefield" combines one "Sunny Cove" high-performance core with four "Tremont" low-power cores. "Alder Lake-S" will take this concept further.

According to Intel slides leaked to the web by HXL (aka @9550pro), the 10 nm-class "Alder Lake-S" silicon will physically feature 8 "Golden Cove" high-performance cores, and 8 "Gracemont" low-power cores, along with a Gen12 iGPU that comes in three tiers - GT0 (iGPU disabled), GT1 (some execution units disabled), and GT2 (all execution units enabled). In its top trim with 125 W TDP, "Alder Lake-S" will be a "16-core" processor with 8 each of "Golden Cove" and "Gracemont" cores enabled. There will be 80 W TDP models with the same 8+8 core configuration, which are probably "locked" parts. Lastly, there the lower wrungs of the product stack will completely lack "small" cores, and be 6+0, with only high-performance cores. A recurring theme with all parts is the GT1 trim of the Gen12 iGPU.

Another day, another Intel Tiger Lake and Xe graphics leak. This time, it comes courtesy of secret benchmark spotter extraordinaire TUM_APISAK, who spotted an Intel Tiger Lake CPU with integrated graphics on SiSoftware. Tiger Lake will ship with a graphics capability that reaches at least 96 Execution units (which boils down to the referred 768 Shading Units), which corresponds to the graphics prowess available on Intel's (currently discrete) DG1-SDV. The Iris Xe graphics on this benchmark are running at 1.3 GHz, with a 6.3 GB of memory on their elbow.

Axiomtek - a world-renowned leader relentlessly devoted in the research, development and manufacture of series of innovative and reliable industrial computer products of high efficiency - is proud to introduce the NA346, a 4-LAN fanless network appliance platform designed in a small form factor. This ultra-small desktop network appliance is powered by the Intel Celeron processor N3350 (code name: Apollo Lake) featuring the lowest Thermal Design Power (TDP) of 6 W to meet the specific configurations of low-power requirement. The reliable NA346 is positioned as an entry-level SD-WAN, VPN and security gateway for industrial IoT security applications.

"The 5G network is foreseeable to transfer data with greater bandwidth, higher speed and boost the edge computing and AIoT application. The cutting-edge NA346 offers two mini-PCIe slots and SIM socket supporting 3G/4G/LTE communications and connectors to 5G modules," said Kiwi Lee, a product manager of Product PM Division at Axiomtek. "Space limitation is one of the constraints in today's industrial environment. Axiomtek's ultra-small NA346 can be easily installed in narrow spaces. Featuring fanless operation, this network security appliance is perfect to be used in noise-sensitive environments."

"I hope AVX512 dies a painful death, and that Intel starts fixing real problems instead of trying to create magic instructions to then create benchmarks that they can look good on." These were the words of Linux and Git creator Linus Torvalds in a mailing list, expressing his displeasure over "Alder Lake" lacking AVX-512. Torvalds also cautioned against placing too much weightage on floating-point performance benchmarks, particularly those that take advantage of exotic new instruction sets that have a fragmented and varied implementation across product lines.

"I've said this before, and I'll say it again: in the heyday of x86, when Intel was laughing all the way to the bank and killing all their competition, absolutely everybody else did better than Intel on FP loads. Intel's FP performance sucked (relatively speaking), and it matter not one iota. Because absolutely nobody cares outside of benchmarks." Torvalds believes AVX2 is "more than enough" thanks to its proliferation, but advocated that processor manufacturers design better FPUs for their core designs so they don't have to rely on instruction set-level optimization to eke out performance.