Wednesday, May 22nd 2019
Intel "Sapphire Rapids" Brings PCIe Gen 5 and DDR5 to the Data-Center
As if the mother of all ironies, prior to its effective death-sentence dealt by the U.S. Department of Commerce, Huawei's server business developed an ambitious product roadmap for its Fusion Server family, aligning with Intel's enterprise processor roadmap. It describes in great detail the key features of these processors, such as core-counts, platform, and I/O. The "Sapphire Rapids" processor will introduce the biggest I/O advancements in close to a decade, when it releases sometime in 2021.
With an unannounced CPU core-count, the "Sapphire Rapids-SP" processor will introduce DDR5 memory support to the data-center, which aims to double bandwidth and memory capacity over the DDR4 generation. The processor features an 8-channel (512-bit wide) DDR5 memory interface. The second major I/O introduction is PCI-Express gen 5.0, which not only doubles bandwidth over gen 4.0 to 32 Gbps per lane, but also comes with a constellation of data-center-relevant features that Intel is pushing out in advance as part of the CXL Interconnect. CXL and PCIe gen 5 are practically identical.
The 2P machine platform for "Sapphire Rapids" is codenamed "Eagle Stream," and will form the bedrock for even the processor's 2022 successor, codenamed "Granite Rapids." This processor could introduce incremental improvements to performance, clock-speeds, and instruction-sets. "Sapphire Rapids" and "Granite Rapids" are timed to coincide with Intel's rollout of the 7 nm and 7 nm+ silicon fabrication nodes, respectively. The roadmap doesn't show 4P/8P implementations of these processors, so it may not be far-fetched to imagine a very high core count leveraging the new manufacturing nodes.
2020 will see Intel execute "Cooper Lake" across both its 2P and 4P/8P platforms, "Whitley" and "Cedar Island," respectively. It introduces CXL Interconnect in addition to PCIe gen 3.0, which overcomes many scalar limitations of PCIe in the data-center environment. CXL is expected to merge into the PCIe gen 5 specification in 2021. Intel will also release its first "Ice Lake-S" 2P-capable processor for the "Whitley" platform, which comes with 8-channel DDR4 and PCI-Express gen 4.0. Ice Lake-S is the only Intel enterprise chip to feature PCIe gen 4.0, highlighting its stopgap nature in the march toward gen 5. AMD's 2nd generation EPYC chips are also expected to feature PCIe gen 4.0.
Source:
WikiChip
With an unannounced CPU core-count, the "Sapphire Rapids-SP" processor will introduce DDR5 memory support to the data-center, which aims to double bandwidth and memory capacity over the DDR4 generation. The processor features an 8-channel (512-bit wide) DDR5 memory interface. The second major I/O introduction is PCI-Express gen 5.0, which not only doubles bandwidth over gen 4.0 to 32 Gbps per lane, but also comes with a constellation of data-center-relevant features that Intel is pushing out in advance as part of the CXL Interconnect. CXL and PCIe gen 5 are practically identical.
2020 will see Intel execute "Cooper Lake" across both its 2P and 4P/8P platforms, "Whitley" and "Cedar Island," respectively. It introduces CXL Interconnect in addition to PCIe gen 3.0, which overcomes many scalar limitations of PCIe in the data-center environment. CXL is expected to merge into the PCIe gen 5 specification in 2021. Intel will also release its first "Ice Lake-S" 2P-capable processor for the "Whitley" platform, which comes with 8-channel DDR4 and PCI-Express gen 4.0. Ice Lake-S is the only Intel enterprise chip to feature PCIe gen 4.0, highlighting its stopgap nature in the march toward gen 5. AMD's 2nd generation EPYC chips are also expected to feature PCIe gen 4.0.
21 Comments on Intel "Sapphire Rapids" Brings PCIe Gen 5 and DDR5 to the Data-Center
Partner conference lol
There's nothing in these slides that suggest that.
I would like to see this mythical server CPU with 10nm+ and double digit IPC gains this time next year. Will it be another low clocked dry run like Cannon Lake to appease investors: hey we have 10nm+ on the market. But just 26 cores. Jesus that's low for server. AMD might go beyond 64 cores with Zen3 next year and even beyond that with 4-way SMT per core enabling 64c/256t monsters. And what will this Intel's server CPU even cost? One kidney? Questions, questions...
PCIe 4.0 will not be short lived yet shortly loved as both these interfaces may co exist just like PCIe 2.0 is still alive and kicking. What im more concerned is an 8 channeled ddr5 memory (huge bandwidth)
This definitely wont effect the market unless you are an enthusiast and want to stay on top.
YES
According to requirements: no
I expect gpu's to adapt it quick but nvme's hardly use Gen 3.0, they will offer gen 4.0 and motherboards will have 5.0 capability for 1 nvme and gpu slot rest being gen 4.0.
SB will have PCI-E Gen 5.0, spit out gen 4.0
That is my expectations.
Here's an early preview back at CES. Expect the numbers to have improved since then.
pcper.com/2019/01/phison-previews-pcie-gen4-x4-nvme-with-ps5016-e16-controller/
Intel is dumping every good sounding gossip and hot talk trying to remain relevant or seem strong, and stay in the spotlight.
I see several mention a double digit IPC gains, but I don't know where this comes from. Sunny Cove is certainly a large overhaul of the core, but I wouldn't dare to estimate IPC gains without benchmarks and details of the front-end.If this is accurate, then they dropped the bigger Ice-Lake-SP core configurations.
They still will have Cooper Lake-SP with 48 cores, and a massive performance advantage when it comes to AVX etc. Server CPUs are more than just "cores" or "threads", and it all comes down to the workload. Intel don't have much to worry about here for now.Most of this content was known already, and some of it has been repeated several times from Intel since last summer. You would know this if you followed all tech news, the world doesn't revolve around AMD ;)
AMD will be moving to PCIe 5.0 around the same time as Intel. Biggest driver is data center customers--mostly NICs and NVMe drives. I already saturate dual 100Gb NICs in our lab at work and would likely saturate dual 200Gb NICs too. PCIe 5.0 will bring 400 Gb NICs without any weird PCIe 32x business.
Depends how big of a splash he has made... I don't trust Intel to make this roadmap on time, but good things from them are coming.
At-least by 2022 :P
Plenty of dances to be danced transistor wise, integrated MC, off chip MC.... either way latency dropped, so enough of my rant as I summoned way to much enginerding , even for me , drunk as I am posting this post.
"The Drunken Citizen for this eveni9ning"
4.0 will live quite a while because of bunch of X570 boards and backcompat 300/400 series boards.
I do application performance testing for one of the SSD manufacturers and specifically test AI applications. PCIe 3.0 is already stressed heavily (one of the main reason NVLink exists). PCIe 4 is a nice uplift but the cool things start happening with 5.0