Friday, December 11th 2020
Alleged Intel Sapphire Rapids Xeon Processor Image Leaks, Dual-Die Madness Showcased
Today, thanks to the ServeTheHome forum member "111alan", we have the first pictures of the alleged Intel Sapphire Rapids Xeon processor. Pictured is what appears to be a dual-die design similar to Cascade Lake-SP design with 56 cores and 112 threads that uses two dies. The Sapphire Rapids is a 10 nm SuperFin design that allegedly comes even in the dual-die configuration. To host this processor, the motherboard needs an LGA4677 socket with 4677 pins present. The new LGA socket, along with the new 10 nm Sapphire Rapids Xeon processors are set for delivery in 2021 when Intel is expected to launch its new processors and their respective platforms.
The processor pictured is clearly a dual-die design, meaning that Intel used some of its Multi-Chip Package (MCM) technology that uses EMIB to interconnect the silicon using an active interposer. As a reminder, the new 10 nm Sapphire Rapids platform is supposed to bring many new features like a DDR5 memory controller paired with Intel's Data Streaming Accelerator (DSA); a brand new PCIe 5.0 standard protocol with a 32 GT/s data transfer rate, and a CXL 1.1 support for next-generation accelerators. The exact configuration of this processor is unknown, however, it is an engineering sample with a clock frequency of a modest 2.0 GHz.
Source:
ServeTheHome Forums
The processor pictured is clearly a dual-die design, meaning that Intel used some of its Multi-Chip Package (MCM) technology that uses EMIB to interconnect the silicon using an active interposer. As a reminder, the new 10 nm Sapphire Rapids platform is supposed to bring many new features like a DDR5 memory controller paired with Intel's Data Streaming Accelerator (DSA); a brand new PCIe 5.0 standard protocol with a 32 GT/s data transfer rate, and a CXL 1.1 support for next-generation accelerators. The exact configuration of this processor is unknown, however, it is an engineering sample with a clock frequency of a modest 2.0 GHz.
83 Comments on Alleged Intel Sapphire Rapids Xeon Processor Image Leaks, Dual-Die Madness Showcased
The irony and shame here is fantastic.
which AMD is very lacking on software side
The chance of seeing these in workstations is pretty slim, perhaps even zero.
I could be mistaken but I'm guessing you're talking single core performance, no? :p
Most of you guys in here don't seem understand how the server market works; servers are purpose built, and especially when it comes to high-end servers, the only thing that matters total throughput in one specific workload, regardless if that is achieved with 4 or 400 cores. Average benchmark scores are usually irrelevant here (that's only something we consumer think about). If one CPU model is superior for a specific workload, it doesn't really matter if the competition has more cores. There will probably be numerous scenarios where Xeons and Epycs win respectively, and sometimes with a significant margin too.
Intel hasn't updated their Xeon platform with anything noteworthy for around 2 years now, that's an eternity in the server space and customers just don't wont settle for an inferior, slower and more costly platform. These things are custom built with huge support teams dedicated towards their maintenance, it's not like you plop in some racks with Intel hardware and they miraculously "just work" and the AMD ones don't. If that fabled Intel support and ecosystem was worth so much they'd never switch, expect they do, because it isn't.
Oh, and Intel's memory technology business side is so good that apparently they're looking to sell it. Hmm.
Ice Lake for LGA4189 (LGA4189-P5) is much delayed but should finally see the light in the first half of 2021.
96*1.2/64=1.8=80%
Where is Intel in a picture?
Quoting Linus Torvalds - "I'd much rather see that transistor budget used on other things that are much more relevant. Even if it's still FP math (in the GPU, rather than AVX-512). Or just give me more cores (with good single-thread performance, but without the garbage like AVX-512) like AMD did."
Basically there is a contingency between something that needs high levels of parallelization and something that needs low latency, those two properties are highly orthogonal with respects to each other, in other words applications that "need" both parallel processing and low latency don't really exist. Wide SIMD support in CPUs is stupid, it's a development that should have never been taken this far, there are simply better ways to do massively parallel computation.
Yes, that's the Intel infrastructure, support and sw for you.
And yes, once you build custom infrastructure and sw solutions around the hw, with Intel, it is the matter of changing the hw, adjusting of a few things and you are free to go, since everything is compatible.
When you are upgrading to Amd or to different hw vendor, you have to build the entire infrastructure again. Not to mention the non existing Amd proconsumer support.
Funny thing is actually, that Intel server business is growing massively, just over 30% during the last Q. The demand is higher than the supply from their side and every Q reaching a new record.
Explain to me what do you do if you bought a ton of Intel based servers 3 years ago and you need to replace them with something much more capable and power efficient and you realize Intel has hardly moved an inch since then. Do you keep your ever increasingly inferior platform around because of this fabled support while your competitors fly past you in terms of running costs because they switched to AMD ?You do realize this isn't a zero sum game right ? Intel and AMD can both have record growth simultaneously, in fact they do, the point is their business would have grown even more had they been more competitive. Oh and their problems with supply are because they massively screwed up their manufacturing and are forced to ship products based on 6 year old node. The demand isn't the problem, they are.
But keep in mind that running AVX2 code through AVX-512 units will have no real benefit.
Even VIA has implemented AVX-512 in their latest design, despite running it through two fused 256-bit vector units. This may seem pointless to some of you, but it still will gain benefits such as; 1) new types of operations in AVX-512, 2) improved instruction cache utilization and 3) better ISA compatibility with future software. This is kind of analogous to when Sandy Bridge added AVX(1) support, despite having only fused 128-bit vector units. (or Zen1)And people who don't know better will use this quote forever, despite it being total BS.
SIMD inside the CPU has basically no latency, and can be mixed in with other operations. Communicating with a GPU is only worth it for huge bactches of data, due to the extreme latency.What?There are many types of parallelism. SIMD in the CPUs are for parallelism on a smaller scale intermixed with a lot of logic, while multithreading is for larger independent chunks of work, and GPUs for even larger computationally dense (but little logic) chunks of work.