Monday, August 22nd 2022
TSMC (Not Intel) Makes the Vast Majority of Logic Tiles on Intel "Meteor Lake" MCM
Intel's next-generation "Meteor Lake" processor is the first mass-production client processor to embody the company's IDM 2.0 manufacturing strategy—one of building processors with multiple logic tiles interconnected with Foveros and a base-tile (essentially an interposer). Each tile is built on a silicon fabrication process most suitable to it, so that the most advanced node could be reserved for the component that benefits from it the most. For example, while you need the SIMD components of the iGPU to be built on an advanced low-power node, you don't need its display controller and media engine to, and these could be relegated to a tile built on a less advanced node. This way Intel is able to maximize its use of wafers for the most advanced nodes in a graded fashion.
Japanese tech publication PC Watch has annotated the "Meteor Lake" SoC, and points out that the vast majority of the chip's tiles and logic die-area is manufactured on TSMC nodes. The MCM consists of four logic tiles—the CPU tile, the Graphics tile, the SoC tile, and the I/O tile. The four sit on a base tile that facilitates extreme-density microscopic wiring interconnecting the logic tiles. The base tile is built on the 22 nm HKMG silicon fabrication node. This tile lacks any logic, and only serves to interconnect the tiles. Intel has an active 22 nm node, and decided it has the right density for the job.
The CPU tile is the only logic tile built on an Intel node, which in this case is the Intel 4 node. The company considers this process to be on-par or better than TSMC's N5, and it probably wanted the crown jewels of its IP—CPU cores—to be built on a native fab. The CPU tile contains the CPU cores, a last-level cache, and Foveros interfaces.
The Graphics tile is the second-most important logic tile, and contains an iGPU based on the Xe-LPG graphics architecture. An evolution of Xe-LP, the LPG features real-time ray tracing capabilities. Intel decided to use the TSMC N5 (5 nm EUV) node for this tile. Not all of the iGPU is based on this tile, some of it, such as the Display Engine, could be located on the I/O tile.
The SoC tile is the largest in terms of area, and is built on the TSMC N6 (6 nm) node. This contains the memory controllers, PCIe root-complex, and the controllers and SerDes (serializer-deserializer) of the various on-package devices. The I/O die is the smallest die, and is essentially an extension of the SoC die. It's built on the same TSMC N6 node, and features the PHY (physical layer) components of the various I/O.
Source:
PC Watch
Japanese tech publication PC Watch has annotated the "Meteor Lake" SoC, and points out that the vast majority of the chip's tiles and logic die-area is manufactured on TSMC nodes. The MCM consists of four logic tiles—the CPU tile, the Graphics tile, the SoC tile, and the I/O tile. The four sit on a base tile that facilitates extreme-density microscopic wiring interconnecting the logic tiles. The base tile is built on the 22 nm HKMG silicon fabrication node. This tile lacks any logic, and only serves to interconnect the tiles. Intel has an active 22 nm node, and decided it has the right density for the job.
The Graphics tile is the second-most important logic tile, and contains an iGPU based on the Xe-LPG graphics architecture. An evolution of Xe-LP, the LPG features real-time ray tracing capabilities. Intel decided to use the TSMC N5 (5 nm EUV) node for this tile. Not all of the iGPU is based on this tile, some of it, such as the Display Engine, could be located on the I/O tile.
The SoC tile is the largest in terms of area, and is built on the TSMC N6 (6 nm) node. This contains the memory controllers, PCIe root-complex, and the controllers and SerDes (serializer-deserializer) of the various on-package devices. The I/O die is the smallest die, and is essentially an extension of the SoC die. It's built on the same TSMC N6 node, and features the PHY (physical layer) components of the various I/O.
41 Comments on TSMC (Not Intel) Makes the Vast Majority of Logic Tiles on Intel "Meteor Lake" MCM
Their whole platform is designed to just use whatever the best is at the current moment, so this makes total sense. This is kind of cool.
The IO tile could be the integrated MC+ DDR5 Phy since it's directly glued to the Compute tile. Can't imagine IMC in the SOC it's too far could cause latencies..
Besides the left and right images show the CPu rotated differently along the short side. so it's very consfusing. If they want to keep adding cores. only the right image makes sense.
Meteor Lake is the CPU that "could" win back the crown for Intel, interesting times ahead.
Foveros is really interesting too, if anyone cares to read up on it.
But there's at least one downside: if they're going to have variants of compute tile with more and fewer cores, it would make sense for the LLC to scale up and down too, which can only be done if they have a variants of SoC tile as well.
What I don't dare to speculate - just thinking aloud - is that some cores will also find their place on the Soc tile. P or E, I have no idea which ones would fit N6 better. SoC tile is just ... too big. Are there any estimates of tile sizes out there?Capitalism of old: company innovates, finds a way to reduce cost without reducing value to consumer. [I don't care if there's just a small rock and three wires inside my PC, as long as it works as a PC.]
Capitalism evolved: you get less for more.
Stop crying on AMD's shoulder. They assassinated customers' wallets in the last two years and the least important ones, home users, were practically ignored.
Previously was supposed to be on 5nm, now it turns out to be 6nm, postponed to lunar and nova lakes.
intel did cut out the CPU part out of Raptor lake, shrinked it to 5/4nm, but that didn't result that much of a smaller die, just 10-12 mm² smaller than Alder lake that has less L2, and even less than Raptor.
I see now, the first image shows the 2+8 tile, the IO is shorter. Probably limited to PCIe 4x, the desktop version should be 16X +4 for nvme
2+8, 6+8 and 8+16 tile are 37,5, 68 and 105 mm² info in this thread.
www.techpowerup.com/294799/intel-meteor-lake-2p-8e-silicon-annotated
Makes zero difference who makes what for either Intel or AMD as long as they are good. Don't see why it matters unless you have some vested interest in them.
I am not going to reply to you again. I only replied to this post of yours, because I just couldn't believe what I was reading.
Since 1971, they have been manufacturing their own processors, they don't need anyone, but this policy will change. Not that they don't want to, but because it's more profitable for them.
As for Taiwan, it will be very difficult for them to produce anything if China invades the island. The scenario is not impossible and in the event of a war, Intel remains the only ones capable of manufacturing top processors. The others will be forced to adapt to Samsung's limited production or turn to Intel factories.Yes, it is not high end. It's just a...igpu. The computing units, the cores, are the well-guarded secrets.
How can anyone see it as a downer Intel buying production from TSMC? Would you not do the same if you could if it gives you a advantage.
It's hard to see due to low resolution, but there are "Memory Control" and "Memory IO" present on the right side. The slide is from their official presentation at Hot Chips.
Intel's collaboration with TSMC is based on the principle: in factory X I can produce an indispensable processor part for $5, and I don't have space to produce one for $10. Wouldn't it be good for others to manufacture the $5 part for me and for me to produce more $10 units?
Another one would be, what if I make this 5$ part some place else, exactly the place where my main competitor produces their stuff, and directly cutting available capacity for my main competitor.
Remember that the last 2 quarters AMD couldn't produce enough chips (both cpu and gpu) for the market, everything they produced, they sold right away.
Imagine being in a situation that you can't produce stuff fast enough (as it is flying off the shelves like hot cookies) and some other company comes in and takes some capacity off of your supplier. That's what's going on here. That is the primary reason, the (cheaper) cost of producing it on TSMC is secondary to this notion.
AMD is dependent on TSMC, Intel is not. It is not difficult to guess who has priority and who does not.
It's pure speculation with AMD sales. All released Zen 3 processors were available on the market and had a high reference price (msrp) from the start.