Thursday, October 5th 2023
Samsung and TSMC Reportedly Struggling with 3 nm Yields
According to Korean business news publication ChosunBiz, both Samsung and TSMC are struggling with their 3 nm node yields. The two companies have different approaches to their 3 nm nodes, with Samsung using GAA FET (Gate All Around), whereas TSMC is continuing with its FinFET technology. That said, TSMC has at least five known 3 nm nodes, of which two should be in production by now, assuming N3E has proved to be reliable enough to kick off. Samsung on the other hand has three known 3 nm nodes, with only one in production so far, called 3GAE.
ChosunBiz reports that neither company is getting the kind of yields that you'd expect from a node that should have been in volume production for around a year by now, with Samsung apparently being somewhat better than TSMC. At 60 and 50 percent respectively, neither Samsung nor TSMC are anywhere near decent yields. Anything below 70 percent is considered very poor and even the 60 percent claim in Samsungs case, is apparently limited to some kind of Chinese mining ASIC and doesn't include the SRAM you find in most modern processors. ChosunBiz also mentions a source familiar with Samsung's foundry business who mentions a yield closer to 50 percent for the company. The same source also mentions that Samsung needs to reach at least 70 percent yield to be able to attract major customers to its 3 nm node.
Sources:
ChosunBiz, via @Tech_Reve (on X)
ChosunBiz reports that neither company is getting the kind of yields that you'd expect from a node that should have been in volume production for around a year by now, with Samsung apparently being somewhat better than TSMC. At 60 and 50 percent respectively, neither Samsung nor TSMC are anywhere near decent yields. Anything below 70 percent is considered very poor and even the 60 percent claim in Samsungs case, is apparently limited to some kind of Chinese mining ASIC and doesn't include the SRAM you find in most modern processors. ChosunBiz also mentions a source familiar with Samsung's foundry business who mentions a yield closer to 50 percent for the company. The same source also mentions that Samsung needs to reach at least 70 percent yield to be able to attract major customers to its 3 nm node.
81 Comments on Samsung and TSMC Reportedly Struggling with 3 nm Yields
www.linkedin.com/pulse/intel-says-splitting-fab-saves-billions-dollars-year
IDM 2.0 was advertised immediately after Gelsinger became CEO, but I think the impact on investment in has been little understood until now.
Sapphire Rapids also tried to introduce many new features at once (by the way, all SPR tiles are manufactured on Intel 7, not planned for IDM 2.0), and also it severely delayed. In January of this year, the NYT reported on a situation in which too many new features of the SPR had spawned 12 iterations of stepping.Only one fab for Intel 4 volume ramp has been built, Fab 34 in Ireland, thus Intel 4 and 20A will not compete with each other. However, this results in the loss of capacity to produce MTL-S for desktops.
The results of Intel 4 development will be used when Intel 7 is converted to base tiles, etc. Incidentally, they are offering foundry services for an improved version of the 22nm with cost-effective layers adopted from 14nm.
Intel is going to ramp up Intel 3 late next year.
Intel is lacking volume severely. We don't know if Intel 3 is superior than TSMC N3. But in terms of volume, TSMC is in a much better shape than Intel.
intel 7(based on 13900k)-> 100.78mTr/mm²
Intel 4 -> 123.4mTr/mm²
TSMC 5nm -> 138
TSMC 4nm -> 143
TSMC 3nm (A17 pro)-> 183
Intel Meteor Lake Tile/Chiplet Manufacturer / Node
CPU Tile Intel / 'Intel 4'
3D Foveros Base Die Intel / 22FFL (Intel 16)
GPU Tile (tGPU) TSMC / N5 (5nm)
SoC Tile TSMC / N6 (6nm)
IOE Tile TSMC / N6 (6nm)
Intel 4 with high density library can be ~200 MTr/mm2.
Currently, the situation has changed significantly, and Intel's process development seems to be progressing relatively smoothly. On the other hand, TSMC appears to have encountered the same interconnect layer issues with 3nm generation that Intel also encountered with their 10nm generation.
@Proedros
P.S. I seem to have replied to the wrong post. I meant to reply to the post below.
But of course they are.... how else will they be able to justify the upcoming price hikes that are sure to come with these new chips. :(
Get this uneducated crap out of here. Weak attempt.
Not like you could shrink nodes or use chiplets and over time they would outweigh the profit of older architectures. Of course not that would be ridiculous. Must be why cell phones that used to cost $500 can be bought at 711 for 20 bucks.
You can make excuses and arguments and spend your entire pay check on Intel every week, and it wouldn't make a difference. Because where the money actually is in the server market, they are inferior and nowhere to be seen. Too few cores because of their architecture, too little efficiency because of bad design. Period, full stop, stock price reflects it perfect.